JPH02108364U - - Google Patents

Info

Publication number
JPH02108364U
JPH02108364U JP1723689U JP1723689U JPH02108364U JP H02108364 U JPH02108364 U JP H02108364U JP 1723689 U JP1723689 U JP 1723689U JP 1723689 U JP1723689 U JP 1723689U JP H02108364 U JPH02108364 U JP H02108364U
Authority
JP
Japan
Prior art keywords
pad
hole
wiring board
printed wiring
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1723689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1723689U priority Critical patent/JPH02108364U/ja
Publication of JPH02108364U publication Critical patent/JPH02108364U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,bは本考案の第1実施例によるプリ
ント配線基板を示す平面図および断面図、第2図
は第1実施例の半田フイレツトを示す拡大斜視図
、第3図は第2実施例を示す平面図、第4図a,
bは従来のプリント配線基板を示す平面図および
断面図である。 図において、1―1はリード、2は絶縁板、3
はスルーホール、4はパツド、5は導体パターン
、16,17,26はレジスト膜、16a,26
aは露出部、16b,26bは突出部、を示す。
1A and 1B are a plan view and a sectional view showing a printed wiring board according to a first embodiment of the present invention, FIG. 2 is an enlarged perspective view showing a solder fillet of the first embodiment, and FIG. 3 is a second embodiment. Plan view showing an example, Figure 4a,
b is a plan view and a sectional view showing a conventional printed wiring board. In the figure, 1-1 is a lead, 2 is an insulating plate, and 3
1 is a through hole, 4 is a pad, 5 is a conductor pattern, 16, 17, 26 is a resist film, 16a, 26
a indicates an exposed portion, and 16b and 26b indicate protruding portions.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 集積回路素子を実装するプリント配線基板であ
つて、上記集積回路素子のリード1―1が挿入さ
れるスルーホール3に形成されたパツド4および
、導体パターン5を形成した絶縁板2の全面に、
各該パツド4表面に該スルーホール3から放射状
に一定幅の露出部16aと、該パツド4表面より
該スルーホール3の内側へ一定寸法突出する突出
部16bを設けたレジスト膜16を形成してなる
ことを特徴とするプリント配線基板。
A printed wiring board on which an integrated circuit element is mounted, a pad 4 formed in a through hole 3 into which a lead 1-1 of the integrated circuit element is inserted, and a conductor pattern 5 formed on the entire surface of an insulating plate 2.
A resist film 16 is formed on the surface of each pad 4, having an exposed portion 16a having a constant width radially extending from the through hole 3, and a protruding portion 16b projecting from the surface of the pad 4 to the inside of the through hole 3 by a constant distance. A printed wiring board characterized by:
JP1723689U 1989-02-15 1989-02-15 Pending JPH02108364U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1723689U JPH02108364U (en) 1989-02-15 1989-02-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1723689U JPH02108364U (en) 1989-02-15 1989-02-15

Publications (1)

Publication Number Publication Date
JPH02108364U true JPH02108364U (en) 1990-08-29

Family

ID=31230839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1723689U Pending JPH02108364U (en) 1989-02-15 1989-02-15

Country Status (1)

Country Link
JP (1) JPH02108364U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007180078A (en) * 2005-12-27 2007-07-12 Hitachi Ltd Printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007180078A (en) * 2005-12-27 2007-07-12 Hitachi Ltd Printed circuit board

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