JPH02100509A - Oscillation circuit - Google Patents

Abstract

PURPOSE:To always output a signal which is synchronized with a frequency even if a signal is inputted only in a short period with respect to a specified period by using a frequency-voltage converter and holding a voltage correspond ing to an input signal and the oscillation frequency of VCO by means of a sample and holding circuit. CONSTITUTION:When a control signal input terminal (a) is H level, analogue switches 1 and 4 are turned off and analogue switches 2 and 3 which are con trolled through an invertor 10 are turned on. At that time, a signal inputted from an input terminal (b) is inputted to the frequency-voltage converter 5 and the output voltage is sample-held by the capacitor 12 and a high input resistant amplifier 9. When the control signal input (a) is L level, the signal of VCO 6 is inputted to the frequency-voltage converter 5, and the output volt age is sample-held by a capacitor 11 and a high input resistant amplifier 8. The sample-held voltage is inputted to a comparator 7. The closed loop is converged to a point where the frequency of the input signal and the oscillation frequency of VCO 6 coincide by connecting the output of the comparator tot the oscillation frequency control terminal of VCO 6.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an oscillation circuit that constantly outputs a signal whose frequency is synchronized with a signal that is periodically input for a certain period of time.

2. Description of the Related Art An example of a conventional oscillation circuit will be described below with reference to the drawings.

FIG. 5 shows a block diagram of a conventional oscillation circuit. In FIG. 5, l is an analog switch, 2 is a multiplier, 3 is a low pass filter (hereinafter abbreviated as LPF), 4 is a voltage controlled oscillator (hereinafter abbreviated as ■co), 5 is a DC amplifier,
A is a control signal terminal, b is an input terminal, and C is an output terminal.

The operation of the oscillation circuit configured as above will be explained below.

Is analog switch 1 a control? [A is assumed to be closed when terminal a is H, and open when terminal a is L. Therefore, when the control terminal a is at H, the signal input to the input terminal A is input to the multiplier 2. On the other hand, the output signal of the voltage controlled oscillator 4 is input to the other input terminal of the multiplier 2, and is passed through an 8 low-pass filter 3 that outputs the sum and difference frequencies of both input signals. and only the phase difference component is selected,
This signal is amplified by a DC amplifier 5 and inputted to the oscillation frequency side '4n terminal of the VCO 4, which is a 9 or higher multiplier 2. LPF3,
A loop composed of a DC amplifier 5 and a VCO 4 allows V
At the output terminal C of CO4, a signal synchronized in frequency and phase with the signal at the input terminal S is obtained.

Next, when control terminal a is L, analog switch 7 is open, so no signal is input from the input terminal, and the VCO
4 oscillates at a free-running frequency, and its signal is obtained from the output terminal C.

Problems to be Solved by the Invention However, in the above configuration, when the analog switch l is closed for a short period of time, frequency synchronization and phase synchronization by the loop are not applied, and the analog switch l
When the VCO 4 is open, the VCO 4 returns to the free-running frequency, resulting in a problem that an output signal that is frequency-synchronized with the input signal cannot be obtained.

In view of the above-mentioned problems, the present invention provides an oscillation circuit that constantly outputs a frequency-synchronized signal even when the signal is input only for a sufficiently short period with respect to a fixed period.

Means for Solving the Problems In order to solve the above problems, the oscillation circuit of the present invention uses the same frequency-to-voltage converter to switch and convert the input signal and ■CO using a control signal, and then converts the input signal and ■CO into separate sample/hold circuits. , and input both to a comparator, and the output signal is used to control the oscillation frequency of co to match the frequency of the input signal.

Operation The present invention uses a frequency-to-voltage converter with the above-described configuration, and uses a sample-and-hold circuit to convert the input signal and CO
By holding a voltage corresponding to the oscillation frequency of , it is possible to constantly output a signal Σ whose frequency is synchronized with the input signal.

EXAMPLE Hereinafter, an oscillation circuit according to an example of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of an oscillator in a first embodiment of the invention. In Figure 1, 1, 2, 3.4 are analog switches, 5 is a frequency-to-voltage converter, 6 is vC○, 7 is a comparator, 8, 9
is a high input resistance amplifier, 10 is an inverter, 11.12 is a capacitor, a is a control signal input terminal, b is an input terminal, C
is the output terminal.

The operation of the oscillation circuit configured as above will be explained below using FIG. 1.

The analog switch is closed when the control signal is high and opened when the control signal is low.

When control signal input terminal a is H, analog switches 1 and 4 are closed, and analog switches 2 and 3 controlled through inverter 1o are open. At this time, the signal input through the input terminal is input to the frequency-to-voltage converter 5, and the capacitor 12 is charged with a voltage equal to the output voltage thereof.

Since the capacitor 12 is connected to the high input resistance amplifier 9, when the switch 4 is opened, the capacitor 12 has a very large discharge time constant and performs a sample-and-hold operation.

On the other hand, when the control signal input a is L, analog switches 1 and 4 are opened, and analog switches 2 and 3 are closed. At this time, the signal of the VCO 6 is input to the frequency-to-voltage converter 5, and a voltage equal to the output voltage thereof is similarly sampled and held by the capacitor 11 and the high input resistance amplifier 8.

The voltages sampled and held as described above are input to the two input terminals of the comparator 7, respectively. If there is a difference between the input signal and the oscillation frequency of CO, a difference will occur in the output voltage of the frequency-to-voltage converter 5, and a comparator output will appear.

By connecting this output signal to the oscillation frequency control terminal of VCO6, this closed loop is connected to the input (frequency of i and V
It converges to a point where the oscillation frequency of CO6 matches.

As described above, according to this embodiment, there is a frequency-to-voltage converter, a circuit that samples and holds the output of the input signal and the VCO separately, a comparator that inputs both signals, and a VCO that is controlled by the output of the comparator. By providing this, it is possible to obtain an output that is frequency-synchronized with a signal that is periodically input for a certain period of time.

A second embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram of an oscillation circuit showing a second embodiment of the present invention. In the figure, 1, 2, 3° 4 is an analog switch, 5 is a frequency-to-voltage converter, 6 is a VCO 17 is a comparator, 8.9 is a high input resistance amplifier, 10 is an inverter, 11.12 is a capacitor, and a is a The control signal input terminal, b is an input terminal, and C is an output terminal, which is the same as the configuration shown in FIG. 1. The difference from the configuration in Figure 1 is that N
A pulse shaping circuit 16 consisting of an OR gate 13, a resistor 14, and a capacitor 15 is provided, and the real analog switch 4 is controlled by the output of the circuit.

Note that the input of the pulse shaping circuit 16 is connected to the output of the inverter IO in order to maintain logic consistency with FIG. 1.

The operation of the oscillation circuit configured as described above will be explained below.

FIG. 3 is a waveform diagram of the main parts, and FIG. 4 is an input/output waveform diagram of the pulse shaping circuit.

The basic operation of the circuit of FIG. 2 is exactly the same as that of the circuit of FIG. However, when a control signal such as a in Fig. 3 is input to the control signal input terminal a, the output of the frequency-to-voltage converter 5 is actually at the change point of the control signal as shown in C in Fig. 3. Overshoot occurs. Therefore, if the time it takes for the overshoot to converge cannot be ignored compared to the time during which the control signal maintains a certain state, the effect of the overshoot will appear on the voltage sampled and held in the capacitor. The peak value of the overshoot is irregular and changes every synchronization, so the output of the comparator 7 also changes, and the oscillation frequency of the VCO 6 has a zinc.In order to avoid this, the analog A pulse shaping circuit 16 that shapes the control voltage of the analog switch 4 as shown in FIG. 3b so that the switch 4 is open during the overshoot period and closed only during the period when the output of the frequency-to-voltage converter 5 is stable. will be established.

The principle of this circuit will be explained using FIG.

The control signal input from the control signal input terminal a is inverted by the inverter 10 and becomes the waveform of a in FIG. 4. This signal is input directly to one input terminal of the NOR gate 13, and is input to the other input terminal via an integrating circuit composed of a resistor 14 and a capacitor 15. The control signal waveform after passing through the integrator circuit is shown in Fig. 4b, and if both are switched at the midpoint between H and L, the waveform shown in Fig. 4b is digitally as shown in Fig. 4C. It can be expressed as

The NOR gate 13 operates using the two signals a and C in FIG. 4 as input, and obtains a control signal with a shortened pulse width by delaying the rise time of the control signal and leaving the fall time unchanged, as shown in d in FIG. be able to.

As described above, by providing a pulse shaping circuit that shapes the control signal so that the output of the frequency-to-voltage converter is taken in only during a stable period after the change, an oscillation output with less frequency jitter can be obtained.

Effects of the Invention As described above, the present invention comprises a frequency-to-voltage converter, a circuit that separately samples and holds its output as an input signal and a VCO, a comparator that inputs both signals, and a VCO that is controlled by the output of the comparator. By providing this, it is possible to obtain an output that is frequency-synchronized with a signal that is periodically input for a certain period of time.

Further, by providing a control circuit so as to sample and hold the output of the frequency-to-voltage converter only during a period when it becomes stable after switching the input signal, an oscillation output with less frequency zinc can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an oscillation circuit according to a first embodiment of the present invention, FIG. 2 is a block diagram of an oscillation circuit according to a second embodiment of the present invention, FIG. 3 is a waveform diagram of main parts, and FIG. The figure is an input/output waveform diagram of a pulse shaping circuit, and FIG. 5 is a block diagram of a conventional oscillation circuit. 1.2, 3.4... Analog switch, 5...
...Frequency-to-voltage converter, 6...Voltage controlled oscillator, 7...Comparator, 8,9...
...High input resistance amplifier, 10...Inverter,
11.12... Capacitor, 13...
NOR gate, 14... Resistor, 15...
・Capacitor, 16... Pulse shaping circuit, a.
...Control signal input terminal, b...Input terminal, C...Output terminal.

Claims (2)

[Claims] (1) When the control signal having a binary state is in the first state, the external input signal is selected by the first selection switch that selects the external input and the internal voltage controlled oscillator, and is input to the frequency-to-voltage converter. The resulting voltage is charged to a capacitor connected to the first input terminal of the comparator via a second selection switch that selects an output destination according to the control signal. Selecting an internal voltage controlled oscillator with a first selection switch, converting it into a voltage with the frequency-to-voltage converter, and charging a capacitor connected to a second input terminal of the comparator via the second selection switch; An oscillation circuit characterized in that the oscillation frequency of the voltage controlled oscillator is controlled to be synchronized with the frequency of an external input signal by the output of the comparator. (2) The oscillation circuit according to claim (1), further comprising a control circuit so that charging of the capacitor is started after a certain period of time has passed after the state of the control signal changes.