JPS6342513A - Automatic frequency control circuit - Google Patents
Automatic frequency control circuitInfo
- Publication number
- JPS6342513A JPS6342513A JP61185299A JP18529986A JPS6342513A JP S6342513 A JPS6342513 A JP S6342513A JP 61185299 A JP61185299 A JP 61185299A JP 18529986 A JP18529986 A JP 18529986A JP S6342513 A JPS6342513 A JP S6342513A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- frequency
- circuit
- output
- pass filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001360 synchronised effect Effects 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は負滞還形位相同期回路を利用した自動周波数制
御回路に係り、特に短時間のうちに位相同期状態が得ら
れる自動周波数制御回路に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an automatic frequency control circuit using a negative feedback type phase-locked circuit, and particularly to an automatic frequency control circuit that can obtain a phase-locked state in a short time. It is related to.
従来、周波数変換回路の局部発振器の出力周波数を制御
する周波数制御方式のうち、負帰還形位相同期回路を利
用した自動周波数制御回路としては、第２図に示すもの
が一般的に知られている。Among conventional frequency control methods for controlling the output frequency of a local oscillator in a frequency conversion circuit, the one shown in Figure 2 is generally known as an automatic frequency control circuit that uses a negative feedback phase synchronization circuit. .
この第２図において、１は周波数変換器で、この周波数
変換器１の出力信号は出力係号ｏｕｔとして送出される
と共にその一部は周波数位相比較器２に導かれ基準信号
発生器３の出力信号との間で周波数位相比較される。そ
して、この間波数位相比較器２によって周波数位相比較
された信号は低域フィルタ４に導かれ誤差信号のみが取
りだされ、その誤差信号は電圧制御発振器５０制御端子
に負帰還され、この電圧制御発振器５の出力信号周波数
を変化させる。In this FIG. 2, 1 is a frequency converter, and the output signal of this frequency converter 1 is sent out as an output coefficient out, and a part of it is guided to a frequency phase comparator 2 and output from a reference signal generator 3. The frequency and phase are compared between the two signals. During this time, the signal whose frequency and phase have been compared by the wave number phase comparator 2 is guided to the low-pass filter 4, where only the error signal is taken out.The error signal is negatively fed back to the control terminal of the voltage controlled oscillator 50, and this voltage controlled oscillator Change the output signal frequency of 5.
そして、この変化した出力信号は周波数変換器１に導か
れ、入力信号ｉｎとの差の周波数に等しい信号が周波数
変換器１より出力される。この周波数変換器１の出力信
号の一部は再び周波数位相比較器２に導かれ、周波数位
相比較される。この関係は周波数位相比較器２の出力信
号が零となるまでつづき、零となったとき位相同期状態
が得られたことになる。Then, this changed output signal is guided to the frequency converter 1, and a signal equal to the frequency difference from the input signal in is outputted from the frequency converter 1. A part of the output signal of the frequency converter 1 is again led to the frequency phase comparator 2, where the frequency and phase are compared. This relationship continues until the output signal of the frequency phase comparator 2 becomes zero, and when it becomes zero, a phase synchronized state has been obtained.
し発明が解決しようとする問題点〕
上述した従来の自動周波数制御回路では、この回路によ
り得られる出力信号において入力信号に含まれる雑音な
どの不要波信号の除去比を大きくするためには低域フィ
ルタ４の帯域幅を狭くする必要がある。[Problems to be Solved by the Invention] In the conventional automatic frequency control circuit described above, in order to increase the rejection ratio of unnecessary wave signals such as noise contained in the input signal in the output signal obtained by this circuit, it is necessary to It is necessary to narrow the bandwidth of filter 4.
しかし、低域フィルタ４の帯域幅を狭くすると、位相同
期はずれをおこしたときに位相同期状態が得られるまで
の時間、すなわち、引込時間が長くなり、信号回線の復
旧に時間がかかるという問題点があった。However, if the bandwidth of the low-pass filter 4 is narrowed, there is a problem that the time it takes to obtain a phase synchronization state when phase synchronization occurs, that is, the pull-in time increases, and it takes time to restore the signal line. was there.
Ｌ問題点を解決するための手段〕
本発明の自動周波数制御回路は、入力信号と電圧制御発
振器の出力とを周波数変換器によって周波数変換を行な
い得られる出力信号の１部を周波数位相比較器に導き、
基準信号発生器の出力信号との間で周波数位相比較を行
ない、その出力信号を第１の低域フィルタに導き、この
第１の低域フィルタにより誤差信号のみを取υ出すよう
になし、かつ時間的に出力電圧が変化する電圧掃引回路
と、この電圧掃引回路によって得られた掃引電圧を制御
信号により保持するホールド回路と、所要の周波数に応
じ【設定された固定電圧を出力信号とする固定電圧発生
回路と、この固定電圧発生回路によって得られ九固定電
圧を制御信号によりミ気的に開閉するスイッチ回路と、
上記第１の低域フィルタよシの誤差信号と上記ホールド
回路の出力信号および上記スイッチ回路の出力信号とを
電圧加算する加算器と、上記周波数位相比較器の出力信
号を入力とし出力制御信号により上記ホールド回路およ
びスイッチ回路の制御を行なう第２の低域フィルタとを
備え、上記加算器の出力信号全上記電圧制御発振器に負
帰還し位相同期状態を得るようＫしたものである。Means for Solving Problem L] The automatic frequency control circuit of the present invention converts the frequency of an input signal and the output of a voltage controlled oscillator using a frequency converter, and sends a part of the resulting output signal to a frequency phase comparator. guidance,
A frequency phase comparison is performed with the output signal of the reference signal generator, the output signal is guided to a first low-pass filter, and only the error signal is extracted by the first low-pass filter, and A voltage sweep circuit whose output voltage changes over time, a hold circuit which holds the sweep voltage obtained by this voltage sweep circuit using a control signal, and a hold circuit which uses a set fixed voltage as an output signal depending on the required frequency. a voltage generation circuit; a switch circuit that electrically opens and closes the fixed voltage obtained by the fixed voltage generation circuit according to a control signal;
an adder that adds the voltage of the error signal of the first low-pass filter, the output signal of the hold circuit, and the output signal of the switch circuit; A second low-pass filter is provided for controlling the hold circuit and the switch circuit, and the output signal of the adder is all negatively fed back to the voltage controlled oscillator to obtain a phase synchronized state.
本発明においては、低域フィルタの出力制御信号により
掃引電圧を保持し、さらに、適当に設定された固定電圧
を加算することにより、短時間のうちに位相同期状態が
得られる。In the present invention, by holding the sweep voltage using the output control signal of the low-pass filter and further adding an appropriately set fixed voltage, a phase synchronization state can be obtained in a short time.
以下、図面に基づき本発明の実施例を詳細に説明する。 Embodiments of the present invention will be described in detail below based on the drawings.
第１図は本発明による自動周波数制御回路の一実施例を
示すブロック図である。FIG. 1 is a block diagram showing one embodiment of an automatic frequency control circuit according to the present invention.
この第１図において第２図と同一符号のものは相当部分
を示し、６は周波数位相比較器２の出力信号を入力とす
る低域フィルタで、？：、の低域フィルタ６はある特定
の帯域幅をもっている。Ｔは時間的に出力電圧が変化す
る電圧掃引回路、８はこの電圧掃引回路７によつ工得ら
れた掃引電圧を低域フィルタ６の出力制御信号により保
持するホールド回路、Ｓは所要の周波数に応じて設定さ
れた固定電圧を出力信号とする固定電圧発生回路、１０
はこの固定電圧発生回路９によって得られた固定電圧を
低域フィルタ６よりの出力制御信号によりミ気的に開閉
するスイッチ回路、１１は低域フィルタ４よりの誤差信
号とホールド回路８の出力信号およびスイッチ回路１０
の出力信号とを電圧的に加算する加算器である。In FIG. 1, the same reference numerals as in FIG. 2 indicate corresponding parts, and 6 is a low-pass filter that receives the output signal of the frequency phase comparator 2 as input. The low-pass filter 6 of : has a certain specific bandwidth. T is a voltage sweep circuit whose output voltage changes over time; 8 is a hold circuit that holds the sweep voltage obtained by the voltage sweep circuit 7 using the output control signal of the low-pass filter 6; and S is a required frequency. A fixed voltage generation circuit that outputs a fixed voltage set according to the output signal, 10
11 is a switch circuit that mechanically opens and closes the fixed voltage obtained by the fixed voltage generation circuit 9 according to the output control signal from the low-pass filter 6; 11 is the error signal from the low-pass filter 4 and the output signal from the hold circuit 8; and switch circuit 10
This is an adder that adds the output signals of
そして、加算器１１の出力信号を電圧制御発振器５に負
帰還し１位相同期状態を得るように構成されている。The output signal of the adder 11 is then negatively fed back to the voltage controlled oscillator 5 to obtain a one-phase synchronization state.
つぎにこの第１図に示す実施例の動作を説明する。Next, the operation of the embodiment shown in FIG. 1 will be explained.
この第１図に示す回路において、位相同期状態がはずれ
る場合、すなわち、周波数位相比較器２の出力信号が低
域フィルタ６の帯域幅以上にはずれる場合と低域フィル
タ６の帯域幅以内ではずれる場合の２つが考えられる。In the circuit shown in FIG. 1, when the phase synchronization state is lost, that is, when the output signal of the frequency phase comparator 2 deviates beyond the bandwidth of the low-pass filter 6, and when the output signal deviates within the bandwidth of the low-pass filter 6. There are two possibilities.
まず、低域フィルタ６の帯域幅以上にはずれる場合を考
える。First, let us consider the case where the signal deviates beyond the bandwidth of the low-pass filter 6.
低域フィルタ６の帯域幅以上に位相同期がはずれると、
低域フィルタ６の出力制御信号はスイッチ回路１０のス
イッチ１に開にする。これと同時にホールド回路８の保
持状態を解く。If the phase synchronization goes beyond the bandwidth of the low-pass filter 6,
The output control signal of the low-pass filter 6 causes the switch 1 of the switch circuit 10 to open. At the same time, the holding state of the hold circuit 8 is released.
保持状態ｔＳかれたホールド回路８の出力電圧は電圧掃
引電圧そのものとなるため、加算器１１の出力電圧もま
た時間的に電圧が変化する掃引信号となる。この掃引信
号により電圧制御発振器５の出力信号周波数は変化し２
周波数変換器１の出力信号周波数ｔ−変化させる。この
変化した周波数変換器１の出力信号は再び周波数位相比
較器２により周波数位相比較される。Since the output voltage of the hold circuit 8 in the holding state tS becomes the voltage sweep voltage itself, the output voltage of the adder 11 also becomes a sweep signal whose voltage changes over time. This sweep signal changes the output signal frequency of the voltage controlled oscillator 5.
The output signal frequency t of the frequency converter 1 is varied. This changed output signal of the frequency converter 1 is again subjected to frequency phase comparison by the frequency phase comparator 2.
そして、この動作は連続的に行なわれるので。And this operation is done continuously.
電圧掃引回路Ｔの出力掃引電圧が変化するにつれである
時間後に周波数位相比較器２の出力信号周波数は低域フ
ィルタ６の帯域幅以内に入ることになる。As the output sweep voltage of the voltage sweep circuit T changes, the output signal frequency of the frequency phase comparator 2 will fall within the bandwidth of the low pass filter 6 after a certain time.
周波数位相比較器２の出力（３号周波数が低域フィルタ
６の帯域幅以内に入ると、低域フィルタ６は出力制御信
号を変化させ、ホールド回路８を保持状態にしてその時
点における出力電圧を保持する。When the output of the frequency phase comparator 2 (No. 3 frequency) falls within the bandwidth of the low-pass filter 6, the low-pass filter 6 changes the output control signal, puts the hold circuit 8 in the holding state, and adjusts the output voltage at that point. Hold.
この電圧を保持しただけでは、ｔだ低域フィルタ６の帯
域幅だけ所要の出力周波数と誤差がある丸め、ホールド
回路８ｔ−保持状態にするのと同時に低域フィルタ６の
出力制御信号によりスイッチ回路１０を閉じ、固定電圧
発生器９よりの出力電圧全史に加算器１１により加算す
る。以上の動作によりほぼ所要の出力周波数を得るとと
ができる。If only this voltage is held, the rounding and hold circuit 8 has an error from the required output frequency by the bandwidth of the low-pass filter 6. At the same time, the switch circuit is set to the holding state by the output control signal of the low-pass filter 6. 10 is closed, and the entire history of the output voltage from the fixed voltage generator 9 is added by the adder 11. By the above operation, almost the required output frequency can be obtained.
このとき、固定電圧発生器９の出力電圧は電圧制御発振
器５の電圧対周波数変化特性により低域フィルタ６の帯
域幅分の電圧値全設定しておく必要がある。At this time, the output voltage of the fixed voltage generator 9 needs to be set to a full voltage value corresponding to the bandwidth of the low-pass filter 6, depending on the voltage versus frequency change characteristic of the voltage controlled oscillator 5.
上記動作により、出力信号周波数はほぼ所要の周波数と
なっているため、負帰還動作による周波数制御はわずか
な部分で済むことになる。したがって、低域フィルタ６
の帯域幅および電圧掃引回路７の掃引時間対電圧変化を
適当に設定すること ”により、短時間で位相同期状態
が得られることになる。As a result of the above operation, the output signal frequency becomes approximately the required frequency, so that only a small portion of the frequency control is required by the negative feedback operation. Therefore, the low pass filter 6
By appropriately setting the bandwidth of the voltage sweep circuit 7 and the sweep time versus voltage change of the voltage sweep circuit 7, a phase synchronized state can be obtained in a short time.
つぎに、周波数位相比較器２の出力信号周波数が低域フ
ィルタ６の帯域幅金越えない位相はずれのときには、ホ
ールド回路８も保持状態を保ち。Next, when the output signal frequency of the frequency phase comparator 2 has a phase shift that does not exceed the bandwidth of the low-pass filter 6, the hold circuit 8 also maintains the holding state.
スイッチ回路１０も閉じていて固定電圧も印加され【い
るため、短時間のうちに位相同期状態となることは前述
の通りである。As described above, since the switch circuit 10 is also closed and a fixed voltage is applied, the phase synchronization state is achieved within a short time.
なお１周波数位相比較器の出力信号をアナログ・ディジ
タル変換器に取シ込み、論理回路を通してディジタルφ
アナログ変換器を接続し、その出力信号金電圧制御発撮
器の制御熾子に印加するようにしてディジタルフィルタ
を構成すれば、電圧掃引、掃引電圧の保持、固定電圧の
加算がすべて論理回路により可能となるため、回路的に
簡略化することができる。Note that the output signal of the 1-frequency phase comparator is input to an analog-to-digital converter, and the output signal is converted to digital φ through a logic circuit.
If you configure a digital filter by connecting an analog converter and applying its output signal to the control terminal of the voltage control generator, the voltage sweep, holding the sweep voltage, and adding the fixed voltage can all be done by logic circuits. This makes it possible to simplify the circuit.
以上説明し九ようＫ、本発明によれば、低域フィルタの
出力制御信号により掃引電圧を保持し。As described above, according to the present invention, the sweep voltage is maintained by the output control signal of the low-pass filter.
更に適当に設定された固定電圧を加算することにより、
短時間のうちに位相同期状態が得られる自動周波数制御
回路を実現することができるので、実用上の効果は極め
て大である。By further adding an appropriately set fixed voltage,
Since it is possible to realize an automatic frequency control circuit that can obtain a phase synchronized state within a short time, the practical effects are extremely large.
第１図は本発明による自動周波数制御回路の一実施例を
示すブロック図、第２図は従来の自動周波数制御回路の
一例を示すブロック図である。
１・・・・周波数変換器、２・・・・周波数位相比較器
、３・・・・基準信号発生器、４・・・・低域フィルタ
、５・・・・電圧制御発振器、６・・・・低域フィルタ
、Ｔ・・・・電圧掃引回路、８・・・・ホールド回路、
９・・・・固定電圧発生回路。１０・・・・スイッチ回
路、１１・・・・加算器。FIG. 1 is a block diagram showing an embodiment of an automatic frequency control circuit according to the present invention, and FIG. 2 is a block diagram showing an example of a conventional automatic frequency control circuit. 1... Frequency converter, 2... Frequency phase comparator, 3... Reference signal generator, 4... Low pass filter, 5... Voltage controlled oscillator, 6... ...Low pass filter, T...Voltage sweep circuit, 8...Hold circuit,
9...Fixed voltage generation circuit. 10... Switch circuit, 11... Adder.
Claims (1)
つて周波数変換を行ない得られる出力信号の１部を周波
数位相比較器に導き、基準信号発生器の出力信号との間
で周波数位相比較を行ない、その出力信号を第１の低域
フィルタに導き、この第１の低域フィルタにより誤差信
号のみを取り出すようになし、かつ時間的に出力電圧が
変化する電圧掃引回路と、この電圧掃引回路によつて得
られ掃引電圧を制御信号により保持するホールド回路と
、所要の周波数に応じて設定された固定電圧を出力信号
とする固定電圧発生回路と、この固定電圧発生回路によ
つて得られた固定電圧を制御信号により電気的に開閉す
るスイッチ回路と、前記第１の低域フィルタよりの誤差
信号と前記ホールド回路の出力信号および前記スイツチ
回路の出力信号とを電圧加算する加算器と、前記周波数
位相比較器の出力信号を入力とし出力制御信号により前
記ホールド回路およびスイッチ回路の制御を行なう第２
の低域フィルタとを備え、前記加算器の出力信号を前記
電圧制御発振器に負帰還し位相同期状態を得るようにし
たことを特徴とする自動周波数制御回路。A part of the output signal obtained by frequency converting the input signal and the output of the voltage controlled oscillator by a frequency converter is led to a frequency phase comparator, and a frequency phase comparison is performed between it and the output signal of the reference signal generator. A voltage sweep circuit which conducts a signal and guides its output signal to a first low-pass filter so that only an error signal is extracted by the first low-pass filter, and whose output voltage changes over time, and this voltage sweep circuit. A hold circuit holds the sweep voltage obtained by using a control signal, a fixed voltage generation circuit whose output signal is a fixed voltage set according to the required frequency, and a a switch circuit that electrically opens and closes a fixed voltage according to a control signal; an adder that adds the voltage of the error signal from the first low-pass filter, the output signal of the hold circuit, and the output signal of the switch circuit; A second circuit which receives the output signal of the frequency phase comparator and controls the hold circuit and the switch circuit by the output control signal.
and a low-pass filter, the automatic frequency control circuit comprising: a low-pass filter, the output signal of the adder being negatively fed back to the voltage controlled oscillator to obtain a phase synchronized state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61185299A JPS6342513A (en) | 1986-08-08 | 1986-08-08 | Automatic frequency control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61185299A JPS6342513A (en) | 1986-08-08 | 1986-08-08 | Automatic frequency control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6342513A true JPS6342513A (en) | 1988-02-23 |
| JPH0560689B2 JPH0560689B2 (en) | 1993-09-02 |
Family
ID=16168428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61185299A Granted JPS6342513A (en) | 1986-08-08 | 1986-08-08 | Automatic frequency control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6342513A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06204863A (en) * | 1993-01-06 | 1994-07-22 | Sony Corp | Pll circuit |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH081237U (en) * | 1993-09-22 | 1996-08-09 | 節治 中原 | Compressor that discharges in a direction other than the same direction as the compression direction |
-
1986
- 1986-08-08 JP JP61185299A patent/JPS6342513A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06204863A (en) * | 1993-01-06 | 1994-07-22 | Sony Corp | Pll circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0560689B2 (en) | 1993-09-02 |
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