JPS6359008A - Fm modulation circuit - Google Patents

Fm modulation circuit

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Publication number
JPS6359008A
JPS6359008A JP20228586A JP20228586A JPS6359008A JP S6359008 A JPS6359008 A JP S6359008A JP 20228586 A JP20228586 A JP 20228586A JP 20228586 A JP20228586 A JP 20228586A JP S6359008 A JPS6359008 A JP S6359008A
Authority
JP
Japan
Prior art keywords
signal
output
voltage
controlled oscillator
frequency divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20228586A
Other languages
Japanese (ja)
Inventor
Takeshi Toyoda
豊田 毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20228586A priority Critical patent/JPS6359008A/en
Publication of JPS6359008A publication Critical patent/JPS6359008A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To always bring a reference DC level of a modulation input signal to be at the center of an output frequency by changing the frequency division ratio of an output of a voltage controlled oscillator inputted to a phase comparator in response to a mean voltage of the modulation input signal by means of a variable frequency divider. CONSTITUTION:A mean voltage detection circuit 7 detects a mean voltage of a modulation signal inputted to the voltage controlled oscillator 1. Then the detected analog mean voltage is converted into a digital signal by an A/D converter 8 and the result is inputted to a variable frequency divider 6. Then the frequency dividing ratio of the variable frequency divider 6 is subject to variable control so as to be proportional to the mean voltage of the modulation signal. The phase comparator 2 compares the phase of the output of the variable frequency divider 6 with that of the output of the frequency divider 4 and controls the output (modulated signal) frequency of the said voltage controlled oscillator 1 linearly by feeding back the difference signal voltage in response to the phase difference to a control terminal of the voltage controlled oscillator 1. Thus, in modulating a modulation signal having asymmetry, the reference DC level of the modulation signal is the center of the output frequency.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はFM変調回路に関し、特にパルス信号またはテ
レビ信号等の非対称性を有する変調信号の復調時におけ
る直流レベルの変動を抑えたFM変調回路に関する。
Detailed Description of the Invention (Industrial Application Field) The present invention relates to an FM modulation circuit, and in particular to an FM modulation circuit that suppresses fluctuations in DC level during demodulation of asymmetric modulation signals such as pulse signals or television signals. Regarding.

(従来の技術) 第2150は、一般的な従来のFM変調回路の構成を示
したものであり、電圧制御発振器(VCO:Volta
ge Controlled 0scillator)
 1、位相比較器(P D : Phase Dete
ctor) 2、分周器3および4、基準信号発生器5
が具備されている。
(Prior Art) No. 2150 shows the configuration of a general conventional FM modulation circuit, which is a voltage controlled oscillator (VCO).
ge Controlled 0scillator)
1. Phase comparator (PD: Phase Dete)
ctor) 2, frequency dividers 3 and 4, reference signal generator 5
is equipped.

第2図のFM変調回路では、入力端子Tinより入力さ
れる変調信号を電圧制御発振器1を通して変調し、被変
調信号として出力端子T outに出力する変調処理に
際して、電圧制御発振器の出力を、分周比(1/N)が
固定された分周器3により分周して位相比較器2に入力
するとともに、他方、基準信号発生器5から出力きれた
基準信号を、前記分周器3と同様に分周比(1/M)が
固定された分周器4により分周した後、前記分周器3の
出力に対する比較入力として前記位相比較器2に入力し
ている。
In the FM modulation circuit shown in FIG. 2, the output of the voltage controlled oscillator is divided into two parts during the modulation process in which the modulated signal input from the input terminal Tin is modulated through the voltage controlled oscillator 1 and outputted to the output terminal T out as a modulated signal. The frequency is divided by the frequency divider 3 with a fixed frequency ratio (1/N) and inputted to the phase comparator 2, and the reference signal outputted from the reference signal generator 5 is also input to the frequency divider 3. Similarly, after being frequency-divided by a frequency divider 4 with a fixed frequency division ratio (1/M), it is input to the phase comparator 2 as a comparison input for the output of the frequency divider 3.

そして前記位相比較器2では、前記分周器3の出力と前
記分局器4の出力との位相を比較し、その位相差に応じ
た差信号電圧を前記電圧制御発振器1の制御端子に帰′
還させることによって前記被変調信号の周波数の安定化
を図っている。
The phase comparator 2 compares the phases of the output of the frequency divider 3 and the output of the divider 4, and returns a difference signal voltage corresponding to the phase difference to the control terminal of the voltage controlled oscillator 1.
By this, the frequency of the modulated signal is stabilized.

この種のFM変調回路では、変調信号として対称性を有
する信号を入力した場合、該信号の中心レベルからの変
動レベルに対応して出力(被変調信号)の周波数が増減
し、換言すれば変調信号の中心レベルが出力周波数のセ
ンタとなるべく動作する。
In this type of FM modulation circuit, when a symmetrical signal is input as a modulation signal, the frequency of the output (modulated signal) increases or decreases in response to the level of fluctuation from the center level of the signal. It operates so that the center level of the signal is the center of the output frequency.

これに対し変調信号としてパルス信号またはテレビ信号
等の直流成分を含んだ非対称性を有する信号を入力した
場合には、該信号の直流成分すなわち平均電圧が出力周
波数のセンタとなるべく動作する。
On the other hand, when an asymmetric signal containing a DC component such as a pulse signal or a television signal is input as a modulation signal, the DC component of the signal, that is, the average voltage, operates to be the center of the output frequency.

このため、当該出力(被変調信号)を受信側で復調した
ときには、当該復調出力に、前記変調信号の平均重圧に
対応した分の直流レベルの変動をきたすことになった。
Therefore, when the output (modulated signal) is demodulated on the receiving side, the demodulated output has a DC level fluctuation corresponding to the average pressure of the modulated signal.

(発明が解決しようとする問題点) このように上記従来のFM変調回路では、パルス信号ま
たはテレビ信号等の非対称性を有する変調信号を入力し
た場合、該変調信号の平均電圧が被変調信号の周波数の
センタとなるべく動作するため、受信側で復調したとき
に復調出力の直流レベルが変動し、変調信号と一致する
復調出力が得られないという問題点があった。
(Problems to be Solved by the Invention) As described above, in the above-mentioned conventional FM modulation circuit, when a modulation signal having asymmetry such as a pulse signal or a television signal is input, the average voltage of the modulation signal is higher than that of the modulated signal. Since it operates as much as possible at the center of the frequency, there is a problem in that the DC level of the demodulated output fluctuates when it is demodulated on the receiving side, making it impossible to obtain a demodulated output that matches the modulated signal.

(問題点を解決するための手段) 本発明のFM変調回路は、変調信号を入力とし、被変調
信号を出力とする電圧制御発振器と、該電圧制御発振器
に入力される前記変調信号の平均電圧を検出する平均電
圧検出回路と、該平均電圧検出回路の検出出力に応じて
分周比を可変設定し、該設定した分周比により前記電圧
制御発振器の出力を分周する可変分周器と、基準信号を
発生する基準信号発生器と、該基準信号発生器から発生
する基準信号を固定分周比で分周する分局器と、前記可
変分周器の出力と前記分局器の出力との位相を比較し、
該位相差に応じた差信号電圧を前記電圧制御発振器の制
御端子に帰還する位相比較器とを具備して構成されてい
る。
(Means for Solving the Problems) The FM modulation circuit of the present invention includes a voltage controlled oscillator which inputs a modulation signal and outputs a modulated signal, and an average voltage of the modulation signal input to the voltage controlled oscillator. and a variable frequency divider that variably sets a frequency division ratio according to the detection output of the average voltage detection circuit and divides the output of the voltage controlled oscillator according to the set frequency division ratio. , a reference signal generator that generates a reference signal, a divider that divides the reference signal generated from the reference signal generator at a fixed frequency division ratio, and an output of the variable frequency divider and an output of the divider. Compare the phases,
The oscillator is configured to include a phase comparator that feeds back a difference signal voltage corresponding to the phase difference to a control terminal of the voltage controlled oscillator.

(作用) 本発明のFM変調回路では、位相比較器に入力される電
圧制御発振器の出力の分周比を、可変分周器により変調
入力信号の平均電圧に応じて変化させることにより、当
該変調入力信号の基準直流レベルが、常に出力(被変調
信号)M波数のセンタとなるように動作きせるようにし
ている。
(Function) In the FM modulation circuit of the present invention, the frequency division ratio of the output of the voltage controlled oscillator that is input to the phase comparator is changed according to the average voltage of the modulation input signal by the variable frequency divider. The operation is made such that the reference DC level of the input signal is always at the center of the output (modulated signal) M wave number.

(実施例) 以下、本発明の実施例を添付図面にもとづいて詳細に説
明する。
(Example) Hereinafter, an example of the present invention will be described in detail based on the accompanying drawings.

第1図は、本発明に係るFM変調回路の一実施例を示し
たものであり、第2図に示した従来の、FM変調回路の
各部と同様の機能を果たすものについては同一の符号を
符している。
FIG. 1 shows an embodiment of the FM modulation circuit according to the present invention, and parts that perform the same functions as the conventional FM modulation circuit shown in FIG. 2 are designated by the same reference numerals. It is marked.

第1図において、電圧制御発振器1の出力側と位相比較
器2との間には、新たに可変分周器6が接続されている
In FIG. 1, a variable frequency divider 6 is newly connected between the output side of the voltage controlled oscillator 1 and the phase comparator 2.

また電圧制御発振器1の入力側と前記可変分周器6間に
は、当該可変分局器6の分周比を可変制御するための手
段として、平均電圧検出回路7とA/D変換器8とが接
続されている。
Furthermore, an average voltage detection circuit 7 and an A/D converter 8 are connected between the input side of the voltage controlled oscillator 1 and the variable frequency divider 6 as means for variably controlling the frequency division ratio of the variable frequency divider 6. is connected.

このFM変調回路では、入力端子Tinより入力される
変調信号を電圧制御発振器1を通して変調し、被変調信
号として出力端子T outに出力する変調処理に際し
、平均電圧検出回路7により電圧制御発振器1に入力さ
れる変調信号の平均電圧を検出するとともに、該検出さ
れた平均電圧を、更にA/D変換器8によりアナログ信
号からディジタル信号に変換してから可変分周器6に入
力し、当該可変分周器6の分周比を、前記変調信号の平
均電圧に比例するように可変制御している。
In this FM modulation circuit, the modulation signal inputted from the input terminal Tin is modulated through the voltage controlled oscillator 1, and during the modulation process to be outputted to the output terminal T out as a modulated signal, the average voltage detection circuit 7 modulates the modulated signal inputted to the voltage controlled oscillator 1. The average voltage of the input modulation signal is detected, and the detected average voltage is further converted from an analog signal to a digital signal by the A/D converter 8, and then input to the variable frequency divider 6. The frequency division ratio of the frequency divider 6 is variably controlled so as to be proportional to the average voltage of the modulation signal.

このため、電圧制御発振器の1の出力は、可変分周器6
を通る際、前述した如<A/D変換器8の出力に応じて
設定された分周比により分周きれた後、位相比較器2に
入力される。
Therefore, the output of the voltage controlled oscillator 1 is the output of the variable frequency divider 6
As described above, the signal is divided by the frequency division ratio set according to the output of the A/D converter 8, and then input to the phase comparator 2.

一方、基準信号発生器5かも出力された基準信号は、分
周器4を経て固定きれた分周比(1/M)により分周さ
れた後、前記位相比較器2に入力される。
On the other hand, the reference signal output from the reference signal generator 5 is input to the phase comparator 2 after being frequency-divided by a fixed frequency division ratio (1/M) via a frequency divider 4.

そして位相比較器2は、前記可変分周器6の出力と前記
分周器4の出力との位相を比較し、該位相差に応じた差
信号電圧を前記電圧制御発振器1の制御端子に帰還させ
ることによって、該電圧制御発振器1の出力(被変調信
号)周波数を直線的に制御する。
Then, the phase comparator 2 compares the phases of the output of the variable frequency divider 6 and the output of the frequency divider 4, and feeds back a difference signal voltage corresponding to the phase difference to the control terminal of the voltage controlled oscillator 1. By doing so, the output (modulated signal) frequency of the voltage controlled oscillator 1 is linearly controlled.

なお、平均電圧検出回路7およびA/D変換器8により
可変分周器6の分周比を変調信号の平均電圧に比例して
可変制御するにあたっては、該変調信号の平均電圧レベ
ルが変わった場合にも、当該変調信号の基準直流レベル
が、常に出力周波数のセンタとなるべく動作するように
留意する必要がある。
Note that when the average voltage detection circuit 7 and the A/D converter 8 variably control the frequency division ratio of the variable frequency divider 6 in proportion to the average voltage of the modulation signal, the average voltage level of the modulation signal is changed. In this case, care must be taken so that the reference DC level of the modulation signal always operates at the center of the output frequency.

係る制御によって本発明のFM変調回路では、パルス信
号またはテレビ信号等の非対称性を有する信号を変調し
た場合にも、該被変調信号を受信側で復調したときの当
該復調信号の直流レベルを常に一定の値に維持すること
ができる。
Through such control, the FM modulation circuit of the present invention always maintains the DC level of the demodulated signal when the modulated signal is demodulated on the receiving side, even when modulating an asymmetric signal such as a pulse signal or a television signal. Can be maintained at a constant value.

また、対称性を有する信号を変調した場合には、変調信
号の平均電圧は0レベルであることから、該変調信号の
中心レベルが出力周波数のセンタとなるべく動作し、従
来通りの変調処理を行なうことができる。
Furthermore, when a symmetrical signal is modulated, the average voltage of the modulated signal is 0 level, so the center level of the modulated signal operates as the center of the output frequency, and the conventional modulation process is performed. be able to.

(発明の効果) 以上説明したように本発明のFM変調回路によれば、電
圧制御発振器の出力に接続された可変分周器の分周比を
変調信号の平均電圧に応じて可変制御し、非対称性を有
する変調信号を変調する際にも当該変調信号の基準直流
レベルが出力周波数のセンタとなるべく動作させるよう
にしたため、このときの被変調信号を復調したときに、
該復調出力の直流レベルの変動を抑えることができ、変
調信号と一致する復調出力を得ることができるという優
れた効果を有する。
(Effects of the Invention) As explained above, according to the FM modulation circuit of the present invention, the frequency division ratio of the variable frequency divider connected to the output of the voltage controlled oscillator is variably controlled according to the average voltage of the modulation signal, Even when modulating a modulated signal with asymmetry, the reference DC level of the modulated signal is operated as much as possible at the center of the output frequency, so when the modulated signal at this time is demodulated,
This has an excellent effect in that fluctuations in the DC level of the demodulated output can be suppressed and a demodulated output that matches the modulated signal can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係るFM変調回路の一実施例を示すブ
ロック図、第2図は従来のFM変調回路の構成を示すブ
ロック図である。 1・・・電圧制御発振器(VCO)、2・・・位相比較
器(PD)、3,4・・・分周器、5・・・基準信号発
生器、6・・・可変分周器、7・・・平均電圧検出回路
、8・・・A/D変換器。
FIG. 1 is a block diagram showing an embodiment of an FM modulation circuit according to the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional FM modulation circuit. 1... Voltage controlled oscillator (VCO), 2... Phase comparator (PD), 3, 4... Frequency divider, 5... Reference signal generator, 6... Variable frequency divider, 7... Average voltage detection circuit, 8... A/D converter.

Claims (1)

【特許請求の範囲】[Claims] 変調信号を入力とし被変調信号を出力とする電圧制御発
振器と、該電圧制御発振器に入力される前記変調信号の
平均電圧を検出する平均電圧検出回路と、該平均電圧検
出回路の検出出力に応じて分周比を可変設定し、該設定
した分周比により前記電圧制御発振器の出力を分周する
可変分周器と、基準信号を発生する基準信号発生器と、
該基準信号発生器から発生する基準信号を固定分周比で
分周する分周器と、前記可変分周器の出力と前記分周器
の出力との位相を比較し、該位相差に応じた差信号電圧
を前記電圧制御発振器の制御端子に帰還する位相比較器
とを具備することを特徴とするFM変調回路。
a voltage-controlled oscillator that receives a modulation signal as an input and outputs a modulated signal; an average voltage detection circuit that detects an average voltage of the modulation signal that is input to the voltage-controlled oscillator; a variable frequency divider that variably sets a frequency division ratio and divides the output of the voltage controlled oscillator according to the set frequency division ratio, and a reference signal generator that generates a reference signal;
A frequency divider that divides the reference signal generated from the reference signal generator at a fixed frequency division ratio, and a phase difference between the output of the variable frequency divider and the output of the frequency divider, and according to the phase difference. and a phase comparator that feeds back a differential signal voltage to a control terminal of the voltage controlled oscillator.
JP20228586A 1986-08-27 1986-08-27 Fm modulation circuit Pending JPS6359008A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20228586A JPS6359008A (en) 1986-08-27 1986-08-27 Fm modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20228586A JPS6359008A (en) 1986-08-27 1986-08-27 Fm modulation circuit

Publications (1)

Publication Number Publication Date
JPS6359008A true JPS6359008A (en) 1988-03-14

Family

ID=16455003

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20228586A Pending JPS6359008A (en) 1986-08-27 1986-08-27 Fm modulation circuit

Country Status (1)

Country Link
JP (1) JPS6359008A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02124607A (en) * 1988-11-02 1990-05-11 Matsushita Electric Ind Co Ltd Synthesized signal generator
JPH04505841A (en) * 1989-03-27 1992-10-08 モトローラ・インコーポレーテッド Frequency synthesizer with FM modulation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02124607A (en) * 1988-11-02 1990-05-11 Matsushita Electric Ind Co Ltd Synthesized signal generator
JPH04505841A (en) * 1989-03-27 1992-10-08 モトローラ・インコーポレーテッド Frequency synthesizer with FM modulation

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