JPH08186451A - Feed-forward amplifier - Google Patents

Abstract

PURPOSE: To make a control circuit common for an error detection loop and an error removal loop and to compensate distortion generated at a main amplifier without depending on a radio frequency band to be used. CONSTITUTION: Frequency converters 50 and 51 receive signals respectively branching two input signals to power synthesizers 41 and 42 for error detection as input signals and the frequencies of these signals are converted to other frequencies while synchronizing phases so as not to change the mutual phase relation. Band filters 70 and 71 are respectively filter circuits whose passing center frequencies are respectively set at the same f2, receive the output signals of power synthesizers 43 and 44 as input signals and supply frequency selected signals to an inverse phase synthesization control circuit 100. The inverse phase synthesization control circuit 100 controls vector modulators 20 and 21 and controls the oscillation frequencies of oscillators 81 and 82 so as to alternately switch them to first and second frequencies.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a feedforward amplifier, and more particularly to a feedforward amplifier for a radio device, which suppresses distortion generated in an amplifier for high frequency amplification.

[0002]

2. Description of the Related Art In general, a feedforward amplifier is
A configuration in which distortion in an amplifier output signal generated by simultaneously amplifying a multi-frequency input signal is detected by an error detection loop, the detection error (distortion) is suppressed by an error removal loop, and the amplified multi-frequency input signal is output. And its basic structure is already known from the literature (eg H. SEID
EL et al. : "Error-Control
ed High Power Linear Ampl
ifers at VHF ", The Bell S
system Technical Journal, 4
7, No. 5, May-June 1968). Also,
Various automatic adjustment methods for automatically achieving the balance of the loop of the feedforward amplifier have been conventionally proposed (for example, JP-A-1-198809).

Such a feedforward amplifier is suitable for application to a radio communication device in a high frequency band in which it is difficult to improve the nonlinear distortion of the amplifier by a method such as negative feedback. Here, when the equal amplitude / opposite phase synthesis in the error detection loop and the error removal loop is performed by automatic control, a method of monitoring the synthesized signal and a method of monitoring two signals input to the synthesizer are performed. There is a method. The present invention relates to the latter type of feedforward amplifier.

FIG. 5 is a block diagram showing an example of a conventional feedforward amplifier of the latter type. In the figure, the input signal of the center frequency f0 is branched into two, one is input to the main amplifier 10 and the other is input to the power combiner 41 through the delay line 30. The input signal amplified by the main amplifier 10 contains distortion generated by the non-linear characteristic of the main amplifier 10, and the output signal of the main amplifier 10 is supplied to the power combiner 40 to compensate for this distortion. Is added and synthesized with the pilot signal of frequency f1 generated by the oscillator 80.

The output signal of the main amplifier 10 obtained by adding and synthesizing the pilot signals extracted from the power combiner 40 is branched into two, one of which is input to the power combiner 42 through the delay line 31 and the other of which has the phase and the phase of the signal. It is input to the vector modulator 20 for controlling the amplitude. Vector modulator 2
The signal whose phase and amplitude are controlled by 0 is supplied to the power combiner 41, where it is combined with the input signal of the main amplifier 10 delayed by the delay line 30 in equal amplitude and opposite phase (phase difference 180 °). . Here, the delay line 30 prevents the delay time from the input to the power combiner 41 from being different between the path branched from the input side of the main amplifier 10 and the path branched from the output side of the main amplifier 10. Has been adjusted.

As a result, the power combiner 41 extracts an error signal obtained by extracting the distortion component generated in the main amplifier 10. This error signal is supplied to the second vector modulator 21, and its phase and amplitude are described later in the power combiner 4.
2 is equal to the distortion component in the output amplified signal of the main amplifier 10
After being controlled so as to have the opposite phase, it is input to the error amplifier 11. The error signal amplified by the error amplifier 11 is supplied to the power combiner 42, where it is combined with the combined signal of the output amplified signal of the main amplifier 10 input through the delay line 31 and the pilot signal. 10
The distortion component in the output amplified signal is suppressed and extracted.

In the error detection loop, suppression of signal components by equal-amplitude / anti-phase synthesis for distortion component extraction, and suppression of distortion components by equal-amplitude / anti-phase synthesis in the error removal loop are always stable. In order to perform the above, the vector modulator 20 and the vector modulator 21 automatically perform the phase / amplitude control to maximize the signal suppression amount in the error detection loop and the error suppression amount in the error removal loop. is necessary.

Therefore, conventionally, two input signals to the power combiner 41 for extracting a distortion component (error signal) by performing signal suppression in an error detection loop are branched, and the input signal component is divided from each branch signal. Of the bandpass filters 72 and 73 each having a pass center frequency f0 and a phase difference and a power level difference between the extracted signals, and a method for reducing the phase difference and the power level difference. Reverse-phase synthesis control circuit 101 for controlling the vector modulator 20
have.

Similarly, in this conventional feedforward amplifier, an error removal loop is used to suppress the error and extract a signal component with less distortion into the power combiner 42.
A bandpass filter 74 having a pass center frequency f1 for branching the two input signals and extracting the pilot signals combined by the power combiner 40 from the respective branch signals.
75 and a phase difference control circuit that detects the phase difference and the power level difference between the two signals whose frequencies are selected by the bandpass filters 74 and 75, and controls the vector modulator 21 in the direction to reduce the phase difference and the power level difference. It has 102.

[0010]

However, the conventional feedforward amplifier described above controls the vector modulator 20 for suppressing the signal in the error detection loop and the vector modulator for suppressing the distortion component in the error removing loop. There is a problem that the scale of the control circuit is large because the control of 21 is independently provided with the bandpass filters 72, 73 and 74, 75 and the anti-phase synthesis control circuits 101, 102 having different pass center frequencies.

Further, in the conventional feedforward amplifier, the frequency of the component to be detected for controlling the error detection loop and the frequency of the component to be detected for controlling the error removal loop are the inputs of the feedforward amplifier. Since it depends on the frequency of the signal, there is also a problem that a bandpass filter having a pass center frequency that differs depending on the frequency band used and an anti-phase synthesis control circuit corresponding to the frequency band used are required.

The present invention has been made in view of the above points,
An object of the present invention is to provide a feedforward amplifier that can share a control circuit for an error detection loop and an error removal loop.

Another object of the present invention is to provide a feedforward amplifier that does not depend on the input signal frequency band.

[0014]

In order to achieve the above object, the present invention comprises a main amplifier for amplifying an input signal to a desired amplitude, and a pilot signal synthesizing means for synthesizing a pilot signal with an output amplified signal of the main amplifier. , A first vector modulator for controlling the phase and amplitude of the output signal of the pilot signal synthesizing unit, the output signal of the first vector modulator and the input signal of the main amplifier are time-combined, and then the power is synthesized. First power combining means for detecting an error, second vector modulator for controlling the phase and amplitude of the output signal of the first power combining means, and error amplifier for amplifying the output signal of the second vector modulator And a second power combining means for time-matching the output signal of the error amplifier and the output signal of the pilot signal combining means, and performing power combining to output an amplified signal in which an error is suppressed; and a first power. A first frequency converter that separately converts the two signals that are combined by the generating unit to the same frequency and outputs the signals in the state where the phase difference relationship is maintained, and a second power combining unit that combines the two signals. A second frequency converter which outputs the signals separately and frequency-converted to the same frequency as the conversion frequency of the first frequency converter while maintaining a mutual phase difference relationship; and a first frequency converter Selecting means for alternately selecting the output 2 signal of the second frequency converter and the output 2 signal of the second frequency converter, and outputting the two signals output from the signal selecting means of the first and second frequency converters. Outputs from the first and second filter circuits when the output signal of the first frequency converter is selected by the signal selecting means, and the first and second filter circuits are set so as to select the frequency of the signal component of the conversion frequency. Be done The phase shift amount and the attenuation amount of the first vector modulator are controlled based on the comparison result obtained by comparing the phase and the amplitude of the signal, and the second frequency conversion is performed by the signal selecting means. Of the second vector modulator so that the phase and the amplitude become smaller based on the comparison result obtained by comparing the phases and the amplitudes of the signals output from the first and second filter circuits when the output signal of the modulator is selected. The configuration includes a reverse phase synthesis control circuit that controls the phase amount and the attenuation amount.

[0015]

According to the present invention, the two signals combined by the first power combining means are supplied to the first frequency converter for frequency conversion, and the two signals combined by the second power combining means are respectively converted into the second signals. The signal is supplied to the second frequency converter for frequency conversion, one of the output signals of the first and second frequency converters is selected by the signal selecting means, and the reverse phase synthesis is performed through the first and second filter circuits. Supply to the control circuit,
Since the phase and amplitude of the two input signals are compared with each other by the anti-phase synthesis control circuit and the first or second vector modulator is controlled so that the phase difference and the amplitude difference become smaller, the anti-phase synthesis control is performed. The circuit can be shared by the error detection loop and the error removal loop.

Further, according to the present invention, since the first and second frequency converters perform frequency conversion to the pass center frequency of the first and second filter circuits, the first and second frequency converters do not depend on the input signal frequency. It is possible to share the first and second filter circuits and the control circuits of the first and second vector modulators.

[0017]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 shows a block diagram of a first embodiment of the present invention. In the figure, the same components as those in FIG. 5 are designated by the same reference numerals. As shown in FIG. 1, in the present embodiment, the main amplifier 10,
An error detection loop including a power combiner 40, an oscillator 80, a vector modulator 20, a delay line 30, and a power combiner 41, a delay line 31, a power combiner 42, and a vector modulator 2
0, a power combiner 41, a vector modulator 21, and an error amplifier 11, an error removal loop, frequency converters 50 and 51, signal selecting means 60 and 61, bandpass filters 70 and 71, and an anti-phase combining control circuit. It is composed of 100.

The frequency converter 50 receives, as an input signal, a signal obtained by branching the two input signals to the power combiner 41 for detecting an error, and the input signal center frequency f0 is phased to another predetermined frequency f2. It is a circuit that performs frequency conversion in phase synchronization so as not to change the relationship, and is composed of frequency mixers 90 and 91 and an oscillator 81. Similarly, the other frequency converter 51 receives, as an input signal, a signal obtained by branching the two input signals to the power combiner 42 for error removal, and determines the pilot signal frequency f1 in the input signal as the above-mentioned predetermined value. It is a circuit for performing frequency conversion in phase synchronization so as not to change the mutual phase relationship to the frequency f2, and is composed of frequency mixers 92 and 93 and an oscillator 82.

The signal selecting means 60 and 61 are the power combiner 4
3 and 44. In addition, the bandpass filter 7
Reference numerals 0 and 71 respectively denote filter circuits having the same pass center frequency set to f2, which receives the output signals of the power combiners 43 and 44 as input signals and supplies the frequency-selected signals to the anti-phase combining control circuit 100 described later. To do. The anti-phase synthesis control circuit 100 controls the vector modulators 20 and 21 and controls the oscillation frequencies of the oscillators 81 and 82 to be alternately switched between the first frequency and the second frequency.

Next, the operation of this embodiment will be described.
Main amplifier 10 with group delay time adjusted by delay line 30
Input signal is divided into two, one is supplied to the power combiner 41, and the other is supplied to the frequency mixer 90 in the frequency converter 50 to be multiplied by the oscillation frequency from the oscillator 81 to obtain f0. The frequency is converted to f1. In addition, the signal extracted from the vector adjuster 20 is branched into two, one of which is supplied to the power combiner 41 and the other of which is supplied to the frequency mixer 91 to be multiplied by the oscillation frequency of the oscillator 81. The frequency of f0 is converted to f2.

On the other hand, the multiplexed signal of the output signal of the main amplifier 10 and the pilot signal, the group delay time of which is adjusted by the delay line 31, is branched into two, one is supplied to the power combiner 42, and the other is frequency-converted. Frequency mixer 92 in the device 51
And f1 is subjected to a multiplication with the oscillation frequency from the oscillator 82, and f1 is frequency-converted into f2. The output signal of the error amplifier 11 is branched into two, one of which is the power combiner 42.
Is supplied to the frequency mixer 9, and the other is supplied to the frequency mixer 9 to be multiplied by the oscillation frequency from the oscillator 82 to perform frequency conversion of f1 into f2.

The power combiner 43 includes frequency mixers 90 and 9
The signal obtained by combining the output signals of 3 is the bandpass filter 7
It is supplied to the reverse phase synthesis control circuit 100 through 0. Also,
The power combiner 44 supplies the signals obtained by combining the output signals of the frequency mixers 91 and 92 to the anti-phase combining control circuit 100 through the bandpass filter 71.

Here, the anti-phase synthesis control circuit 100 has the frequency f2 selected by the bandpass filters 70 and 71.
The phase difference and the power level difference are detected based on the components, and the vector modulators 20 and 21 are arranged to reduce the difference between them.
And a frequency range in which the oscillation frequencies of the oscillators 81 and 82 are different from the first oscillation frequency in which the output signal frequencies of the frequency mixers 90 to 93 are converted into f2 and output. Filters 70 and 7
The control is performed to alternately switch to the second oscillation frequency that is outside the pass frequency band of 1.

That is, the anti-phase synthesis control circuit 100 receives the conversion frequency f2 from one of the frequency converters 50 and 51.
Is controlled so that a predetermined conversion frequency other than the conversion frequency f2 is output from the other, and the frequency converter that outputs the conversion frequency f2 is alternately switched. As a result, the frequency converter 50
During the period in which the conversion frequency f2 is output from the power combiner 4
The signals supplied from 3 and 44 to the anti-phase synthesis control circuit 100 through the bandpass filters 70 and 71 are the frequency converter 50.
Which is a signal from the error detection loop, the anti-phase synthesis control circuit 100 detects the phase difference and the power difference of the signal in the error detection loop based on this signal, and detects the phase difference and the power level difference. Vector modulator 2
The phase shift amount and the attenuation amount of 0 are controlled.

The conversion frequency f from the frequency converter 51
During the period when 2 is output, the anti-phase combining control circuit 100 is passed from the power combiners 43 and 44 through the bandpass filters 70 and 71.
The signal supplied to the frequency converter 51 is a signal output from the error removal loop, and based on this signal, the anti-phase synthesis control circuit 100 detects the phase difference and the power difference between the signals in the error removal loop. The phase shift amount and the attenuation amount of the vector modulator 21 are controlled in the direction of reducing the phase difference and the power level difference.

As described above, in this embodiment, the signals for controlling the conversion frequency are supplied to the frequency converters 50 and 51 so that the branch signal from the error detection loop and the branch signal from the error removal loop are switched alternately. The control of the error detection loop and the control of the error removal loop are switched at the same time for the signal sent out and input.

FIG. 2 is a block diagram showing the embodiment of FIG. 1 more specifically. The same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. As shown in FIG. 2, in this embodiment, a hybrid transformer 50 is used for branching and combining signals.
1 to 513, the vector modulators 20 and 21 have a configuration in which one variable attenuator 300, 301 and one variable phase shifter 400, 401 are connected in cascade. Of the hybrid transformers 501 to 513, the hybrid transformers 502, 509, 504, 512
And 513 are power combiners 40, 41, 42, 4 respectively.
3 and 44, and another hybrid transformer constitutes a branch point.

FIG. 3 shows a first embodiment of the present invention shown in FIGS.
The block diagram of an example of the reverse phase synthesis control circuit 100 in an Example is shown. This anti-phase synthesis control circuit 100 is an anti-phase synthesis control circuit 101, 102 for a conventional feedforward amplifier.
It has the same functions as phase comparison, power level comparison, variable phase shifter control, variable attenuator control, etc. in addition to this for switching between error detection loop control and error removal loop control. Control voltage generation circuits 1090 and 1091 for generating control voltages to the oscillators 82 and 81 of the above, and the variable phase shifters in the vector modulators 20 and 21 for comparing the phase comparison result and the power level comparison result with the switching of the input signal. And a D flip-flop 105 held for each variable attenuator
0 to 1053 and the frequency divider 107 that determines the switching cycle
0 and an inverter 1060 that inverts the output signal of the frequency divider 1070 to generate a timing signal having a phase difference of 180 ° are added.

Next, the operation of the anti-phase synthesis control circuit 100 will be described. First, two signals, which are frequency-selected by the bandpass filters 70 and 71, respectively, which are input to control the loop, are the variable gain amplifiers 1000 and 1.
001 is supplied. Variable gain amplifier 1000, 100
1 is a detector 1020, 102 for detecting the output signal
1 and AGC control circuits 1010 and 1011 that variably control the gains of the variable gain amplifiers 1000 and 1001 by amplifying the output detection signals of the detectors 1020 and 1021 to form an automatic gain control (AGC) amplification circuit.

As a result, the variable gain amplifiers 1000, 1
The signal supplied to 001 is a variable gain amplifier 1000,
The signal is amplified from 1001 to a constant level suitable for phase comparison, and then supplied to the phase comparator 1040 for phase comparison.
The phase detection voltage corresponding to the phase difference between the input signals extracted from the phase comparator 1040 is supplied to the voltage comparator 1030, where it is level-compared with the reference voltage of 0 V to determine whether it is positive or negative.

On the other hand, the AGC control circuits 1010 and 101
A having a voltage value corresponding to the input level extracted from 1
The GC control voltage is supplied to the voltage comparator 1031 for level comparison and is extracted as power level difference information. The signals indicating the phase difference information extracted from the voltage comparator 1030 are input to the data terminals of the D flip-flops 1050 and 1051, respectively. In addition, the voltage comparator 103
The signals indicating the power level difference information extracted from 1 are input to the data terminals of the D flip-flops 1052 and 1053, respectively.

D flip-flops 1050 and 1052
Respectively latch the input of the data terminal at the leading edge of the signal obtained by dividing the output clock pulse of the oscillator 1080 by the frequency divider 1070, and the D flip-flops 1051 and 1
053 latches the input of the data terminal at the leading edge of the signal obtained by inverting the phase of the output signal of the frequency divider 1070 by the inverter 1060. Therefore, the D flip-flop 105
0 and 1052 and D flip-flops 1051 and 10
53 is an input signal alternately latched every half cycle of the output signal of the frequency divider 1070.

The control voltage generating circuit 1091 is driven by the output signal of the frequency divider 1070, and the inverter 106
When the control voltage generation circuit 1090 is driven by the output signal of 0, the control voltage supplied from the control voltage generation circuit 1091 to the oscillator 81 and the control voltage generation circuit 1090.
The control voltage supplied to the oscillator 82 from the frequency divider 10
The output signal of 70 is alternately taken out every half cycle, and the oscillation frequencies of the oscillators 81 and 82 are alternately switched.

Up-down (U / D) counter 1100
To 1103 are D flip-flops 1050 to 1050, respectively.
Based on the determination result held in 1053, the oscillator 10
Up-count or down-count clock pulses from 80. The output count values of the U / D counters 1100 and 1101 are read only memory (ROM) 111.
The phase shift control data of the in-phase component and the quadrature component are generated by being supplied to the address terminals of 0 and 1111.

The output phase shift control data of the ROM 1110 is
After being supplied to the D / A converters 1120 and 1121 and converted into analog signals, they are supplied to the variable phase shifter 300 shown in FIG. 2 to control the amount of phase shift. Also, R
The output phase shift control data of the OM 1111 is supplied to the D / A converters 1122 and 1123 and converted into an analog signal, and then supplied to the variable phase shifter 301 shown in FIG. 2 to control the amount of phase shift.

On the other hand, U / D counters 1102 and 1103
Output count value of D / A converters 1124, 1125
After being converted into analog control voltage respectively by
Are supplied to the variable attenuators 400 and 401 shown in FIG. 1 to control the amount of attenuation.

As described above, in the first embodiment of the present invention shown in FIGS. 1 to 3, the power combiners 41 and 4 for combining equal amplitudes and opposite phases performed by the error detection loop and the error removal loop.
The frequency converters 50 and 51 are used to convert the two input signals from
By separately performing frequency conversion into the frequency f2 and the other frequencies, the control circuit of the vector modulators 20 and 21 in the error detection loop and the error removal loop and the band-pass filters 70 and 71 for comparison in both loops. Since they can be shared, the circuit scale for the control circuit can be reduced. Further, even if the center frequency of the input signal is changed, the output oscillation frequencies of the oscillators 81 and 82 are alternately switched so that the conversion frequency becomes a frequency different from f2.
The center frequency can be easily changed.

Next, a second embodiment of the present invention will be described. FIG. 4 shows a block diagram of the second embodiment of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and their description will be omitted. In this embodiment, the oscillators 83 and 84 in the frequency converters 50 and 51 respectively oscillate a constant frequency, and the signal selecting means 60 and 61 are composed of the signal switchers 200 and 201.

The signal switch 200 selects one of the output signals of the frequency mixers 90 and 93 by the output signal of the anti-phase synthesis control circuit 100. The signal switch 201 selects one of the output signals of the frequency mixers 91 and 92 by the output signal of the anti-phase synthesis control circuit 100.

In the present embodiment, the signals converted into the frequency f2 are always taken out from the frequency converters 50 and 51 and supplied to the signal switchers 200 and 201. Here, the connection state shown in FIG. The signal from the loop is supplied to the anti-phase synthesis control circuit 100 through the bandpass filters 70 and 71, and the signal from the error detection loop is supplied to the bandpass filters 70 and 71 in the connection state opposite to that shown in the drawing. This operation is repeated alternately. Therefore, similarly to the first embodiment, in this embodiment, the control circuits of the vector modulators 20 and 21 in the error detection loop and the error removal loop and the bandpass filters 70 and 71 for comparison can be shared in both loops. The circuit scale of the control circuit can be reduced.

[0041]

As described above, according to the present invention,
Since the anti-phase synthesis control circuit can be shared by the error detection loop and the error removal loop, and the control circuits of the first and second filter circuits and the first and second vector modulators can be shared, The circuit scale of the anti-phase control circuit can be made smaller than before.

Further, according to the present invention, the control circuits of the first and second filter circuits and the first and second vector modulators can be shared without depending on the frequency of the input signal. Distortion compensation can be performed by the same circuit configuration regardless of the frequency band used, and versatility can be significantly improved compared to the conventional case.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment of the present invention.

FIG. 2 is a specific configuration diagram of the embodiment shown in FIG.

FIG. 3 is a configuration diagram of an example of a reverse phase synthesis control circuit in FIG.

FIG. 4 is a configuration diagram of a second embodiment of the present invention.

FIG. 5 is a configuration diagram of an example of a conventional device.

[Explanation of symbols]

 10 main amplifier 20 1st vector modulator 21 2nd vector modulator 30, 31 delay line 40, 41, 42, 43, 44 power combiner 50 1st frequency converter 51 2nd frequency converter 60, 61 signal selection means 70,71 bandpass filter 81-84 oscillator 90-93 frequency mixer 100 anti-phase synthesis control circuit 200,201 signal switcher

Claims (3)

[Claims] 1. A main amplifier for amplifying an input signal to a desired amplitude, a pilot signal synthesizing means for synthesizing a pilot signal with an output amplified signal of the main amplifier, and a phase and an amplitude of an output signal of the pilot signal synthesizing means. A first vector modulator for controlling; and a first power combining means for detecting the error by time-combining the output signal of the first vector modulator and the input signal of the main amplifier and then combining the powers. A second vector modulator for controlling the phase and amplitude of the output signal of the first power combiner, an error amplifier for amplifying the output signal of the second vector modulator, and an output signal of the error amplifier Second power combining means for time-matching the output signal of the pilot signal combining means, and power combining to output an amplified signal in which an error is suppressed, and the first power combining means for combining. A first frequency converter for frequency-converting and outputting the two signals separately to the same frequency while maintaining a phase difference relationship with each other; and two signals synthesized by the second power synthesizing means, respectively. And a second frequency converter for frequency-converting and outputting the same frequency as the conversion frequency of the first frequency converter while maintaining the mutual phase difference relationship, and the first frequency converter Signal selecting means for alternately selecting and outputting the output 2 signal and the output 2 signal of the second frequency converter, and the first and second frequency converters of the two signals output by the signal selecting means First and second filter circuits set to select the frequency of each of the conversion frequency signal components, and the first and second filter circuits when the output signal of the first frequency converter is selected by the signal selection means. It's a filter circuit Wherein the outputted signal of the phase and amplitude such that the phase and amplitude on the basis of a comparison result obtained by comparing the respective smaller first
Phase shift amount and attenuation amount control of the vector modulator, and the phase and amplitude of the signal output from the first and second filter circuits when the output signal of the second frequency converter is selected by the signal selection means. And an anti-phase synthesis control circuit that controls the amount of phase shift and the amount of attenuation of the second vector modulator based on the comparison result obtained by comparing Feedforward amplifier. 2. The anti-phase synthesis control circuit is controlled so as to alternately take out the signals frequency-converted from the first and second frequency converters to the pass center frequency of the first and second filter circuits. Control signal for controlling the input signal to be supplied to the first and second frequency converters, wherein the signal selecting means combines the input signal to be combined with the output signal of the first vector modulator by the first power combining means. The first filter that combines the signal branched and frequency-converted by the first frequency converter and the signal output by the error amplifier and frequency-converted by the second frequency converter to synthesize the first filter A first power combiner for outputting to a circuit, a signal obtained by branching the output signal of the first vector modulator and frequency-converted by the first frequency converter, and the error by the second power combiner. Output of amplifier A second power combiner for branching the output signal of the pilot signal combining means, which is combined with the signal, and combining with the signal frequency-converted by the second frequency converter to output to the second filter circuit. The feedforward amplifier according to claim 1, characterized in that 3. The first and second frequency converters are configured to constantly output a signal whose frequency has been converted to a pass center frequency of the first and second filter circuits, and the signal selecting means includes: A signal obtained by branching the input signal that is combined with the output signal of the first vector modulator by the first power combining means and frequency-converted by the first frequency converter and an output signal of the error amplifier are branched. Of one of the signals whose frequency has been converted by the second frequency converter, and which outputs the one of the signals to the first filter circuit, which is alternately selected, and the first vector modulator. A signal obtained by branching the output signal and frequency-converted by the first frequency converter, and a signal output from the pilot signal combining means to be combined with the output signal from the error amplifier by the second power combining means are branched. And a second signal switcher for outputting one of the signals frequency-converted by the second frequency converter to the second filter circuit which is alternately selected. The feedforward amplifier according to claim 1, wherein the feedforward amplifier outputs a control signal for controlling each of the first and second signal switches.