JP2731707B2 - Feedforward distortion compensation amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a feed-forward distortion compensating amplifier, and more particularly to a high-frequency amplifier at a radio frequency where it is difficult to improve the non-linear distortion of the amplifier due to negative feedback as generally used at low frequencies. The present invention relates to a wireless transmission / reception device.

[0002]

2. Description of the Related Art It is generally known that an amplifier is basically configured as shown in FIG. 2 when feedforward distortion compensation is performed (for example, H. SEIDEL,
H. R. BEURIRIER, A. et al. N. FRIEDMAN
"Error-Controlled High P
lower Linear Amplifiers at
VHF "(The Bell System Tech
natural Journal, 47, No. 5 (May
-June 1968)). In FIG. 2, an input signal is first split into two, one is input to a main amplifier 1 for compensating for distortion, and the other is input to a first power combiner 5 through a first delay line 3. The output signal amplified by the main amplifier 1 is split into two, one of which is input to the second power combiner 6 through the second delay line 4, and the other controls the phase and amplitude of the signal. Is input to the first vector modulator 7. The output signal of which the phase and the amplitude of the first vector modulator 7 are controlled is output in the first power combiner 5 with the same amplitude and opposite phase (180 ° phase difference) as the input side signal.
Synthesized by

Here, the first delay line 3 has a delay time from the input to the first power combiner 5 of a path branched from the input side of the main amplifier 1 and a path branched from the output side of the main amplifier 1. Is adjusted so that there is no difference between An error signal obtained by extracting a distortion component of the main amplifier 1 as an output of the first power combiner 5 is input to the auxiliary amplifier 2 through a second vector modulator 8 for controlling the phase and amplitude of this signal. You. The error signal amplified by the auxiliary amplifier 2 is combined by the second power combiner 6 so as to have the same amplitude and opposite phase as the distortion component of the output of the main amplifier 1 to compensate for distortion.

In this basic feedforward distortion compensating amplifier, a first vector modulator 7 and a second vector modulator 7 are used in order to always stably suppress the signal components in the error detection loop for error extraction by equal-amplitude reverse-phase synthesis. It is necessary to automatically perform the phase / amplitude control by the second vector modulator 8 to keep the signal suppression amount in the error detection loop and the error suppression amount in the error removal loop to the maximum.

For this reason, in a conventional amplifier that performs feedforward distortion compensation, as shown in FIG.
In order to suppress the signal component in the error detection loop, the first
, A bandpass filter 13c for detecting a part of the signal component from the output of the power combiner 5, a detector 17 for obtaining a detection voltage corresponding to the signal power level, and a residual output from the detection voltage to the composite output. A phase shifter control circuit 16b for controlling the amount of phase shift of the first phase shifter 11 so as to minimize the power level of the signal component to be shifted. The first power attenuator 9 is for controlling the amplitude of the output signal of the main amplifier 1, and the output signal of the first power attenuator 9 is the first power attenuator 9.
Is input to the phase shifter 11. As described above, the signal component remaining from the error signal including the distortion component remaining at the output of the first power combiner 5 as a result of the suppression of the signal component by the first power combiner 5 in the error detection loop. And the first phase shifter 1 in the direction in which the power level decreases.
By changing the phase shift amount of 1, the control is performed so that the suppression amount of the signal component in the extraction of the distortion component in the error detection loop can be increased.

Here, the detailed configuration of the phase shifter control circuit 16b is shown in FIG. After the detection voltage corresponding to the input error signal level is converted into digital signal data by an A / D (analog / digital) converter 22, the data is sequentially transferred to the first clock at the timing of the clock pulse from the timing lock generation circuit 25. And stored in a shift register 29 composed of the second memories 23a and 23b. The magnitude of the stored data is compared by the comparator 24 between the latest data and the data one clock before, and the first phase shifter 11 (FIG. 9) is operated in a direction in which the synthesis level decreases so as to perform antiphase synthesis. The U / D (up / down) counter 19 is up-counted or down-counted so as to change the phase shift amount of 3). Here, the output data of the counter 19 is read out from first and second ROMs (read-only memories) 20a and 20b which store control voltage data corresponding to the phase shift amount of the first phase shifter 11. The address is an address, and a control signal is generated by the first and second D / A (digital / analog) converters 21a and 21b according to the read data.

FIG. 5 shows a vector combining type infinite phase shifter as an example of the first phase shifter 11. That is, two signals that are orthogonally branched and have a phase difference of 90 ° are generated by a 90 ° power divider 27, and the magnitudes of the two signals are controlled by mixers 26a and 26b by a control input signal, and the signals are controlled by a power combiner 28. Combined. This utilizes the fact that an arbitrary vector on the phase plane can be synthesized by synthesizing signals having two orthogonal vector quantities, and operates on a circumference where the phase can be arbitrarily changed with a constant gain as a phase shifter. ing.

[0008]

In this conventional feedforward distortion compensation amplifier, control is performed by detecting a signal component from an error signal after signal suppression, so that only one-dimensional information of a signal residual level can be obtained. However, since the two-dimensional control of amplitude and phase is mainly performed by software control using a perturbation method or the like, the control speed is slow and it takes time to converge to a state where the amount of distortion compensation is maximized. There were drawbacks. Further, the more the signal is suppressed, the smaller the residual signal component included in the error signal becomes. Therefore, when the amount of suppression is increased, it is difficult to extract the signal component, and the amount of suppression is limited.

SUMMARY OF THE INVENTION It is an object of the present invention to eliminate the above-mentioned drawbacks, improve the control speed, and reduce the time required for convergence to a state where the amount of distortion compensation is maximized. It is to provide a compensation amplifier.

[0010]

According to the present invention, there is provided a main amplifier for amplifying an input signal to obtain an output signal having a desired amplitude;
A first power attenuator for controlling the amplitude of the output signal of the main amplifier, a first phase shifter for controlling the phase of the output signal of the first power attenuator, and a group delay time of the input signal. A first delay line to be adjusted, a first power combiner that combines an output signal of the first phase shifter and an output signal of the first delay line, and generates a combined output signal; A second power attenuator for controlling the amplitude of the output signal; a second phase shifter for controlling the phase of the output signal of the second power attenuator;
An amplifier for amplifying the output signal of the phase shifter, a second delay line for adjusting a group delay time of the output signal of the main amplifier, an output signal of the second delay line, and an output signal of the auxiliary amplifier And a second power combiner for combining the first and second power combiners, wherein a first band-pass filter for extracting a predetermined frequency component from an output signal of the first phase shifter; A second band-pass filter for extracting the predetermined frequency component from the output signal of the delay line; and first and second amplifying the output signals of the first and second band-pass filters to a certain power level, respectively. And a phase comparator for detecting a phase difference between the output signals of the first and second amplifiers, and control signal data corresponding to the phase difference obtained as an output of the phase comparator.
Generated according to the stored memory and output from the first phase shifter.
Phase shift between the phase shift amount of the force signal and the output signal of the first delay line
And a phase shifter control circuit for controlling the first phase shifter so that the quantities are in opposite phases .

That is, in the feedforward distortion compensating amplifier of the present invention, the phase shifter control circuit determines the phase detection voltage according to the phase difference obtained as the output of the phase comparator to reduce the phase difference. The phase shift amount of the first phase shifter is controlled.

[0012]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. In FIG. 1, the same parts as those in FIGS. 1 and 3 are denoted by the same reference numerals. Compared with the conventional feed-forward distortion compensation amplifier of FIG. 3, the two input signals synthesized by the first power combiner 5 for error detection are branched, and the two input signals are respectively divided into first and second band-pass filters 13a and 13a. After extracting the same frequency component of the input signal or the pilot signal superimposed on the input signal by the band-pass filter 13b, the first and second amplifiers 4a and 14b respectively amplify the signals to a certain level for phase comparison. Input to the phase comparator 15. Since the phase comparator 15 outputs a phase detection voltage corresponding to the phase difference between the input signals, the phase shifter control circuit 16a always reverses the respective inputs of the first power combiner 5 based on this voltage. The phase shift amount of the first phase shifter 11 is controlled so that the phases are combined at a phase difference of 180 °.

FIG. 6 shows the phase shifter control circuit 16a of FIG.
The details were shown. Based on the phase detection voltage characteristic of the phase comparator 15 shown in FIG. 7, it is determined whether the voltage value is positive or negative, and the phase difference between the positive and negative cases is reversed (Δθ = 1
(80 °) by controlling the phase shift direction of the first phase shifter 11 to converge to the opposite phase point. In FIG. 6, a voltage comparator 17 for making a positive / negative determination of the phase detection voltage and a U / D (up / down) for counting the number of clock pulses from clock generator 18 by up-counting or down-counting based on the determination output signal. Down) The counter 19 and the data input signal corresponding to the phase shift amount for generating the X-axis control signal and the Y-axis control signal to the vector combining type infinite phase shifter shown in FIG. First and second ROMs (read only memories) 20a and 20b storing the magnitudes of X-axis and Y-axis control signals for obtaining the phase shift amount, and the read X-axis and Y-axis The first and second D / A (digital / analog) converters 21a and 21b for converting the control signal data into analog voltages to generate X-axis and Y-axis control signals, a is configured.

[0015]

As described above, according to the present invention, the phase shifter control for suppressing the signal in the error detection loop is performed by performing the direct phase comparison of the combined input by hardware and performing the reverse phase combining control. The speed is improved, the convergence to the anti-phase state is fast, and the control to the anti-phase point can be performed with high accuracy. As a result, the signal suppression amount can be increased.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a block diagram for explaining a basic principle of a feedforward distortion compensation method.

FIG. 3 is a block diagram of a conventional feed-forward distortion compensation amplifier that automatically performs phase control of an error detection loop.

FIG. 4 is a detailed block diagram of a phase shifter control circuit 16b shown in FIG.

FIG. 5 is a block diagram of a vector synthesis type infinite phase shifter as an example of a phase shifter.

FIG. 6 is a detailed block diagram of a phase shifter control circuit 16a shown in FIG.

FIG. 7 is a view showing an example of a phase detection voltage characteristic in the phase comparator of FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Main amplifier 2 Auxiliary amplifier 3 1st delay line 4 2nd delay line 5 1st power combiner 6 2nd power combiner 9 1st power attenuator 10 2nd power attenuator 11 1st Phase shifter 12 Second phase shifter 13a First band pass filter 13b Second band pass filter 14a First amplifier 14b Second amplifier 15 Phase comparator 16a Phase shifter control circuit

Claims (2)

(57) [Claims] A main amplifier for amplifying an input signal to obtain an output signal having a desired amplitude; a first power attenuator for controlling the amplitude of an output signal of the main amplifier; A first phase shifter for controlling a phase of an output signal, a first delay line for adjusting a group delay time of the input signal, and an output signal of the first phase shifter and a first delay line. A first power combiner that combines the output signal and generates a combined output signal, a second power attenuator that controls the amplitude of the combined output signal, and a phase of the output signal of the second power attenuator , An auxiliary amplifier for amplifying an output signal of the second phase shifter, a second delay line for adjusting a group delay time of an output signal of the main amplifier, And a second power combiner for combining the output signal of the second delay line and the output signal of the auxiliary amplifier. In the forward distortion compensation amplifier,
A first band-pass filter for extracting a predetermined frequency component from an output signal of the first phase shifter, and a second band-pass filter for extracting the predetermined frequency component from an output signal of the first delay line And first and second amplifiers for respectively amplifying output signals of the first and second band-pass filters to a certain power level, and a phase difference between the output signals of the first and second amplifiers. Phase detector to detect and control according to phase difference obtained as output of this phase comparator
The signal data is generated according to a memory stored in advance, and
And the output of the first delay line.
The first phase shifter so that the amount of phase shift with respect to the force signal is reversed .
And a phase shifter control circuit for controlling the phase shifter. 2. The first band pass filter according to claim 1, wherein
Extracting a pilot signal component superimposed on the output signal of the phase shifter as the predetermined frequency component,
2. The feedforward distortion amplifier according to claim 1, wherein the band-pass filter extracts a pilot signal component superimposed on the output signal of the first delay line as the predetermined frequency component. 3.