JPH0199891A - Ic card - Google Patents
Ic cardInfo
- Publication number
- JPH0199891A JPH0199891A JP62256835A JP25683587A JPH0199891A JP H0199891 A JPH0199891 A JP H0199891A JP 62256835 A JP62256835 A JP 62256835A JP 25683587 A JP25683587 A JP 25683587A JP H0199891 A JPH0199891 A JP H0199891A
- Authority
- JP
- Japan
- Prior art keywords
- card
- module
- chip
- lead
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005452 bending Methods 0.000 claims abstract description 8
- 239000002184 metal Substances 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims 2
- 230000000694 effects Effects 0.000 description 4
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Credit Cards Or The Like (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、モジュールエCをはめ込んだ工Oカードに
関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an industrial O-card in which a module E-C is fitted.
ICカードにモジュールエCをはめ込んだものとして第
12図〜第15図に示すものがあった。こnらの図にお
いて、lは半導体素子(以下チップという)、2は導出
リード、3はチップlと導出リード2を接続する金属細
線、4はチップlと金属績[3を封止する封止用樹脂、
5はチップ1を搭載するモジュール基板ないしはモジュ
ールエ0.6は外部電極、7はモジュールxOをはめ込
んだ工Cカードである。There are IC cards shown in FIGS. 12 to 15 in which a module C is fitted. In these figures, l is a semiconductor element (hereinafter referred to as a chip), 2 is a lead-out lead, 3 is a thin metal wire that connects the chip l and the lead-out lead 2, and 4 is a seal that seals the chip l and the metal wire [3]. stopper resin,
5 is a module board or module board on which the chip 1 is mounted; 0.6 is an external electrode; 7 is a module C card into which the module xO is fitted.
次に動作について説明する。導出リード2および外部電
極6を形成したモジュールエ05にチップlを接層後、
金属細線3によって導出リード2とを接続する。次いで
封止用樹脂4でチップ1と金属細線3を封止する□次に
加熱機(図示せず)により発生する熱により加熱された
空気(図示せず)を媒体として封止用樹脂4を加熱し、
樹脂の硬化な完了させ、その後、モジュールエC5を工
Cカード7にはめ込むが、このモジュールエ05をはめ
込む箇所はカードの曲げ応力が集中しない所(左上R)
に配置される。そしてその際モジュールエC5に搭載し
たチップ1と導出リード2を接a!する金属細線3に、
チップ1の4辺ないしは左右2辺に接続さnていた^
〔発明が解決しようとする問題点〕
ところが以上のような従来の方法で製造したモジュール
エ05をカード7にはめ込んだものでは、カードの長短
辺の曲げ応力に対し金psm線3に機械的ストレスが加
わり易く、場合によっては金属線Is3が断線してしま
うという欠点があった。Next, the operation will be explained. After attaching the chip l to the module E05 on which the lead-out leads 2 and external electrodes 6 are formed,
It is connected to the lead-out lead 2 by a thin metal wire 3. Next, the chip 1 and the thin metal wire 3 are sealed with the sealing resin 4. Next, the sealing resin 4 is sealed using air (not shown) heated by heat generated by a heating machine (not shown) as a medium. Heat,
After the resin has completely cured, module E C5 is fitted into the work card C card 7. The part where module E 05 is fitted is a place where the bending stress of the card is not concentrated (upper left R).
will be placed in At that time, connect the chip 1 mounted on the module E C5 and the lead-out lead 2! To the thin metal wire 3,
[Problems to be solved by the invention] However, when the module E05 manufactured by the conventional method as described above is inserted into the card 7, the card There was a drawback that mechanical stress was easily applied to the gold psm wire 3 due to the bending stress on the long and short sides, and the metal wire Is3 could break in some cases.
この発明は上記のような従来のものの欠点を除去するた
めになされた5ので、カードの長短辺の曲げ応力による
金属細線へ、の機械的ストレスの緩和ないしは金属細線
のl!T線を防止することができるICカードな提供す
ることを目的としている。This invention was made in order to eliminate the above-mentioned drawbacks of the conventional ones.5 Therefore, it alleviates the mechanical stress on the thin metal wire due to the bending stress on the long and short sides of the card. The aim is to provide an IC card that can prevent T-rays.
この発明に係る工Cカードは、カードにはめ込むモジュ
ールエ0に搭載したチップと導出リードを接続する金属
細線を、チップのセンターラインの左辺側ないしは上辺
側に接続し、カード長短辺のセンターラインより遠くへ
配置するようにしたものである。In the construction C card according to the present invention, a thin metal wire connecting the chip mounted on the module E0 to be fitted into the card and the lead-out lead is connected to the left side or the top side of the center line of the chip, and It was designed to be placed far away.
この発明におけるICカードは、モジュールエCの金属
線mご左辺ないしは上辺に配置したことにより、カード
曲げ応力時の金属細線への機械的ストレスや断線を防止
し得る。In the IC card of the present invention, by arranging the metal wire m on the left side or the upper side of the module E, it is possible to prevent mechanical stress and breakage of the thin metal wire when the card is subjected to bending stress.
以下この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第1図〜第8図において、1〜7は上記従来例と同一部
品を示しており、異なる点は、工Cカード7にはめ込ん
だモジュールエ05のチップ1と導出リード2を接続す
る金属細線3が左辺ないしは上辺のみに配置さnている
点である。In FIGS. 1 to 8, 1 to 7 indicate the same parts as the above conventional example, and the difference is that the thin metal wire connects the chip 1 of the module E 05 inserted into the module C card 7 and the lead-out lead 2. 3 is placed only on the left side or the top side.
次に動作について説明する。モジュールエ05にチップ
lTr:接着後、金属線l!3によって導出リード2と
を接続するか、lチップモジュールの場合はチップlと
導出リード2の接続本数は8本ないしは6本の少数でよ
い。そのため予めモジュールエ05を形成する際fカー
ド7にはめ込む際に1チツプ、1と導出リード2を接続
する金属線113か左辺ないしは上辺に配tmされるよ
うな設酊と丁nばよい。Next, the operation will be explained. Chip lTr on module E05: After adhesion, metal wire l! In the case of an l-chip module, the number of connections between the chip l and the lead-out leads 2 may be as small as 8 or 6. Therefore, when forming the module 05 in advance and inserting it into the F card 7, it is only necessary to arrange the metal wire 113 connecting the chip 1 and the lead-out lead 2 on the left side or the top side.
以上のように金属細線をカード長短辺のセンターライン
より遠くへ配置することにより、カード曲げ応力時の並
列細線への機械的ストレスを緩和し得る。また1辺のみ
の接続とすることにより、W、続装置(図示せず)の可
動範囲か少なくなり、生産性が同上する、
なお上記実施例では、チップlの左辺や上辺の1辺のみ
としたが、第9(9)に示すように左辺、上辺の組合せ
、あるいは第10図、第11図のようにチップ1のセン
ターライン0より左辺側の8辺ないしは上辺側の8辺の
場合でも同様の効果を奏する。As described above, by arranging the thin metal wires far from the center lines of the long and short sides of the card, the mechanical stress on the parallel thin wires during card bending stress can be alleviated. In addition, by connecting only one side, the movable range of W and the connecting device (not shown) is reduced, and the productivity is improved. However, even in the case of a combination of the left side and the top side as shown in 9(9), or the 8 sides on the left side or the 8 sides on the top side of the center line 0 of chip 1 as shown in Figures 10 and 11, It has a similar effect.
以上のようにこの発明によれば、金属細線の配置個所2
変えることにより、カードの曲げ応力による金属細線へ
の機械的ストレスの緩和ないしはeraを防止すること
かできる効果かある。As described above, according to the present invention, the thin metal wire is arranged at the location 2.
This change has the effect of alleviating the mechanical stress on the thin metal wire due to the bending stress of the card or preventing erasure.
第1図〜第4図はこの発明の一実施例を示Tもので、第
1図、第2図はICカードにモジュールICをはめ込ん
だ上面図とその■−■線断面図、第8図、第4図はモジ
ュールエOの上面図とそのIV−IV線の断面図、第5
図〜第8菌はこの発明の他の実施例を示すもので、そn
ぞn上記第1図〜第4図に対応する図、第9図〜第11
図はさらに他の実施例を示す上面肉・第1211・第1
8因は従来の10カードにモジュールエCをはめ込んだ
上面図とその皿−x[[Ilsの断面図・第14図、第
15図は従来のモジュールエCの上面図とそのrt−y
@の断面図である、
(2)中、1はチップ、2は導出リード、3は金属細線
、4は対土用樹脂、5はモジュール基板ないしはモジュ
ールエ0.6は外g’s極、7はICカードである。
尚、図中同一符号は同一または相当部分を示T。Figures 1 to 4 show an embodiment of the present invention, and Figures 1 and 2 are a top view of a module IC fitted into an IC card, a sectional view thereof along the line ■-■, and Figure 8. , Fig. 4 is a top view of module O and its sectional view taken along the line IV-IV, and Fig.
Fig. 8 shows another embodiment of the present invention.
Figures corresponding to Figures 1 to 4 above, Figures 9 to 11
The figure shows still another example.
The 8th reason is a top view of a conventional 10 card fitted with a module E C and a sectional view of its plate-x[[Ils.
(2) Inside, 1 is the chip, 2 is the lead-out lead, 3 is the thin metal wire, 4 is the anti-soil resin, 5 is the module board or module e0.6 is the outer g's pole, 7 is an IC card. In addition, the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
体素子と、この半導体素子と外部電極を接続する金属細
線と、半導体素子と金属細線を封止する封止用樹脂から
構成されるモジユールICを左上部にはめ込んだICカ
ードにおいて、モジユールICのチツプと外部電極を接
続する金属細線を、チツプの縦横のセンターラインの左
辺側ないしは上辺側に接続し、カード長辺ないしは短辺
の曲げ応力に対し、金属細線への機械的ストレスを受け
にくくしたことを特徴とするICカード。A modular IC consisting of a substrate having an external electrode, a semiconductor element mounted on this substrate, a thin metal wire connecting the semiconductor element and the external electrode, and a sealing resin that seals the semiconductor element and the thin metal wire. In the IC card fitted in the upper left corner, the thin metal wire connecting the module IC chip and the external electrode is connected to the left side or the upper side of the vertical and horizontal center line of the chip, and the bending stress on the long side or short side of the card is applied. On the other hand, an IC card is characterized by a thin metal wire that is less susceptible to mechanical stress.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62256835A JPH0199891A (en) | 1987-10-12 | 1987-10-12 | Ic card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62256835A JPH0199891A (en) | 1987-10-12 | 1987-10-12 | Ic card |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0199891A true JPH0199891A (en) | 1989-04-18 |
Family
ID=17298086
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62256835A Pending JPH0199891A (en) | 1987-10-12 | 1987-10-12 | Ic card |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0199891A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03192755A (en) * | 1989-12-22 | 1991-08-22 | Oki Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
US6744205B2 (en) | 2001-09-26 | 2004-06-01 | Matsushita Electric Industrial Co., Ltd. | Discharge lamp with improved light distribution characteristics |
-
1987
- 1987-10-12 JP JP62256835A patent/JPH0199891A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03192755A (en) * | 1989-12-22 | 1991-08-22 | Oki Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
US6744205B2 (en) | 2001-09-26 | 2004-06-01 | Matsushita Electric Industrial Co., Ltd. | Discharge lamp with improved light distribution characteristics |
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