JPH0198017A - Printer controller - Google Patents

Printer controller

Info

Publication number
JPH0198017A
JPH0198017A JP62256076A JP25607687A JPH0198017A JP H0198017 A JPH0198017 A JP H0198017A JP 62256076 A JP62256076 A JP 62256076A JP 25607687 A JP25607687 A JP 25607687A JP H0198017 A JPH0198017 A JP H0198017A
Authority
JP
Japan
Prior art keywords
data
buffer memory
circuit
printer
cpv
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62256076A
Other languages
Japanese (ja)
Inventor
Toshifumi Matsuo
松尾 敏文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62256076A priority Critical patent/JPH0198017A/en
Publication of JPH0198017A publication Critical patent/JPH0198017A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To minimize the hardware quantity and to ensure the smooth print-out processing with no deterioration of the CPV performance by writing a fixed quantity of data to a buffer memory from a CPV via a data quantity detecting circuit in case the buffer memory has the idle capacity of a fixed quantity or more. CONSTITUTION:The data written into a buffer memory circuit 5 of a printer controller 3 from a CPV 1 via a common data bus 2 are delivered to a printer device 4 via a printer control circuit 6. A fact that the circuit 5 has the idle capacity of a fixed quantity or more is detected by a data quantity detecting circuit 7 and informed to the CPV 1. Thus the data of a fixed quantity is written to the circuit 5 from the CPV 1. As a result, the hardware quantity is minimized and the print-out processing is smoothly carried out with no deterioration of the CPV performance.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は中央処理装置に接続されたプリンタ制御装置に
関し、特にプリント出力処理中に他の処理も実行できる
プリンタ制御装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a printer control device connected to a central processing unit, and more particularly to a printer control device capable of executing other processes during print output processing.

(従来の技術) 従来、プリンタ制御装置においてはバッファメモリを備
えて込ない九め、ひとまとめのデータをプリンタ装置に
送出するごとく中央処理装置にその終了を報告し、中央
処理装置では動作を転送/プリントに切換えていた。
(Prior Art) Conventionally, a printer control device has not been equipped with a buffer memory, and when a batch of data is sent to a printer, it reports the completion to a central processing unit, and the central processing unit transfers/transmits the operation. I was switching to print.

従って、プリンタ装置への転送速度が低い場合には切換
え処理により中央処理装置の性能を低下させることには
ならな−が、プリンタ装置の転送速度が高くなるに伴っ
て切換え処理が無視できないものになってきた。
Therefore, if the transfer speed to the printer is low, the switching process will not degrade the performance of the central processing unit, but as the transfer speed of the printer increases, the switching process cannot be ignored. It has become.

(発明が解決しようとする問題点) 上述し几従来のプリンタ制御装置では、プリンタ装置で
データを出力する場合に、ひとまとまりのデータごとに
中央処理装置は他の処理からプリンタ出力処理へと切換
え処理を行う必要があり、中央処理装置の性能を低下さ
せると云う欠点がある。
(Problems to be Solved by the Invention) As described above, in the conventional printer control device, when outputting data with a printer device, the central processing unit switches from other processing to printer output processing for each batch of data. It has the disadvantage that it requires processing and reduces the performance of the central processing unit.

本発明の目的は、中央処理装置からのデータ全バッファ
メモリ回路へいったん蓄えてからプリンタ装置によりデ
ータをプリントするように。
An object of the present invention is to temporarily store all data from a central processing unit in a buffer memory circuit and then print the data using a printer device.

動作をプリンタ制御回路により制御するとともに、バッ
ファメモリ回路のデータ量をデータ量検出回路により検
出できるようにしておき、バッファメモリ回路に一定量
以上の突きが発生し念ときには、中央処理装置により次
のデータをバッファメモリ回路へ書込むことにより上記
欠点を除去し、上記切換え処理を実行する必要がないよ
うに構成したプリンタ制御装置を提供することにある。
The operation is controlled by the printer control circuit, and the amount of data in the buffer memory circuit can be detected by the data amount detection circuit.In case the buffer memory circuit is bumped by more than a certain amount, the central processing unit performs the following steps. It is an object of the present invention to provide a printer control device which eliminates the above disadvantages by writing data into a buffer memory circuit and eliminates the need to execute the switching process.

(問題点全解決するための手段) 本発明によるプリンタ制御装置はバッファメモリ回路と
、データ量検出回路と、プリンタ制御回路とを具備して
構成したものである。
(Means for Solving All Problems) A printer control device according to the present invention includes a buffer memory circuit, a data amount detection circuit, and a printer control circuit.

バッファメモリ回路は、中央処理装置から共通データバ
ス全弁して送出されたデータをいったん蓄えておくため
のものである。
The buffer memory circuit is used to temporarily store data sent from the central processing unit via the common data bus.

データ量検出回路は、バッファメモリ回路に一定量以上
の突きが発生したときには空きの量を検出して中央処理
装置へ報告し、中央処理装置から一定量のデータ全バッ
ファメモリ回路へ書込むように指示するためのものであ
る。
The data amount detection circuit detects the amount of free space when a bump of more than a certain amount occurs in the buffer memory circuit, reports it to the central processing unit, and writes a certain amount of data to all buffer memory circuits from the central processing unit. It is meant to give instructions.

プリンタ制御回路は、中央処理装置によりバッファメモ
リ回路に書込まれ次データをプリンタ装置へ出力するよ
うに制御するためのものである。
The printer control circuit is for controlling the next data written in the buffer memory circuit by the central processing unit to be output to the printer device.

(実施例) 次に1本発明について図面を参照して説明する。(Example) Next, one embodiment of the present invention will be explained with reference to the drawings.

第1図は1本発明によるプリンタ制御装置の一実施例金
示すブロック図である。第1図において、1は中央処理
装置、2は共通データバス、3はプリンタ制御装置、4
はプリンタ装置、5はバッファメモリ回路、6はプリン
タ制御回路。
FIG. 1 is a block diagram showing an embodiment of a printer control device according to the present invention. In FIG. 1, 1 is a central processing unit, 2 is a common data bus, 3 is a printer control device, and 4 is a printer controller.
1 is a printer device, 5 is a buffer memory circuit, and 6 is a printer control circuit.

7はデータ量検出回路である。7 is a data amount detection circuit.

第1図において、プリンタ制御装置3は中央処理装置1
からのデータを蓄えるためのバッファメモリ回路3と、
ブリング装置4t−制御するためのプリンタ制御回路6
と、バッファメモリ回路5に格納されたデータ量を検出
するためのデータ量検出回路と全具備して構成したもの
である。
In FIG. 1, the printer control device 3 is the central processing device 1.
a buffer memory circuit 3 for storing data from the
Printer control circuit 6 for controlling the bling device 4t
, and a data amount detection circuit for detecting the amount of data stored in the buffer memory circuit 5.

プリンタ装量4への出力処理期間において。During the output processing period to printer loading 4.

中央処理装置1により共通データバス2を介してバッフ
ァメモリ回路5に書込まれたデータは、プリンタ制御回
路6を介してプリンタ装置4へ出力される。プリンタ装
置4に対してデータが出力され念結果、バッファメモリ
回路5に一定量以上の空きが発生しtことをデータ量検
出回路7により検出し、中央処理装置1へこれを報告す
る。
Data written into the buffer memory circuit 5 by the central processing unit 1 via the common data bus 2 is output to the printer device 4 via the printer control circuit 6. As a result of data being output to the printer device 4, the data amount detection circuit 7 detects that a certain amount or more of free space is generated in the buffer memory circuit 5, and reports this to the central processing unit 1.

上記報告により、中央処理装置1はバッファメモリ回路
5に一定量の空きがあることを認識し、次のデータを一
定量だけバッファメモリ回路5に書込む。
Based on the above report, the central processing unit 1 recognizes that there is a certain amount of free space in the buffer memory circuit 5, and writes a certain amount of the next data into the buffer memory circuit 5.

(発明の効果) 以上説明し几ように本発明は、中央処理装置からのデー
タ全バッファメモリ回路へいったん蓄えてからプリンタ
装置によりデータをプリントするように、動作をプリン
タ制御回路により制御するとともに、バッファメモリ回
路のデータ量をデータ量検出回路により検出できるよう
にしておき、バッファメモリ回路に一定量以上の空きが
発生しtときには、中央処理装置により次のデータをバ
ッファメモリ回路へ書込trことにより、ハードウェア
量を最小にして中央処理装置の性能全低下させることな
く、プリント出力処理を円滑に行うことができると云う
効果がある。
(Effects of the Invention) As explained above, the present invention controls the operation by the printer control circuit so that the data from the central processing unit is temporarily stored in the entire buffer memory circuit and then is printed by the printer device. The amount of data in the buffer memory circuit can be detected by a data amount detection circuit, and when a certain amount or more of free space occurs in the buffer memory circuit, the central processing unit writes the next data to the buffer memory circuit. This has the effect that print output processing can be performed smoothly without reducing the overall performance of the central processing unit by minimizing the amount of hardware.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明によるプリンタ制御装置の一実施例を
示すブロック図である。 1・・・中央処理装置  2・・・共通データバス3・
・・プリンタ制御装置  4・・・プリンタ装置5・・
・バッファメモリ回路 6・・・プリンタ制御回路 7・・・データ量検出回路
FIG. 1 is a block diagram showing an embodiment of a printer control device according to the present invention. 1...Central processing unit 2...Common data bus 3.
...Printer control device 4...Printer device 5...
・Buffer memory circuit 6...Printer control circuit 7...Data amount detection circuit

Claims (1)

【特許請求の範囲】[Claims] 中央処理装置から共通データバスを介して送出されたデ
ータをいつたん蓄えておくためのバッファメモリ回路と
、前記バッファメモリ回路に一定量以上の空きが発生し
たときには前記空きの量を検出して前記中央処理装置へ
報告し、前記中央処理装置から前記一定量のデータを前
記バッファメモリ回路へ書込むように指示するためのデ
ータ量検出回路と、前記中央処理装置により前記バッフ
ァメモリ回路に書込まれたデータをプリンタ装置へ出力
するよう制御するためのプリン、制御回路とを具備して
構成したことを特徴とするプリンタ制御装置。
a buffer memory circuit for temporarily storing data sent from a central processing unit via a common data bus; a data amount detection circuit for reporting to a central processing unit and instructing the central processing unit to write the certain amount of data to the buffer memory circuit; 1. A printer control device comprising a printer and a control circuit for controlling the output of data to a printer device.
JP62256076A 1987-10-09 1987-10-09 Printer controller Pending JPH0198017A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62256076A JPH0198017A (en) 1987-10-09 1987-10-09 Printer controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62256076A JPH0198017A (en) 1987-10-09 1987-10-09 Printer controller

Publications (1)

Publication Number Publication Date
JPH0198017A true JPH0198017A (en) 1989-04-17

Family

ID=17287555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62256076A Pending JPH0198017A (en) 1987-10-09 1987-10-09 Printer controller

Country Status (1)

Country Link
JP (1) JPH0198017A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5000827A (en) * 1990-01-02 1991-03-19 Motorola, Inc. Method and apparatus for adjusting plating solution flow characteristics at substrate cathode periphery to minimize edge effect
JPH03281268A (en) * 1990-03-16 1991-12-11 Tokyo Electric Co Ltd Label printer
JPH0432922A (en) * 1990-05-23 1992-02-04 Nec Corp Interface control circuit
JPH04135765A (en) * 1990-09-27 1992-05-11 Canon Inc Recording apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5000827A (en) * 1990-01-02 1991-03-19 Motorola, Inc. Method and apparatus for adjusting plating solution flow characteristics at substrate cathode periphery to minimize edge effect
JPH03281268A (en) * 1990-03-16 1991-12-11 Tokyo Electric Co Ltd Label printer
JPH0432922A (en) * 1990-05-23 1992-02-04 Nec Corp Interface control circuit
JPH04135765A (en) * 1990-09-27 1992-05-11 Canon Inc Recording apparatus

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