JPH0193887U - - Google Patents
Info
- Publication number
- JPH0193887U JPH0193887U JP1987190342U JP19034287U JPH0193887U JP H0193887 U JPH0193887 U JP H0193887U JP 1987190342 U JP1987190342 U JP 1987190342U JP 19034287 U JP19034287 U JP 19034287U JP H0193887 U JPH0193887 U JP H0193887U
- Authority
- JP
- Japan
- Prior art keywords
- level
- inverted
- video signal
- synchronization signal
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 1
Description
第1図はこの考案の一実施例によるCATVコ
ンバータにおける輝度再反転回路の構成図、第2
図は第1図の輝度再反転回路の各部の信号波形を
示すタイムチヤートであり、第2図aはクランプ
回路3の出力信号波形図、第2図bはオペアンプ
4の出力信号波形図、第3図は画面転換検出のた
めに入力映像信号の輝度レベル判定を行う処理を
示すタイムチヤート、第4図は従来のCATVコ
ンバータにおける輝度再反転回路の構成図、第5
図は第4図の輝度再反転回路の各部の信号波形を
示すタイムチヤートであり、第5図aは入力映像
信号波形図、第5図bはローパスフイルタ1の出
力信号波形図、第5図cはクランプ回路3の出力
信号波形図、第5図dはオペアンプ4の出力信号
波形図、第6図は従来のCATVコンバータにお
いて映像信号を各種受信条件で受信した場合の輝
度再反転前後の映像信号波形図であり、第6図a
は受信条件が標準状態の場合の映像信号波形図、
第6図bは本来よりも小さな振幅で受信された場
合の映像信号波形図、第6図cは本来よりも大き
な振幅で受信された場合の映像信号波形図である
。
8……シンクチツプレベル・サンプルホールド
回路、9……電圧変換回路。
Figure 1 is a block diagram of a luminance re-inverting circuit in a CATV converter according to an embodiment of this invention;
The figure is a time chart showing the signal waveforms of each part of the luminance re-inverting circuit of FIG. 1, FIG. 2a is an output signal waveform diagram of the clamp circuit 3, FIG. Figure 3 is a time chart showing the process of determining the brightness level of an input video signal for screen change detection, Figure 4 is a block diagram of a brightness re-inversion circuit in a conventional CATV converter, and Figure 5
The figure is a time chart showing the signal waveform of each part of the luminance re-inverting circuit of FIG. 4, FIG. 5a is an input video signal waveform diagram, and FIG. c is an output signal waveform diagram of the clamp circuit 3, FIG. 5d is an output signal waveform diagram of the operational amplifier 4, and FIG. 6 is an image before and after brightness re-inversion when video signals are received under various reception conditions in a conventional CATV converter. FIG. 6a is a signal waveform diagram.
is a video signal waveform diagram when the reception conditions are standard,
FIG. 6b is a video signal waveform diagram when the signal is received with an amplitude smaller than the original one, and FIG. 6c is a video signal waveform diagram when the signal is received with a larger amplitude than the original one. 8...Sync chip level sample hold circuit, 9...Voltage conversion circuit.
Claims (1)
れるスクランブル処理を施された有料テレビ放送
の映像信号を受け、前記輝度レベルの反転された
映像信号を所定の基準レベルに基づいて再反転し
て元信号に復元する機能を有するCATVコンバ
ータにおいて、前記映像信号中に含まれる同期信
号のレベルを検出する同期信号レベル検出回路と
、前記同期信号レベル検出回路の出力電圧に比例
した電圧を前記再反転基準レベルとして出力する
電圧変換回路とを有する事を特徴とするCATV
コンバータ。 A video signal of pay television broadcasting that has been subjected to scramble processing in which the brightness level of the horizontal scanning line is inverted and non-inverted is received, and the video signal with the brightness level inverted is re-inverted based on a predetermined reference level to create the original image. In a CATV converter having a function of restoring to a signal, a synchronization signal level detection circuit detects the level of a synchronization signal included in the video signal, and a voltage proportional to the output voltage of the synchronization signal level detection circuit is used as the re-inversion reference. A CATV characterized by having a voltage conversion circuit that outputs as a level.
converter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987190342U JPH0193887U (en) | 1987-12-15 | 1987-12-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987190342U JPH0193887U (en) | 1987-12-15 | 1987-12-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0193887U true JPH0193887U (en) | 1989-06-20 |
Family
ID=31481324
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987190342U Pending JPH0193887U (en) | 1987-12-15 | 1987-12-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0193887U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20110069266A (en) * | 2009-12-17 | 2011-06-23 | 현대중공업 주식회사 | The ship |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS595789A (en) * | 1982-06-30 | 1984-01-12 | Matsushita Electric Ind Co Ltd | Separating circuit for data signal in video signal |
JPS59112776A (en) * | 1982-12-20 | 1984-06-29 | Sony Corp | Digital data receiver |
JPS60245383A (en) * | 1984-05-18 | 1985-12-05 | Matsushita Electric Ind Co Ltd | Separating circuit of data signal |
JPS6276882A (en) * | 1985-09-30 | 1987-04-08 | Toshiba Corp | Signal inverting processing circuit |
-
1987
- 1987-12-15 JP JP1987190342U patent/JPH0193887U/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS595789A (en) * | 1982-06-30 | 1984-01-12 | Matsushita Electric Ind Co Ltd | Separating circuit for data signal in video signal |
JPS59112776A (en) * | 1982-12-20 | 1984-06-29 | Sony Corp | Digital data receiver |
JPS60245383A (en) * | 1984-05-18 | 1985-12-05 | Matsushita Electric Ind Co Ltd | Separating circuit of data signal |
JPS6276882A (en) * | 1985-09-30 | 1987-04-08 | Toshiba Corp | Signal inverting processing circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20110069266A (en) * | 2009-12-17 | 2011-06-23 | 현대중공업 주식회사 | The ship |
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