JPS61137481A - Digital processing device of video signal - Google Patents

Abstract

PURPOSE:To eliminate deterioration of S/N of a signal and to prevent a picture from becoming unnatural by clamping the blanking period of video signals to be A/D converted at a specified level and making the signal range of video signals included in the dynamic range of above-mentioned A/D conversion. CONSTITUTION:When a signal of A in the figure and a blanking pulse of B in the figure are supplied to a reproducing circuit 3 from a YC processing circuit 2, the signal from the circuit 2 and the pedestal level are supplied respectively to the bases of Trs 31, 32 of the circuit 3. At the same time, the base of the Tr32 is grounded through a Tr33, and the blanking pulse is supplied to the base of the Tr33, and reproduction output is taken out from the junction of emitters of Tr31, 32. As output signals of the circuit 3 are as shown by the figure C, the possibility of deterioration of S/N of the signal becomes small when the maximum amplitude of the signal is brought within the dynamic range of an A/D converting circuit 4. As the pedestal level formed here is maintained to an output of a D/A converting circuit 6, the level is clamped at the black level of a receiving set 7, and the picture does not become unnatural.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital processing device that doubles the number of scanning lines of a video signal, for example.

[Conventional technology]

For example, a digital processing device that doubles the number of scanning lines of a video signal is configured as shown in FIG.

In the figure, a video signal received by a tuner (11) is supplied to a luminance (Y)/chroma (C) process circuit (2) to form three primary color signals of red (R), fti (G), and blue (B). , these signals are supplied to an AD conversion circuit (4) and converted into digital data.These digital data are supplied to a double-speed processing circuit (5) that doubles the number of scanning lines.Then, double-speed processing is performed. The signal is D
The signals are supplied to the A conversion circuit (6) and converted into analog signals. Furthermore, these signals are supplied to the monitor receiver (7), and a double-speed synchronization signal from the double-speed processing circuit (5) is supplied to the receiver (7), thereby converting the image into which the number of scanning lines has been doubled. is received.

However, in this device, the signal level of the output signal of the process circuit (2) during periods other than the video period is at a blanking level close to O, for example, as shown in FIG. 8A. Therefore, in order to AD convert this signal, the maximum amplitude of this signal must be the dynamic range of the AD conversion circuit (4) (
For example, the signal must be attenuated to within 1Vp-p), and as a result, the signal-to-noise ratio of the signal is extremely degraded.

The signal obtained by processing this signal at double speed and output from the DA conversion circuit (6) is as shown in Figure 8B, but when this signal is supplied to the monitor receiver (7), the receiver (
7), a so-called pedestal clamp is performed using a ramp pulse as shown in FIG. 8C formed from a synchronizing signal. Therefore, monitor @! At the receiver (7), the level of the signal corresponding to this clamp pulse is monitored at the receiver (7).
As a result, the original signal pedestal level became a high potential as shown in Figure 8, making the received image extremely unnatural.

[Problem that the invention seeks to solve]

Conventional devices were constructed as described above. For this reason, there are problems such as the signal-to-noise ratio of the signal deteriorates and the received image becomes unnatural.

[Means for solving the problem] The present invention performs AD conversion (4) on a video signal and performs desired processing (
In a digital processing device for a video signal that performs DA conversion (6) after performing 5), the blanking period of the video signal subjected to AD conversion (4) is clamped at a predetermined level (3). , a video signal digital processing device in which the signal range of the video signal is included in the dynamic range of the AD conversion (4).

[Effect]

According to this device, since no attenuation is performed during AD conversion, there is no deterioration of signal S/H (also, since the pedestal level of the signal is reproduced, the received image does not become unnatural). do not have.

〔Example〕

In FIG. 1, a signal from a YC process circuit (2) is supplied to a pedestal level recovery circuit (3).

Also, the blanking pulse and pedestal level signal from the process circuit (2) are supplied to the reproducing circuit (3).

In this device, from the process circuit (2) to the second
When a signal as shown in figure A and a blanking pulse as shown in figure B are supplied to the reproducing circuit (3), this reproducing circuit (
3) outputs a signal whose signal level other than the video period is clamped to the pedestal level as shown in C.

That is, the reproduction circuit (3) is composed of a circuit as shown in FIG. 3 for each color signal, and the signal from the process circuit (2) and the pedestal level are connected to the transistor (3)
1) A blanking pulse is supplied to the base of the transistor (32), and the base of the transistor (32) is grounded through the transistor (33), and a blanking pulse is supplied to the base of the transistor (33).
The reproduction output is taken out from the connection point of the emitter (32).

Therefore, according to this device, since the output signal of the reproducing circuit (3) is as shown in FIG. It is only necessary to keep the signal attenuated within the range of 0 to 1, and there is usually no need to attenuate the signal, so there is little risk of signal-to-noise ratio deterioration.

In addition, since the pedestal level formed here is saved up to the output of the DA converter circuit (6), the monitor receiver (7)
Even if pedestal clamping is performed within the camera, the pedestal level of this signal will be clamped to the black level of the receiver (7).
The received image will not look unnatural.

Furthermore, FIG. 4 shows another example of the device. In this example,
A signal from the YC process circuit (2) is supplied to a bottom clamp circuit (3a), and the lowest level of the signal is clamped to a predetermined value. This signal is supplied to the AD conversion circuit (4), the converted digital data is supplied to the pedestal level reproduction circuit (3b), and the process circuit (2)
A blanking pulse from the reproducing circuit (3b) is supplied to the reproducing circuit (3b).

This reproducing circuit (3b) is configured as shown in FIG. 5, for example. That is, the signal data and digital data corresponding to the pedestal level are supplied to a switch (34), and this switch (34) is switched by a blanking pulse to take out the reproduced output.

Therefore, in the device described above, the signal from the process circuit (2) is bottom clamped at a predetermined level to form a signal such as that shown in FIG. 6A, for example.

Here, the clamp level is determined so that the pedestal level (broken line) of the signal substantially matches the O level (dotted chain line) of the input of the AD conversion circuit (4). As a result, the AD conversion circuit (4) performs digital conversion in the form of slices below the O level, and the blanking pulse period (B in Figure 6) of this digital data is replaced with data corresponding to the pedestal level. be done.

For this reason, a signal with a blanking period set to the pedestal level is taken out from the DA conversion circuit (6) as shown in FIG.
Even if the pedestal is clamped with a lamp pulse as shown in D, the correct level of image reception is achieved.

Also in the AD conversion circuit (4), since the signal range of the supplied video signal is included in the dynamic range, there is no risk of S/N deterioration due to signal attenuation or the like.

〔Effect of the invention〕

According to the present invention, since attenuation is not performed during AD conversion, there is no deterioration of the S/N of the signal, and since the pedestal level of the signal is reproduced, the received image does not become unnatural. Became.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an example of the present invention, Figs. 2 and 3 are diagrams for explaining the same, Fig. 4 is a block diagram of another example, and Figs. 5 and 6 are for explanation thereof. , FIG. 7, and FIG. 8 are diagrams for explaining the conventional closing device. +11 is chainer, (2) is YC process circuit, (3)
is a pedestal level regeneration circuit, (4) is an AD conversion circuit,
(5) is a double speed processing circuit, (6) is a DA conversion circuit, (7)
is a monitor receiver. (Clan 7n ψ Lusun

Claims (1)

[Claims] In a digital processing device for a video signal, which performs AD conversion on a video signal, performs desired processing, and then outputs the DA conversion, the blanking period of the AD-converted video signal is clamped at a predetermined level; A digital processing device for a video signal, wherein the signal range of the video signal is included in the dynamic range of the AD conversion.