JPH0193836U - - Google Patents
Info
- Publication number
- JPH0193836U JPH0193836U JP19040487U JP19040487U JPH0193836U JP H0193836 U JPH0193836 U JP H0193836U JP 19040487 U JP19040487 U JP 19040487U JP 19040487 U JP19040487 U JP 19040487U JP H0193836 U JPH0193836 U JP H0193836U
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- input
- power source
- current switching
- switching type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
Description
第1図aは本考案によるレベル変換回路、第1
図bは本考案によるレベル変換回路の入力電圧付
トランジスタQ1のベース電位を表わす図、第2
図aは従来のレベル変換回路、第2図bは従来の
レベル変換回路の入力電圧付トランジスタQ1の
ベース電位を表わす図、第2図cは従来のレベル
変換回路の入・出力波形図である。
Q1,Q2……トランジスタ、D1,D2,D
3,D4,D5,D6,D7,D8……ダイオー
ド、R1,R2,R3,R4,R5,R6,R7
……抵抗、I0……定電流源。
Figure 1a shows the level conversion circuit according to the present invention,
Figure b is a diagram showing the base potential of the input voltage transistor Q1 of the level conversion circuit according to the present invention.
Figure a is a conventional level conversion circuit, Figure 2b is a diagram showing the base potential of transistor Q1 with input voltage in the conventional level conversion circuit, and Figure 2c is an input/output waveform diagram of the conventional level conversion circuit. be. Q 1 , Q 2 ...transistor, D 1 , D 2 , D
3 , D4 , D5 , D6 , D7 , D8 ...Diode, R1 , R2 , R3, R4 , R5 , R6 , R7
...Resistance, I 0 ... Constant current source.
Claims (1)
型論理回路と、前記論理回路の一方の入力に第1
の電位を与えるバイアス回路と、前記論理回路の
他方の入力に前記第1の電位より高い電位を与え
る第2のバイアス回路と、前記論理回路の他方の
入力にアノードが接続されたダイオードとを含み
、前記ダイオードのカソードと接地電源との間に
入力信号を入力し、前記電流切換型論理回路の負
荷から出力を取り出すことを特徴とするレベル変
換回路。 a current switching type logic circuit connected between a positive power source and a ground power source;
a second bias circuit that applies a potential higher than the first potential to the other input of the logic circuit, and a diode whose anode is connected to the other input of the logic circuit. , A level conversion circuit characterized in that an input signal is input between the cathode of the diode and a ground power source, and an output is taken out from the load of the current switching type logic circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19040487U JPH0193836U (en) | 1987-12-14 | 1987-12-14 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19040487U JPH0193836U (en) | 1987-12-14 | 1987-12-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0193836U true JPH0193836U (en) | 1989-06-20 |
Family
ID=31481380
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19040487U Pending JPH0193836U (en) | 1987-12-14 | 1987-12-14 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0193836U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115932A (en) * | 1981-12-28 | 1983-07-09 | Fujitsu Ltd | Level converting circuit |
JPS58177032A (en) * | 1982-04-08 | 1983-10-17 | Fujitsu Ltd | Level converting circuit |
JPS61293022A (en) * | 1985-06-20 | 1986-12-23 | Sony Corp | Ecl-ttl converting and outputting circuit |
-
1987
- 1987-12-14 JP JP19040487U patent/JPH0193836U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115932A (en) * | 1981-12-28 | 1983-07-09 | Fujitsu Ltd | Level converting circuit |
JPS58177032A (en) * | 1982-04-08 | 1983-10-17 | Fujitsu Ltd | Level converting circuit |
JPS61293022A (en) * | 1985-06-20 | 1986-12-23 | Sony Corp | Ecl-ttl converting and outputting circuit |
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