JPH0187575U - - Google Patents
Info
- Publication number
- JPH0187575U JPH0187575U JP18420487U JP18420487U JPH0187575U JP H0187575 U JPH0187575 U JP H0187575U JP 18420487 U JP18420487 U JP 18420487U JP 18420487 U JP18420487 U JP 18420487U JP H0187575 U JPH0187575 U JP H0187575U
- Authority
- JP
- Japan
- Prior art keywords
- electronic components
- ceramic substrate
- printing method
- back surfaces
- heat sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Description
第１図は本考案の実施例を示す断面図、第２図
は本考案の実施例を示す分解図、第３図は従来技
術の説明図である。
第１図において、１……第１セラミツク基板、
２……第２セラミツク基板、３……放熱板、４，
５……印刷方式により形成される電子部品、６，
７，８，９……他の電子部品、１０，１１……絶
縁層、１Ａ，２Ａ……裏面、１Ｂ，２Ｂ……表面
、３Ａ１，３Ａ２……対応面である。
FIG. 1 is a cross-sectional view showing an embodiment of the present invention, FIG. 2 is an exploded view of the embodiment of the present invention, and FIG. 3 is an explanatory diagram of the prior art. In FIG. 1, 1... a first ceramic substrate;
2... Second ceramic substrate, 3... Heat sink, 4,
5...Electronic components formed by printing method, 6,
7, 8, 9...other electronic components, 10, 11...insulating layer, 1A, 2A...back surface, 1B, 2B...front surface, 3A1, 3A2...corresponding surface.
Claims (1)
の各裏面１Ａ，２Ａに、印刷方式により形成され
る電子部品４，５を、 各表面１Ｂ，２Ｂに、中電力以上の電力を該電
子部品４，５以外の電子部品６，７，８，９を、
それぞれ搭載し、 該第１セラミツク基板１と第２セラミツク基板
２の上記裏面１Ａ，２Ａどうしを対向させて、放
熱板３の対応面３Ａ１，３Ａ２に、上記印刷方式
により形成される電子部品４，５を接着せしめた
ことを特徴とする混成集積回路基板の構造。[Scope of claims for utility model registration] First ceramic substrate 1 and second ceramic substrate 2
Electronic components 4, 5 formed by a printing method are placed on the back surfaces 1A, 2A of the electronic components 6, 7, 8, other than the electronic components 4, 5, and electric power of medium or higher is applied to the front surfaces 1B, 2B. 9,
Electronic components 4, which are formed by the above-described printing method, are mounted on the corresponding surfaces 3A1, 3A2 of the heat sink 3, with the back surfaces 1A, 2A of the first ceramic substrate 1 and the second ceramic substrate 2 facing each other, respectively. A structure of a hybrid integrated circuit board characterized by bonding 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18420487U JPH0187575U (en) | 1987-12-02 | 1987-12-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18420487U JPH0187575U (en) | 1987-12-02 | 1987-12-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0187575U true JPH0187575U (en) | 1989-06-09 |
Family
ID=31475581
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18420487U Pending JPH0187575U (en) | 1987-12-02 | 1987-12-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0187575U (en) |
-
1987
- 1987-12-02 JP JP18420487U patent/JPH0187575U/ja active Pending
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