JPH0179850U - - Google Patents
Info
- Publication number
- JPH0179850U JPH0179850U JP1987175947U JP17594787U JPH0179850U JP H0179850 U JPH0179850 U JP H0179850U JP 1987175947 U JP1987175947 U JP 1987175947U JP 17594787 U JP17594787 U JP 17594787U JP H0179850 U JPH0179850 U JP H0179850U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- heat sink
- circuit board
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 2
- 238000009413 insulation Methods 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図は本考案の実施例を示す斜視図、第２図
は第１図の−断面図、第３図は従来例を示す
斜視図である。
１……混成集積回路基板、２……導電路、３…
…ヒートシンク、４……パワー半導体素子、５…
…絶縁部材、６……アーム、７……半田。
FIG. 1 is a perspective view showing an embodiment of the present invention, FIG. 2 is a cross-sectional view taken from FIG. 1, and FIG. 3 is a perspective view showing a conventional example. 1... Hybrid integrated circuit board, 2... Conductive path, 3...
...Heat sink, 4...Power semiconductor element, 5...
...Insulating member, 6...Arm, 7...Solder.
Claims (1)
ヒートシンクに超音波振動を加え、混成集積回路
基板上の所定位置に前記ヒートシンクが固着され
た混成集積回路において、前記ヒートシンクの周
囲を囲む枠状の絶縁部材を前記混成集積回路基板
上に配置したことを特徴とする混成集積回路。 In a hybrid integrated circuit in which ultrasonic vibration is applied to a heat sink with good thermal conductivity to which a power semiconductor element is fixed, and the heat sink is fixed at a predetermined position on a hybrid integrated circuit board, a frame-shaped insulation surrounding the heat sink is formed. A hybrid integrated circuit characterized in that a member is arranged on the hybrid integrated circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987175947U JPH0179850U (en) | 1987-11-18 | 1987-11-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987175947U JPH0179850U (en) | 1987-11-18 | 1987-11-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0179850U true JPH0179850U (en) | 1989-05-29 |
Family
ID=31467720
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987175947U Pending JPH0179850U (en) | 1987-11-18 | 1987-11-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0179850U (en) |
-
1987
- 1987-11-18 JP JP1987175947U patent/JPH0179850U/ja active Pending
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