JPH01744A - Element isolation method in semiconductor devices - Google Patents
Element isolation method in semiconductor devicesInfo
- Publication number
- JPH01744A JPH01744A JP63-11266A JP1126688A JPH01744A JP H01744 A JPH01744 A JP H01744A JP 1126688 A JP1126688 A JP 1126688A JP H01744 A JPH01744 A JP H01744A
- Authority
- JP
- Japan
- Prior art keywords
- element isolation
- nitride film
- region portion
- film
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000002955 isolation Methods 0.000 title claims description 46
- 239000004065 semiconductor Substances 0.000 title claims description 15
- 239000010408 film Substances 0.000 claims description 46
- 238000007254 oxidation reaction Methods 0.000 claims description 22
- 230000003647 oxidation Effects 0.000 claims description 19
- 239000010409 thin film Substances 0.000 claims description 18
- 150000004767 nitrides Chemical class 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- 239000000654 additive Substances 0.000 claims description 7
- 230000000996 additive effect Effects 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 150000002500 ions Chemical class 0.000 claims description 6
- 230000003071 parasitic effect Effects 0.000 claims description 6
- 230000001737 promoting effect Effects 0.000 claims description 6
- 230000000873 masking effect Effects 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 22
- 229910052581 Si3N4 Inorganic materials 0.000 description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- 229910052814 silicon oxide Inorganic materials 0.000 description 14
- 229910052786 argon Inorganic materials 0.000 description 11
- 230000000694 effects Effects 0.000 description 6
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 101100269328 Caenorhabditis elegans aff-1 gene Proteins 0.000 description 1
- 241000293849 Cordylanthus Species 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000009545 invasion Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は、半導体装置における素子分離方法に関する
ものであり、特に、素子分離用の酸化膜の形成に改良が
加えられた、半導体装置における素子分離方法に関する
ものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an element isolation method in a semiconductor device, and in particular, to an element isolation method in a semiconductor device in which an improvement has been made to the formation of an oxide film for element isolation. This relates to a separation method.
［従来の技術］
半導体集積回路のシリコン結晶内は、素子分離用の酸化
膜によって、色々の領域に分けられている。[Prior Art] The inside of a silicon crystal of a semiconductor integrated circuit is divided into various regions by oxide films for element isolation.
図を用いて、従来の半導体装置における素子分離方法を
説明する。A conventional element isolation method in a semiconductor device will be explained with reference to the drawings.
第３Ａ図および第３Ｂ図は、従来の半導体装置における
素子分離方法の工程を断面図で示したものである。FIGS. 3A and 3B are cross-sectional views showing the steps of a conventional element isolation method in a semiconductor device.
シリコン基板１上に下地の酸化薄膜であるシリコン酸化
膜２を形成し、その上に窒化膜であるシリコン窒化膜３
を形成する。次いで、素子領域部分４をフォトレジスト
でマスクし、素子分離領域部分５のシリコン窒化膜３を
エツチング除去する。A silicon oxide film 2, which is a base oxide thin film, is formed on a silicon substrate 1, and a silicon nitride film 3, which is a nitride film, is formed on it.
form. Next, the element region portion 4 is masked with a photoresist, and the silicon nitride film 3 in the element isolation region portion 5 is removed by etching.
次いで、シリコン窒化膜３が除去された素子分離領域部
分５に素子間寄生チャネル防止用のイオン６を注入する
。素子間寄生チャネル防止用のイオン６には、たとえば
ボロンを用いる。これは、半導体素子同士が電気的につ
ながるのを防止するためのものである。Next, ions 6 for preventing inter-element parasitic channels are implanted into the element isolation region portion 5 from which the silicon nitride film 3 has been removed. For example, boron is used as the ions 6 for preventing parasitic channels between elements. This is to prevent the semiconductor elements from being electrically connected to each other.
その後、フォトレジストを除去し、素子領域部分４に残
っているシリコン窒化膜３をマスクとし、素子分離領域
部分らの下地シリコン酸化薄膜２をさらに酸化して素子
分離用のシリコン酸化膜７を形成する。Thereafter, the photoresist is removed, and using the silicon nitride film 3 remaining in the element region 4 as a mask, the underlying silicon oxide thin film 2 in the element isolation region is further oxidized to form a silicon oxide film 7 for element isolation. do.
次いで、シリコン窒化膜３を熱リン酸等でウェット処理
し除去した後、素子領域部分４の下地酸化薄膜をたとえ
ば１０％フッ化水素水溶液を用いてエツチング除去する
。すると、素子領域部分４のシリコン基板１が露出する
。こうして素子分離か達成される。Next, after the silicon nitride film 3 is removed by wet treatment with hot phosphoric acid or the like, the base oxide thin film in the element region portion 4 is removed by etching using, for example, a 10% hydrogen fluoride aqueous solution. Then, the silicon substrate 1 in the element region portion 4 is exposed. In this way, element isolation is achieved.
［発明が解決しようとする課題］
しかしながら、素子分離方法においては、前述のごとく
、素子分離領域部分５の下地シリコン酸化薄膜２をさら
に酸化して、素子分離用シリコン酸化膜７を形成する。[Problems to be Solved by the Invention] However, in the element isolation method, as described above, the underlying silicon oxide thin film 2 in the element isolation region portion 5 is further oxidized to form the element isolation silicon oxide film 7.
このとき酸化反応は等方的に進むので、酸化がシリコン
窒化膜３の下にも潜り込んで起こる。そのため、シリコ
ン酸化膜７が、第３Ｂ図に示すように、鳥の嘴状（Ｂｉ
ｒｄｓｂ ｅ ａ ｋ）に形成される。その結果、マス
ク寸法と出来上がり寸法との間に大きな差が生じる。こ
のような状態で、たとえばトランジスタを形成した場合
、トランジスタの幅が制限されてしまい問題であった。At this time, since the oxidation reaction proceeds isotropically, the oxidation also sneaks under the silicon nitride film 3. Therefore, the silicon oxide film 7 has a bird's beak shape (Bi
rdsb e a k). As a result, a large difference occurs between the mask dimensions and the finished dimensions. For example, when a transistor is formed in such a state, the width of the transistor is limited, which is a problem.
この発明は上記のような問題点を解決するためになされ
たもので、素子領域部分にまで酸化が及ぶのを抑えるこ
とのできる“半導体装置における素子分離方法”を提供
することを目的とする。The present invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a "device isolation method in a semiconductor device" that can prevent oxidation from reaching the device region.
［課題を解決するための手段］
この発明は、半導体基板上に下地の酸化薄膜を形成し、
その上に窒化膜を形成した後、素子領域をフォトレジス
トでマスクし、素子分離領域部分の前記窒化膜をエツチ
ング除去し、次いで、前記窒化膜が除去された前記素子
分離領域部分に素子間寄生チャネル防止用のイオンを注
入し、
その後、前記フォトレジストを除去し、前記素子領域部
分に残っている前記窒化膜をマスクとし、前記素子分離
領域部分の下地酸化薄膜をさらに酸化して素子分離用の
酸化膜を形成し、
次いで、前記窒化膜を除去した後、前記素子領域部分の
前記下地酸化薄膜をエツチング除去することにより、素
子領域部分のシリコン基板を露出させる、半導体装置に
おける素子分離方法に係るものである。そして、前記問
題点を解決するために、前記素子分離用の酸化膜の形成
に先立ち、少なくとも前記素子分離領域部分の下地酸化
薄膜中に酸化促進用添加物を注入することを特徴とする
。[Means for Solving the Problems] This invention forms a base oxide thin film on a semiconductor substrate,
After forming a nitride film thereon, the device region is masked with a photoresist, and the nitride film in the device isolation region portion is removed by etching, and then inter-device parasitics are generated in the device isolation region portion from which the nitride film has been removed. Ions are implanted for channel prevention, and then the photoresist is removed, and using the nitride film remaining in the element region as a mask, the base oxide thin film in the element isolation region is further oxidized for element isolation. an oxide film is formed, and then, after removing the nitride film, the base oxide thin film in the element region portion is etched away to expose the silicon substrate in the element region portion. This is related. In order to solve the above problem, an oxidation promoting additive is injected into the base oxide thin film at least in the element isolation region prior to forming the element isolation oxide film.
［作用］
素子分離用の酸化膜の形成に先立ち、少なくともド地酸
化薄膜中に酸化促進用添加物を注入するので、酸化時に
素子分離領域の酸化速度が速まり、素子領域部分にまで
酸化反応が及ぶ前に酸化が終了する。[Function] Prior to the formation of the oxide film for element isolation, an oxidation promoting additive is injected into at least the base oxide thin film, so the oxidation rate of the element isolation region is accelerated during oxidation, and the oxidation reaction extends to the element region. Oxidation ends before
［実施例］ 以下、この発明の実施例を図について説明する。[Example] Embodiments of the present invention will be described below with reference to the drawings.
第１Ａ図、第１Ｂ図および第１Ｃ図はこの発明の一実施
例を示した図である。FIG. 1A, FIG. 1B, and FIG. 1C are diagrams showing one embodiment of the present invention.
シリコン基板１上に下地の酸化薄膜であるシリコン酸化
薄膜２を形成し、その上に窒化膜であるシリコン窒化膜
３を形成する。A silicon oxide thin film 2, which is a base oxide thin film, is formed on a silicon substrate 1, and a silicon nitride film 3, which is a nitride film, is formed thereon.
次いで、素子領域部分４をフォトレジストでマスクしく
図示せず）、素子分離領域部分５の窒化膜３をエツチン
グ除去する（第１Ａ図）。Next, the element region portion 4 is masked with a photoresist (not shown), and the nitride film 3 in the element isolation region portion 5 is removed by etching (FIG. 1A).
次いで、シリコン窒化膜３が除去された素子分離領域部
分５に素子間寄生チャネル防止用のイオン６を注入する
（第１Ａ図）。Next, ions 6 for preventing inter-element parasitic channels are implanted into the element isolation region portion 5 from which the silicon nitride film 3 has been removed (FIG. 1A).
その後、フォトレジストを除去する（図示せず）。そし
て、この後、ＣＶＤ法によりシリコン基板１全而をアル
ゴンガス８にさらす。すると、素子分Ａｆｆ１頭域８１
≦分５の下地シリコン酸化薄膜２巾にアルゴン８が注入
される（第１Ｂ図）。この場合、アルゴン８は、シリコ
ン窒化膜３てマスクされている素子領域部分４のシリコ
ン酸化膜２の部分にはまわり込まない。その結果、アル
ゴン８は、シリコン窒化膜３でマスクされていない素子
分離領域部分５にある、シリコン酸化膜２にのみ注入さ
れることになる。Thereafter, the photoresist is removed (not shown). Thereafter, the entire silicon substrate 1 is exposed to argon gas 8 using the CVD method. Then, the element Aff1 head area 81
Argon 8 is injected into two widths of the underlying silicon oxide thin film at a time of ≦5 (FIG. 1B). In this case, argon 8 does not go around to the silicon oxide film 2 in the element region portion 4 that is masked by the silicon nitride film 3. As a result, argon 8 is injected only into the silicon oxide film 2 in the element isolation region portion 5 that is not masked by the silicon nitride film 3.
一アルゴン８は酸化を促進させる作用かある。Argon 8 has the effect of promoting oxidation.
したかって、アルゴン８が注入された素子分離領域部分
５の酸化速度は十分に速くなり、シリコン窒化膜３下に
潜り込む前に、酸化が完了する（第１Ｃ図）。Therefore, the oxidation rate of the element isolation region portion 5 into which argon 8 has been implanted becomes sufficiently high, and the oxidation is completed before it gets under the silicon nitride film 3 (FIG. 1C).
したがって、従来例に見られたような、（′４の嘴状の
酸化膜の形成を抑制することが可能となる。Therefore, it is possible to suppress the formation of a beak-shaped oxide film ('4) as seen in the conventional example.
この酸化の後、シリコン窒化膜３を熱リン酸でウェット
処理し、除去し、下地のシリコン酸化薄膜２を約１０％
のフッ化水素水溶液でエツチング除去すれば、素子領域
部分４のシリコン基板が露出する（図示せず）。こうし
て素子分離が達成される。After this oxidation, the silicon nitride film 3 is wet-treated with hot phosphoric acid and removed, leaving about 10% of the underlying silicon oxide thin film 2.
When removed by etching with a hydrogen fluoride aqueous solution, the silicon substrate in the element region portion 4 is exposed (not shown). In this way, element isolation is achieved.
第２Ａ図、第２Ｂ図および第２Ｃ図はこの発明の他の実
施例を示したものである。第２Ａ図、第２Ｂ図および第
２Ｃ図に示す実施例は、以下の点を除いて第１Ａ図、第
１Ｂ図および第１Ｃ図に示す上述の実施例と同様であり
、を目当する部分には同一の参照番号を付し、その説明
を省略する。FIGS. 2A, 2B and 2C show other embodiments of the invention. The embodiment shown in FIGS. 2A, 2B, and 2C is similar to the above-described embodiment shown in FIGS. 1A, 1B, and 1C, with the following exceptions: are given the same reference numerals and their explanations will be omitted.
上述の実施例と異なる点は、ＣＶＤ法によりシリコン基
板１全面をアルゴンガス８にさらすときにおいて（第２
Ｂ図）照）、素子分離領域部分５の下地シリコン酸化薄
膜２中だけでなく、その直下のシリコン基板１にもアル
ゴン８を注入する点である。アルゴンガス８をさらすと
き、時間を調節すると、このようにすることが可能とな
る。このようにすることにより、酸化時に素子分離領域
５の酸化速度が一層速まり、シリコン窒化膜３下に潜り
込む前に、酸化が完了するという上記効果を一層高める
ことができる。The difference from the above embodiment is that when the entire surface of the silicon substrate 1 is exposed to argon gas 8 by the CVD method (the second
In Figure B), argon 8 is injected not only into the base silicon oxide thin film 2 of the element isolation region portion 5 but also into the silicon substrate 1 directly below it. This can be done by adjusting the time when exposing the argon gas 8. By doing so, the oxidation rate of the element isolation region 5 during oxidation is further increased, and the above-mentioned effect that the oxidation is completed before it gets under the silicon nitride film 3 can be further enhanced.
なお、上記実施例では、酸化促進用添加物にアルーｆン
を用いた場合を示したが、この発明はこれに限られるも
のでなく、水素等の他の酸化促進用添加物を用いても実
施例と同様の効果を実現する。In addition, although the above-mentioned example showed the case where Alfon was used as the oxidation-promoting additive, the present invention is not limited to this, and it is also possible to use other oxidation-promoting additives such as hydrogen. The same effect as the embodiment is achieved.
また、上記実施例では、ＣＶＤ法によりアルゴンを添加
したが、イオン注入を用いても同様の効果を実現する。Further, in the above embodiment, argon was added by the CVD method, but the same effect can be achieved by using ion implantation.
さらに、上記実施例では、酸化促進用添加物の注入をフ
ォトレジストマスク除去後に行なった場合を示したか、
フォトレジストマスク除去前に行なうと、シリコン窒化
膜３への侵入をより一層防止することができる。Furthermore, in the above example, the case where the oxidation promoting additive was implanted after the photoresist mask was removed,
If this is done before removing the photoresist mask, invasion into the silicon nitride film 3 can be further prevented.
したがって、本明細書に記載した好ましい実施例は例示
的なものであり、限定的なものでない。Accordingly, the preferred embodiments described herein are intended to be illustrative and not restrictive.
発明の範囲は特許請求の範囲によって示されており、そ
の特許請求の範囲の意味の中に入るすべての変形は本願
発明に含まれるものである。The scope of the invention is indicated by the claims, and all modifications that fall within the meaning of the claims are intended to be included in the present invention.
［発明の効果］
以上説明したように、この発明に係る半導体装置におけ
る素子分離方法によれば、素子分離用の酸化膜の形成に
先立ち、少なくとも素子分離領域部分の下地酸化薄ｊ漠
中に酸化促進用添加物を注入して行なうので、素子分離
領域部分における酸化速度が速まり、素子領域部分にま
で酸化反応が及ぶ前に、酸化が終了する。その結果、マ
スク寸法と出来上がり寸法との差を縮小することができ
る。[Effects of the Invention] As explained above, according to the element isolation method in a semiconductor device according to the present invention, prior to forming an oxide film for element isolation, oxidation is applied to at least a thin base oxide layer in the element isolation region. Since the promoting additive is implanted, the oxidation rate in the device isolation region increases, and the oxidation is completed before the oxidation reaction reaches the device region. As a result, the difference between the mask dimensions and the finished dimensions can be reduced.
結果として、本発明によって製造された半導体装置は、
素子領域を十分に広く活用することができるという効果
を奏する。As a result, the semiconductor device manufactured according to the present invention has
This has the effect that the element area can be utilized sufficiently widely.
第１Ａ図、第１Ｂ図、第１Ｃ図はこの発明の一実施例を
説明するための工程を断面図で示したものである。第２
Ａ図、第２Ｂ図および第２Ｃ図は本発明の他の実施例の
工程を断面図で示したものである。第３Ａ図および第３
Ｂ−は従来の半導体装置における素子分離方法の工程を
断面図で示したものである。
図において、１はシリコン基板、２はシリコン酸化膜、
３はシリコン窒化膜、４は素子領域部分、５は素子分離
領域部分、６は素子間寄生チャネル防１１−用イオン、
７は素子分離用シリコン酸化膜、８はアルゴンである。
なお、各図中、同一符号は同一または１０当部分を示す
。FIGS. 1A, 1B, and 1C are sectional views showing steps for explaining an embodiment of the present invention. Second
Figures A, 2B, and 2C are cross-sectional views showing the steps of another embodiment of the present invention. Figures 3A and 3
B- is a cross-sectional view showing steps of an element isolation method in a conventional semiconductor device. In the figure, 1 is a silicon substrate, 2 is a silicon oxide film,
3 is a silicon nitride film, 4 is an element region portion, 5 is an element isolation region portion, 6 is an ion for preventing parasitic channels between elements 11-,
7 is a silicon oxide film for element isolation, and 8 is argon. In addition, in each figure, the same code|symbol shows the same or the 10th part.
Claims (1)
に窒化膜を形成した後、 素子領域をフォトレジストでマスクし、素子分離領域部
分の前記窒化膜をエッチング除去し、次いで、前記窒化
膜が除去された前記素子分離領域部分に素子間寄生チャ
ネル防止用のイオンを注入し、 その後、前記フォトレジストを除去し、前記素子領域部
分に残っている前記窒化膜をマスクとし、前記素子分離
領域部分の下地酸化薄膜をさらに酸化して素子分離用の
酸化膜を形成し、 次いで、前記窒化膜を除去した後、前記素子領域部分の
前記下地酸化薄膜をエッチング除去することにより、前
記素子領域部分のシリコン基板を露出させる、半導体装
置における素子分離方法において、 前記素子分離用の酸化膜の形成に先立ち、少なくとも前
記素子分離領域部分の下地酸化薄膜中に酸化促進用添加
物を注入することを特徴とする、半導体装置における素
子分離方法。(1) After forming a base oxide thin film on a semiconductor substrate and forming a nitride film on it, masking the element region with a photoresist, etching away the nitride film in the element isolation region, and then removing the nitride film in the element isolation region. Ions for preventing inter-element parasitic channels are implanted into the element isolation region portion from which the nitride film has been removed, and then the photoresist is removed and the nitride film remaining in the element region portion is used as a mask to remove the element. The base oxide thin film in the isolation region portion is further oxidized to form an oxide film for element isolation, and then, after the nitride film is removed, the base oxide thin film in the element region portion is etched away. In an element isolation method in a semiconductor device in which a silicon substrate in a region portion is exposed, an oxidation promoting additive is injected into a base oxide thin film in at least the element isolation region portion prior to forming the element isolation oxide film. A method for isolating elements in a semiconductor device, characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1126688A JPS64744A (en) | 1987-03-30 | 1988-01-20 | Element isolation method in semiconductor device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62-79131 | 1987-03-30 | ||
| JP7913187 | 1987-03-30 | ||
| JP1126688A JPS64744A (en) | 1987-03-30 | 1988-01-20 | Element isolation method in semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01744A true JPH01744A (en) | 1989-01-05 |
| JPS64744A JPS64744A (en) | 1989-01-05 |
Family
ID=26346682
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1126688A Pending JPS64744A (en) | 1987-03-30 | 1988-01-20 | Element isolation method in semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS64744A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5372952A (en) * | 1992-04-03 | 1994-12-13 | National Semiconductor Corporation | Method for forming isolated semiconductor structures |
| US5707888A (en) * | 1995-05-04 | 1998-01-13 | Lsi Logic Corporation | Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation |
| US5869385A (en) * | 1995-12-08 | 1999-02-09 | Advanced Micro Devices, Inc. | Selectively oxidized field oxide region |
-
1988
- 1988-01-20 JP JP1126688A patent/JPS64744A/en active Pending
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