JPS61100944A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To achieve the miniaturization and stable supply of the ultra LSI like the memory device, etc. by suppressing the growth of bird's beak and improving the electric characteristics with the stacking and step difference of polycrystal silicon film and the side wall of silicon nitride. CONSTITUTION:The first pad silicon oxide film 2 is formed by the thermal oxidation of the <100> silicon substrate 1 on which p-well and n-well are formed. On the film 2, the polycrystal silicon film 3, the first silicon nitride film 4 and the first CVD silicon oxide film 5, the buffer for forming the side wall, are formed by the vapor growth. After these, the vapor growth films 5, 4 and 3 of the field part are undergone the selective etching with RIE. After the ion implantation of boron and phosphorus into the stopper region 6, the second silicon nitride film 7 and the second CVD silicon oxide film 8 are formed by vapor growth. Then the side walls of the vapor growth films 7 and 8 are formed by etching of RIE. After the hydro-fluoric acid etching of the CVD silicon oxide film 5 and 8, the field oxide film 9 for separation is formed by thermal oxidation. And then the etching of silicon nitride film 4 and 7 with thermal phosphoric acid, the etching of polycrystal silicon film 3 with mixed liquid of nitric acid and hydro-fluoric acid and the etching of the pad silicon oxide film 2 with hydro- fluoric acid are performed respectively.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to an element isolation technique for electrically insulating each element on a semiconductor substrate.
This is related to miniaturization.

[Conventional technology]

Conventionally, a selection technique called the LOC, OS method using a silicon nitride film as a mask has been widely used for element isolation of, for example, MOS-LSI. In this method, a silicon nitride film is coated on the part that will become the active region and a silicon oxide film is formed on the field. However, as the silicon oxide film in the field grows, it digs into the bottom of the silicon nitride film, creating a so-called bird's beak. Formed and patterned, designed.

It has been difficult to supply integrated circuits with a fine rule (1.5 micrometers or less) because it is necessary to have a large dimensional margin in manufacturing.

On the other hand, JP-A-55-165657. Japanese Patent Publication No. 56-905
41, JP-A-57-170548, and literature, Y, 0
hiu, et al 工EDMDig, Tech, P
aper P224 (1982) and Sawaaa, e
t'al Flfxt A-btract
Vow B5-2 VC8Fall
Meeting P492 0at.

(1983), an isolation technique has been proposed that utilizes the sidewalls of a silicon oxide film or silicon nitride film by anisotropic etching to reduce bird's beak. The device isolation process is shown in FIG. A first layer is formed on the surface of the silicon substrate 21.
pad silicon oxide film 22 and first silicon nitride film 2
4 and a CVD silicon oxide film 25 for protecting the first silicon nitride film 24 during sidewall formation are sequentially formed. IC (Reactive engineering)
After exposing the silicon substrate 21 in the field region by selectively etching it with a 1litcher), the silicon substrate 21 is etched to a depth of about 0.2 to 13 μm with an R process using a KOH solution or chlorine gas. from,
A channel stopper region 26 is formed by ion implantation (FIG. 2-α). Next, a second pad silicon oxide film 25 is formed by thermal oxidation, and then a second silicon nitride film 27 and a second CVD silicon oxide film 28 are grown in a vapor phase (FIG. 2-b). Etch back with process E and the second CVD
The side walls of the silicon oxide film 28 and the silicon nitride film 27 are formed (FIG. 2-C), and then the first. After removing the second CVD silicon oxide jQ24, 2B with hydrofluoric acid, it is thermally oxidized to form a field oxide film 29 for isolation (FIG. 2-d). At this time, the second silicon nitride gland 2ytv side M serves to prevent the bird's beak from entering the device region. After this, the first
．． After removing the second silicon nitride films 24 and 27 and the first pad silicon oxide film 22, elements such as MOS transistors are formed (FIG. 2-1). Here, 50 is the gate class and 51 is the gate class.

[Problem that the invention seeks to solve]

However, in the above manufacturing method, although the bird's beak is reduced compared to the LOOO8 method, there are problems with the electrical characteristics and reliability of the element built in the active region, and the ji1m property.
There was no stable supply of semiconductor integrated circuits with fine rules. That is, the conventional manufacturing method has the following drawbacks.

First, when patterning the active region and etching the silicon nitride film and silicon oxide film when forming sidewalls, simultaneous etching is performed using RfE using Freon-based or chlorine-based gas, but taking into account the thickness variation of the film to be etched. In this case, it is necessary to increase the selectivity with respect to the silicon substrate and perform excessive etching, and at this time, the gaps between the silicon substrates are exposed to ion beams and plasma, causing crystal defects due to roughness and damage. Also, when forming grooves on a silicon substrate, R process E
In this case, the damage is large and the groove side surfaces become vertical or reversely tapered, and the implanted impurity for the channel stopper cannot enter the active region interface where there is a lot of damage, so wet etching with KOH solution etc. is performed to taper the groove vA surface. However, side etching and refining are poor, the loading effect is large, and there is a high risk of alkali ions being mixed into the MO8 process, making it impractical for practical mass production and lacking in reliability.

Furthermore, in the shape of a manufactured MOS transistor, a crystal orientation different from that on the surface appears at both ends in the channel direction, so especially when using a silicon substrate, this may be affected by the degree of insertion of the stopper. In the N channel, the subthreshold characteristics at both ends cause downstream leakage,
This tendency has a negative effect as the channel width becomes narrower.

These results result in poor bonding characteristics as shown in FIG. 5, 52, and VG-4 characteristics as shown in FIG. 4, 42, for example. 55.
45 is based on the LOOO8 method.

Therefore, the present invention is intended to solve the above-mentioned problems, and its purpose is to suppress the growth of bird's beaks in a practical mass production process and to provide a fine device having an element isolation structure with excellent electrical characteristics. Our goal is to provide a stable supply of semiconductor integrated circuits that meet the rules.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the steps of forming at least a co-polycrystalline silicon film and a first silicon nitride film on an active region forming portion of a semiconductor substrate, and a second silicon nitride film on a side surface of the formed film.
a step of forming a silicon nitride film of the first step; a step of forming an isolation oxide film using the second silicon nitride film as a mask; a step of removing the first and second silicon nitride films and the polycrystalline silicon film; It is characterized by having a step of forming an element in the region.

[Effect]

The effects of the present invention are as follows: Grooves are formed by laminating polycrystalline silicon, and the silicon substrate is not etched, so crystal defects do not occur on the field surface or at the interface with the active region, and the deterioration of the electrical characteristics of the device is prevented. The bird's beak is suppressed by the polycrystalline silicon film and the sidewalls of the silicon nitride film.

〔Example〕

Hereinafter, the present invention will be described in detail based on examples.

FIG. 1 is a diagram showing an embodiment of the present invention in order of steps. First, a polycrystalline silicon film 3 of about 500X and a first pad of about 1500
The silicon nitride film 4 and the first buffer for forming sidewalls are
After 5sooX vapor phase growth of OVD silicon oxide &A5, the vapor phase grown kA 5m's 5 in the field area was selectively etched with RYE using a photoresist as a mask (FIG. 1-α). At this time, the first CVD silicon oxide film 5 and silicon nitride film 4 are OHF, +C87
Polycrystalline silicon group 3 is etched continuously using 6 gases.
is S7・+c a tv, +aHaty! With gas,
Although anisotropic etching was performed for each, silicon a & a4
The underlying polycrystalline silicon is removed by over-etching after removal.
f! , the film 5 is exposed to the ion beam and the surface is damaged, but this part will be removed in a later process and the etching of the polycrystalline silicon group 3 will have a large selectivity with respect to the silicon oxide film. , the first pad silicon oxide film 2 remains as it is, and does not cause any damage to the underlying silicon substrate 1. Note that if the thickness of the polycrystalline silicon film 5 is less than 1000X, the effect of suppressing bird's beak is small, and if it is more than 4000A, the pattern lines become jagged during etching in RE etching.

Next, after boron and phosphorus ions are implanted into the stopper region 6 for preventing field inversion, the second silicon nitride film 7 is deposited at 400X and the second CVD silicon oxide film 8 is deposited at 500X.
After vapor phase growth (Fig. 1-b), etching back with RXm is performed to form side walls of the vapor phase growth film 7.8 (Fig. 1-b).
Next, the first and second CVD silicon oxide films 5.8 are etched with hydrofluoric acid, and then a field oxide film 9 for isolation is formed by thermal oxidation. The silicon nitride film 4.7 of the second pad is treated with hot phosphoric acid, the polycrystalline silicon film 3 is treated with a mixed solution of nitric acid, and the first pad silicon oxide film 2 is treated with hydrofluoric acid. ), and then elements such as MO3) transistors were formed in the active region.

The bird's beak of the device that has gone through the above process is less than 115 of the LOCOS method, which is MO8), which has been a problem in the past.
The electrical characteristics of transistors, etc. are also shown at 54 in Figure S and 44 in Figure 4.
It has been improved as follows. Furthermore, etching of the single crystal silicon substrate, which is difficult to control, is no longer necessary, and the shape and flatness near the boundary of the active region are improved. Using this process, stable mass production of 2256 S RAMs and the like using the 1.2μ rule was made possible, and the yield was improved.

One embodiment of the present invention has been described above. During the etch pack, the first silicon nitride film 4 remains to the extent that it has an effect as an oxidation-resistant film, and the second silicon nitride film 4 remains.

As long as the sidewalls of the silicon nitride gQ7 are formed, the thickness of the second CVD silicon oxide film 5 is not limited and may be omitted.

In addition, instead of the polycrystalline silicon film, an f-mol7as silicon film, a high melting point metal film, or its silicide film can also be used, and this separation process is applicable not only to the MO8 structure but also to the parapolar structure.
It can be applied to semiconductor devices with structured elements.

〔Effect of the invention〕 .

The effects of the present invention are that the stacked layers and steps of the polycrystalline silicon film and the sidewalls of the silicon nitride film suppress the growth of bird's beak and improve the electrical characteristics, allowing for the miniaturization and stable supply of ultra-r and +s processes such as memories. Ta.

[Brief explanation of drawings]

FIGS. 1(α) to 1(g) are cross-sectional views of the manufacturing process of the semiconductor device of the present invention. FIGS. 2 (α) to (5') are cross-sectional views of the manufacturing process of a conventional semiconductor device. FIG. 3 shows the junction leakage characteristics, and FIG. 4 shows the 7()-JT'o characteristics of a MOS transistor. 1.21...Silicon substrate near, 22...First pad silicon oxide film 3...Polycrystalline silicon film 4.24...
...First silicon nitride film 5.25 ...First CVN silicon oxide film 6.26 ... Stopper region 7.27 ... Second silicon Nitride film 8.28・
...Second OVD silicon oxide film 9.29...
...Field oxide film 10.50...Gate film 11.31...Gate electrode or more

Claims (1)

[Claims] a step of forming at least a co-polycrystalline silicon film and a first silicon nitride film on an active region formation portion of a semiconductor substrate; a step of forming a second silicon nitride film on a side surface of the formed film; and a step of forming a second silicon nitride film on a side surface of the formed film; , a step of forming an isolation oxide film using the second silicon nitride film as a mask, a step of removing the first and second silicon nitride films and the polycrystalline silicon film, and a step of removing the isolation oxide film when the isolation oxide film is not formed. A method for manufacturing a semiconductor device, comprising the step of forming an element in a region.