KR100245087B1 - Device isolation insulating film formation method of semiconductor device - Google Patents

Device isolation insulating film formation method of semiconductor device Download PDF

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KR100245087B1
KR100245087B1 KR1019960072133A KR19960072133A KR100245087B1 KR 100245087 B1 KR100245087 B1 KR 100245087B1 KR 1019960072133 A KR1019960072133 A KR 1019960072133A KR 19960072133 A KR19960072133 A KR 19960072133A KR 100245087 B1 KR100245087 B1 KR 100245087B1
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insulating film
forming
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device isolation
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KR19980053083A (en
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김영복
최근민
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김영환
현대전자산업주식회사
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    • H10W10/0121
    • H10P50/28
    • H10P50/283
    • H10W10/13

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  • Local Oxidation Of Silicon (AREA)

Abstract

본 발명은 반도체소자의 소자분리절연막 형성방법에 관한 것으로, 변화된 LOCOS 방법으로 상부면이 평탄화된 소자분리절연막 형성하는 방법에 있어서, 상기 반도체기판 상부에 제 1 절연막과 제 2 절연막을 형성하고 상기 제 2 절연막과 제 1 절연막을 식각하여 소자분리영역의 반도체기판을 노출시킨 다음, 상기 제 2 절연막과 제 1 절연막의 측벽에 제 3 절연막 스페이서를 형성하고 상기 제 2, 3 절연막을 마스크로 하여 상기 반도체기판을 일정깊이 식각하여 홈을 형성한 다음, 상기 반도체기판을 열산화시켜 제 4 절연막을 형성하고 상기 제 2, 3 절연막을 제거한 다음, 상기 반도체기판 상부에 제 5 절연막을 형성하고 상기 제 5 절연막과 제 1 절연막을 제거하여 상부면이 평탄화된 소자분리절연막을 형성함으로써 후속공정을 용이하게 하고 반도체소자의 누설전류를 감소시켜 반도체소자의 특성 및 신뢰성을 향상시키고 그에 따른 반도체소자의 고집적화를 가능하게 하는 기술이다.The present invention relates to a method for forming a device isolation insulating film of a semiconductor device, comprising: forming a device isolation insulating film having a flattened upper surface by a changed LOCOS method, wherein a first insulating film and a second insulating film are formed on the semiconductor substrate, and the second insulating film is formed on the semiconductor substrate. The second insulating film and the first insulating film are etched to expose the semiconductor substrate in the isolation region, and then a third insulating film spacer is formed on sidewalls of the second insulating film and the first insulating film, and the semiconductor is formed using the second and third insulating films as masks. After etching the substrate to a certain depth to form a groove, the semiconductor substrate is thermally oxidized to form a fourth insulating film, the second and third insulating films are removed, a fifth insulating film is formed on the semiconductor substrate, and the fifth insulating film is formed. And the first insulating film is removed to form a device isolation insulating film having a flat top surface, thereby facilitating subsequent processes and To reduce the set current is improve the characteristics and reliability of the semiconductor device and technique that enables high integration of the semiconductor device thereof.

Description

반도체소자의 소자분리절연막 형성방법Device isolation insulating film formation method of semiconductor device

본 발명은 반도체소자의 소자분리절연막 형성방법에 관한 것으로, 특히 트렌치를 매립하는 소자분리절연막의 손상을 방지하여 반도체소자의 특성 및 신뢰성을 향상시키는 기술에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a device isolation insulating film of a semiconductor device, and more particularly, to a technique of preventing damage to a device isolation insulating film filling a trench and improving characteristics and reliability of the semiconductor device.

고집적화라는 관점에서 소자의 집적도를 높이기 위해서는 각각의 소자 디맨젼(dimension)을 축소하는 것과, 소자간에 존재하는 분리영역(isolation region)의 폭과 면적을 축소하는 것이 필요하며, 이 축소정도가 셀의 크기를 좌우한다는 점에서 소자분리기술이 메모리 셀 사이즈(memory cell size)를 결정하는 기술이라고 할 수 있다.In order to increase the integration of devices in terms of high integration, it is necessary to reduce each device dimension and to reduce the width and area of isolation regions existing between devices. In terms of size, the device isolation technology is a technology for determining the memory cell size.

소자분리절연막을 제조하는 종래기술로는 절연막 분리방식의 로코스(LOCOS : LOCal Oxidation of Silicon, 이하에서 LOCOS라 함) 방법, 실리콘 기판 상부에 산화막, 다결정실리콘층, 질화막순으로 적층한 구조의 피.비.엘. (Poly-Buffed LOCOS, 이하에서 PBL 이라 함) 방법, 기판에 홈을 형성한 후에 절연물질로 매립하는 트렌치(trench)방법 등이 있다.Conventional methods for manufacturing device isolation insulating films include LOCOS (LOCOS: LOCOS) method, an oxide film, a polysilicon layer, and a nitride film stacked on top of a silicon substrate. B.L. (Poly-Buffed LOCOS, hereinafter referred to as PBL), a trench method in which a groove is formed in a substrate and then filled with an insulating material.

그러나, 상기 LOCOS 방법으로 소자분리산화막을 미세화할 때 공정상 또는 전기적인 문제가 발생한다. 그 중의 하나는, 소자분리절연막만으로는 전기적으로 소자를 완전히 분리할 수 없다는 것이다.However, a process or electrical problem occurs when the device isolation oxide film is miniaturized by the LOCOS method. One of them is that the device isolation insulating film alone cannot completely separate the devices.

그래서, 소자분리 산화막을 형성하는 산화공정 직전 또는 이후에 고농도의 B 또는 BF2이온을 소자분리절연막의 하부에 이온주입시켜 격리효과를 보상해 주는데, 이 공정을 N 채널 필드 임플란트(N-channel field implant) 공정, 즉 채널스토퍼(channel stopper) 형성공정이라고 한다.Therefore, a high concentration of B or BF 2 ions are implanted into the lower portion of the device isolation insulating film immediately before or after the oxidation process to form the device isolation oxide film, thereby compensating the isolation effect. It is called an implant process, that is, a channel stopper forming process.

그리고, 상기 LOCOS 방법은 반도체기판 상부로 높은 단차를 형성하여 후속 공정을 어렵게 한다.In addition, the LOCOS method forms a high step on top of the semiconductor substrate, making subsequent processing difficult.

도 1a 및 도 1c는 종래기술에 따른 반도체소자의 소자분리절연막 형성방법을 도시한 단면도이다.1A and 1C are cross-sectional views illustrating a method of forming a device isolation insulating film of a semiconductor device according to the prior art.

먼저, 반도체기판(31) 상부에 패드산화막(33)을 형성하고, 상기 패드산화막(33) 상부에 제 1 질화막(35)을 형성한다.First, a pad oxide film 33 is formed on the semiconductor substrate 31, and a first nitride film 35 is formed on the pad oxide film 33.

그리고, 소자분리마스크(도시 안됨)를 이용한 식각공정으로 상기 제 1 질화막(35)과 패드산화막(33)을 식각한다.(도 1a)In addition, the first nitride layer 35 and the pad oxide layer 33 are etched by an etching process using an element isolation mask (not shown) (FIG. 1A).

그 다음에, 상기 제 1 질화막(35)과 패드산화막(33)의 측벽에 제 2 질화막(37) 스페이서를 형성한다. 이때, 상기 제 2 질화막(37) 스페이서는 전체 표면상부에 상기 제 2 질화막(37)을 일정두께 형성하고 이를 이방성식각하여 형성한다.Next, a spacer of the second nitride film 37 is formed on sidewalls of the first nitride film 35 and the pad oxide film 33. In this case, the second nitride film 37 spacers are formed by forming a predetermined thickness on the entire surface of the second nitride film 37 and anisotropically etching them.

그리고, 상기 노출된 반도체기판(31)을 열산화시켜 열산화막(39)을 형성한다. 이때, 상기 제 2 질화막(37) 스페이서가 열산화막(39)의 성장공정시 장벽으로 사용된다. (도 1b)The exposed semiconductor substrate 31 is thermally oxidized to form a thermally oxidized film 39. In this case, the second nitride layer 37 spacer is used as a barrier during the growth process of the thermal oxide layer 39. (FIG. 1B)

그 다음에, 상기 제 2 질화막(37) 스페이서, 제 1 질화막(35) 및 패드산화막(33)을 습식방법으로 제거한다. 이때, 상기 열산화막(39)의 상측 일부가 식각된 소자분리절연막(41)이 형성된다.Then, the second nitride film 37 spacer, the first nitride film 35 and the pad oxide film 33 are removed by a wet method. In this case, a device isolation insulating layer 41 is formed by etching a portion of the upper portion of the thermal oxide layer 39.

그리고, 상기 반도체기판(31)의 표면을 열산화시켜 게이트산화막(43)을 형성한다.The surface of the semiconductor substrate 31 is thermally oxidized to form a gate oxide film 43.

여기서, ⓐ는 상기 산화막(39)을 형성하는 열산화공정시 발생하는 질화막과 산화막 간의 응력( stress)에 의하여 형성되되, 소자분리영역에서 활성영역으로 기울어져 형성되는 턱짐현상을 도시한다.(도 1c)Here, ⓐ shows a jaw phenomenon that is formed by the stress between the nitride film and the oxide film generated during the thermal oxidation process of forming the oxide film 39 and is inclined from the device isolation region to the active region. 1c)

이상에서 설명한 바와 같이 종래기술에 따른 반도체소자의 소자분리절연막 형성방법은, 턱짐현상으로 인하여 후속공정을 어렵게 하며 반도체기판의 누설전류를 유발시켜 반도체소자의 특성 및 신뢰성을 저하키시고 그에 따른 반도체소자의 고집적화를 어렵게 하는 문제점이 있다.As described above, the method of forming a device isolation insulating film of a semiconductor device according to the prior art makes it difficult to follow-up processes due to the jaw phenomenon and causes leakage current of the semiconductor substrate, thereby degrading the characteristics and reliability of the semiconductor device and thereby the semiconductor device. There is a problem that makes it difficult to integrate.

따라서, 본 발명의 상기한 종래기술의 문제점을 해결하기 위하여, 변화된 LOCOS 방법으로 턱짐현상이 보상된 소자분리절연막을 형성하여 후속공정을 용이하게 하고 반도체기판의 누설전류를 억제하여 반도체소자의 특성 및 신뢰성을 향상시키고 그에 따른 반도체소자의 고집적화를 가능하게 하는 반도체소자의 소자분리절연막 형성방법을 제공하는 데 그 목적이 있다.Therefore, in order to solve the above problems of the prior art of the present invention, by forming a device isolation insulating film compensated for the jaw phenomenon by the changed LOCOS method to facilitate the subsequent process and to suppress the leakage current of the semiconductor substrate and It is an object of the present invention to provide a method for forming a device isolation insulating film of a semiconductor device that improves reliability and thereby enables high integration of the semiconductor device.

도 1a 내지 도 1c는 종래기술에 따른 반도체소자의 소자분리절연막 형성방법을 도시한 단면도.1A to 1C are cross-sectional views illustrating a method of forming a device isolation insulating film of a semiconductor device according to the prior art.

도 2a 내지 도 2f는 본 발명의 실시예에 따른 반도체소자의 소자분리절연막 형성방법을 도시한 단면도.2A to 2F are cross-sectional views illustrating a method of forming a device isolation insulating film of a semiconductor device in accordance with an embodiment of the present invention.

*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *

11,31 : 반도체기판13,33 : 패드산화막11,31: semiconductor substrate 13,33: pad oxide film

15,35 : 제 1 질화막17,37 : 제2 질화막15,35: first nitride film 17,37: second nitride film

19 : 홈21 : 제 1 열 산화막19: groove 21: first thermal oxide film

23 : 비정질실리콘막25 : 제 2 열산화막23 amorphous silicon film 25 second thermal oxide film

27,43 : 게이트산화막29,41 : 소자분리절연막27,43 gate oxide film 29,41 device isolation insulating film

39 : 열산화막ⓐ : 턱짐현상을 도시한 부분39: thermal oxide filmⓐ: the part showing the jaw phenomenon

이상의 목적을 달성하기 위해 본 발명에 따른 반도체소자의 소자분리절연막 형성방법은, 변화된 LOCOS 방법으로 상부면이 평탄화된 소자분리절연막 형성하는 방법에 있어서, 상기 반도체기판 상부에 제 1 절연막과 제 2 절연막을 각각 일정두께 형성하는 공정과, 상기 제 2 절연막과 제 1 절연막을 식각하여 소자분리영역의 반도체기판을 노출시키는 공정과, 상기 제 2 절연막과 제 1 절연막의 측벽에 제 2 절연막 스페이서를 형성하는 공정과, 상기 제 2, 3 절연막을 마스크로 하여 상기 반도체기판을 일정깊이 식각하여 홈을 형성하는 공정과, 상기 반도체기판을 열산화시켜 제 4 절연막을 형성하는 공정과, 상기 제 2, 3 절연막을 제거하는 공정과, 상기 반도체기판 상부에 제 5 절연막을 형성하는 공정과, 상기 제 5 절연막과 제 1 절연막을 제거하는 공정을 포함하는 것을 특징으로 한다.In order to achieve the above object, a method of forming a device isolation insulating film of a semiconductor device according to the present invention is a method of forming a device isolation insulating film having a planarized upper surface by a changed LOCOS method, wherein a first insulating film and a second insulating film are formed on an upper portion of the semiconductor substrate. Forming a predetermined thickness, exposing the semiconductor substrate in the device isolation region by etching the second insulating film and the first insulating film, and forming a second insulating film spacer on the sidewalls of the second insulating film and the first insulating film. Forming a groove by etching the semiconductor substrate with a predetermined depth using the second and third insulating films as a mask, forming a fourth insulating film by thermally oxidizing the semiconductor substrate, and forming the second and third insulating films A step of forming a fifth insulating film on the semiconductor substrate, and a step of removing the fifth insulating film and the first insulating film. And it characterized in that.

한편, 상기한 목적을 달성하기 위한 본 발명의 원리는, 소자분리영역에 열산화막을 성장시키고 질화막을 제거한 다음, 전체표면상부에 비정질실리콘을 증착하고 상기 비정질실리콘을 모두 산화시켜 산화막을 형성한 다음, 상기 산화막과 패드산화막 제거하고 게이트산화막을 형성함으로써 턱짐현상이 유발되지 않도록 하는 것이다. 그리고, 상기 비정질실리콘막을 형성하는 대신 상부에 전체표면상부에 CVD 산화막을 증착하여 실시할 수도 있다.On the other hand, the principle of the present invention for achieving the above object is, by growing a thermal oxide film in the device isolation region, removing the nitride film, depositing amorphous silicon on the entire surface and oxidizing all the amorphous silicon to form an oxide film By removing the oxide film and the pad oxide film and forming a gate oxide film, the jaw phenomenon is not induced. Instead of forming the amorphous silicon film, the CVD oxide film may be deposited on the entire surface of the substrate.

이하, 첨부된 도면을 참고로 하여 본 발명을 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도 2a 내지 도 2f는 본 발명의 실시예에 따른 반도체소자의 소자분리절연막 형성방법을 도시한 단면도이다.2A to 2F are cross-sectional views illustrating a method of forming a device isolation insulating film of a semiconductor device according to an embodiment of the present invention.

먼저, 반도체기판(11) 상부에 패드산화막(13) 및 제 1 질화막(15)을 각각 일정두께 형성한다. 그리고, 소자분리마스크(도시 안됨)를 이용한 식각공정으로 상기 제 1 질화막(15)과 패드산화막(13)을 식각한다.First, the pad oxide film 13 and the first nitride film 15 are formed to have a predetermined thickness on the semiconductor substrate 11, respectively. In addition, the first nitride layer 15 and the pad oxide layer 13 are etched by an etching process using an element isolation mask (not shown).

여기서, 상기 패드산화막(13)은 50 ~ 300Å 정도의 두께로 형성한다, 그리고, 상기 제 1 질화막(15)은 1500 ~ 3000Å 정도의 두께로 형성한다. (도 2a)Here, the pad oxide film 13 is formed to a thickness of about 50 to 300 kPa, and the first nitride film 15 is formed to a thickness of about 1500 to 3000 kPa. (FIG. 2A)

그 다음에, 상기 제 1 질화막(15)과 패드산화막(13)의 측벽에 제 2 질화막(17) 스페이서를 형성한다. 이때, 상기 제 2 질화막(17) 스페이서는 전체표면상부에 제 2 질화막(17)을 50 ~ 500Å 정도의 두께를 형성하고 이를 이방성식각하여 형성한다.Next, a second nitride film spacer 17 is formed on the sidewalls of the first nitride film 15 and the pad oxide film 13. At this time, the second nitride film 17 spacer is formed on the entire surface by forming a thickness of the second nitride film 17 of about 50 ~ 500Å and anisotropically etched it.

그리고, 상기 제 1 질화막(15)과 제 2 질화막(17)을 마스크로 하여 상기 반도체기판(11)을 50 ~ 500Å 정도의 깊이 식각하여 홈(19)을 형성한다. (도 2b)The groove 19 is formed by etching the semiconductor substrate 11 in a depth of about 50 to 500 mV using the first nitride film 15 and the second nitride film 17 as a mask. (FIG. 2B)

그 다음에, 상기 반도체기판(11)을 열산화시켜 상기 반도체기판(11)이 노출된 영역, 소자분리영역에 제 1열 산화막(21)을 형성한다, 이때, 상기 제 2 질화막(17) 스페이서가 상기 제 1 열 산화막(21)의 성장공정시 장벽으로 사용된다.Thereafter, the semiconductor substrate 11 is thermally oxidized to form a first thermal oxide film 21 in an area in which the semiconductor substrate 11 is exposed and in an isolation region. In this case, the second nitride film 17 spacer Is used as a barrier during the growth process of the first thermal oxide film 21.

여기서, 상기 열산화공정은 900 ~ 1200℃ 정도의 온도에서 실시하며, 상기 제 1 열 산화막(21)은 2000 ~ 4000Å 정도의 두께로 형성한다. (도 2c)Here, the thermal oxidation process is carried out at a temperature of about 900 ~ 1200 ℃, the first thermal oxide film 21 is formed to a thickness of about 2000 ~ 4000Å. (FIG. 2C)

그 다음에, 인산용액을 이용하여 상기 제 1 질화막(15)과 제 2 질화막(17) 스페이서를 제거한다.Next, the spacers of the first nitride film 15 and the second nitride film 17 are removed using a phosphoric acid solution.

그리고, 전체표면상부에 비정질실리콘막(23)을 100 ~500Å 정도의 두께로 증착한다. 이때, 상기 비정질실리콘막(23)의 증착공정은 500 ~ 700℃ 정도의 온도에서 실시한 것이다. (도 2d)Then, an amorphous silicon film 23 is deposited on the entire surface with a thickness of about 100 to 500 mW. At this time, the deposition process of the amorphous silicon film 23 is performed at a temperature of about 500 ~ 700 ℃. (FIG. 2D)

그 다음에, 상기 비정질실리콘막(23)을 산화시켜 열산화시켜 제 2 열산화막(25)을 형성한다. 이때, 상기 열산화공정은 800 ~ 1100℃ 정도의 온도에서 실시한 것으로 상기 반도체기판(11)의 일부도 산화된 것이다. (도 2e)Next, the amorphous silicon film 23 is oxidized and thermally oxidized to form a second thermal oxide film 25. In this case, the thermal oxidation process is performed at a temperature of about 800 to 1100 ° C., and a part of the semiconductor substrate 11 is also oxidized. (FIG. 2E)

그 다음에, 상기 제 2 열산화막(25)과 패드산화막(13)을 불산용액으로 제거하여 소자분리절연막(29)을 형성하고, 상기 반도체기판(11)에 게이트산화막(27)을 형성함으로써 턱짐현상이 제거된 소자분리절연막(29)을 형성한다.(도 2f)Next, the second thermal oxide film 25 and the pad oxide film 13 are removed with a hydrofluoric acid solution to form a device isolation insulating film 29, and the gate oxide film 27 is formed on the semiconductor substrate 11. A device isolation insulating film 29 is removed from which the phenomenon is removed (FIG. 2F).

이상에서 설명한 바와 같이 본 발명에 따른 반도체소자의 소자분리절연막 형성방법은, 변화된 LOCOS 방법으로 제 1 열산화막을 형성하고 질화막을 제거한 다음, 전체표면상부에 비정질실리콘막을 형성하고 이를 열산화시켜 제 2 열산화막을 형성한 다음, 상기 제 2 열산화막과 패드산화막을 제거하고 게이트산화막을 형성하여 상부면이 평탄화된 소자분리절연막을 형성함으로써 반도체소자의 특성 및 신회성을 향상시키고 그에 따른 반도체소자의 고집적화를 가능하게 하는 효과가 있다.As described above, in the method of forming a device isolation insulating film of the semiconductor device according to the present invention, the first thermal oxide film is formed by the changed LOCOS method, the nitride film is removed, an amorphous silicon film is formed on the entire surface, and the second silicon oxide film is thermally oxidized. After the thermal oxide film is formed, the second thermal oxide film and the pad oxide film are removed, and a gate oxide film is formed to form a device isolation insulating film having a flat top surface, thereby improving the characteristics and reproducibility of the semiconductor device and consequently high integration of the semiconductor device. Has the effect of enabling.

Claims (12)

변화된 LOCOS 방법으로 상부면이 평탄화된 소자분리절연막 형성하는 방법에 있어서,In the method of forming a device isolation insulating film having a flattened top surface by a changed LOCOS method, 상기 반도체기판 상부에 제 1 절연막과 제 2 절연막을 각각 일정두께 형성하는 공정과,Forming a first thickness of the first insulating film and a second insulating film on the semiconductor substrate, respectively; 상기 제 2 절연막과 제 1 절연막을 식각하여 소자분리영역의 반도체기판을 노출시키는 공정과,Etching the second insulating film and the first insulating film to expose a semiconductor substrate in an isolation region; 상기 제 2 절연막과 제 1 절연막의 측벽에 제 2 절연막 스페이서를 형성하는 공정과,Forming a second insulating film spacer on sidewalls of the second insulating film and the first insulating film; 상기 제 2, 3 절연막을 마스크로 하여 상기 반도체기판을 일정깊이 식각하여 홈을 형성하는 공정과,Forming a groove by etching the semiconductor substrate with a predetermined depth using the second and third insulating films as a mask; 상기 반도체기판을 열산화시켜 제 1 절연막을 형성하는 공정과.Thermally oxidizing the semiconductor substrate to form a first insulating film; 상기 제 2, 3 절연막을 제거하는 공정과,Removing the second and third insulating films; 상기 반도체기판 상부에 제 5 절연막을 형성하는 공정과,Forming a fifth insulating film on the semiconductor substrate; 상기 제 5 절연막과 제 1 절연막을 제거하는 공정을 포함하는 반도체소자의 소자분리절연막 형성방법.And removing the fifth insulating film and the first insulating film. 청구항 1에 있어서,The method according to claim 1, 상기 제 1 절연막은 패드산화막을 50 ~ 300Å 정도의 두께로 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.The first insulating film is a method of forming a device isolation insulating film of a semiconductor device, characterized in that for forming a pad oxide film having a thickness of about 50 ~ 300Å. 청구항 1에 있어서,The method according to claim 1, 상기 제 2 절연막은 질화막을 1500 ~ 3000Å 정도의 두께로 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.The second insulating film is a method of forming a device isolation insulating film of a semiconductor device, characterized in that to form a nitride film having a thickness of about 1500 ~ 3000Å. 청구항 1에 있어서,The method according to claim 1, 상기 제 3 절연막은 질화막을 50 ~ 500Å 정도의 두께로 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.The third insulating film is a method of forming a device isolation insulating film of a semiconductor device, characterized in that for forming a nitride film having a thickness of about 50 ~ 500Å. 청구항 1에 있어서,The method according to claim 1, 상기 홈은 50 ~ 500Å 정도의 두께로 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.The groove is a method of forming a device isolation insulating film of a semiconductor device, characterized in that formed in a thickness of about 50 ~ 500Å. 청구항 1에 있어서,The method according to claim 1, 상기 제 4 절연막은 900 ~ 1200℃ 정도의 온도에서 열산화시켜 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.The fourth insulating film is a method of forming a device isolation insulating film of a semiconductor device, characterized in that formed by thermal oxidation at a temperature of about 900 ~ 1200 ℃. 청구항 6에 있어서,The method according to claim 6, 상기 제 4 절연막은 2000 ~ 400Å 정도의 두께로 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.The fourth insulating film is a method of forming a device isolation insulating film of a semiconductor device, characterized in that formed in a thickness of about 2000 ~ 400Å. 청구항 1에 있어서,The method according to claim 1, 상기 제 4 절연막은 상기 제 2, 3 절연막 제거공정시 상측 일부가 제거되는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.And a portion of the upper side of the fourth insulating layer is removed during the second and third insulating layer removing processes. 청구항 1에 있어서,The method according to claim 1, 상기 제 5 절연막은 비정질실리콘막을 전체표면상부에 형성하고 이를 열산화시켜 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.And the fifth insulating film is formed by forming an amorphous silicon film on the entire surface and thermally oxidizing it. 청구항 9에 있어서,The method according to claim 9, 상기 비정질실리콘막은 500 ~ 700℃ 정도의 온도에서 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.The amorphous silicon film is a method of forming a device isolation insulating film of a semiconductor device, characterized in that formed at a temperature of about 500 ~ 700 ℃. 청구항 1 또는 청구항 9에 있어서,The method according to claim 1 or 9, 상기 비정질실리콘막은 100 ~ 500Å 정도의 두께로 형성하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.Wherein the amorphous silicon film is formed to a thickness of about 100 ~ 500 반도체. 청구항 1에 있어서,The method according to claim 1, 상기 제 5 절연막과 제 1 절연막은 불산용액을 이용하여 제거하는 것을 특징으로 하는 반도체소자의 소자분리절연막 형성방법.And the fifth insulating film and the first insulating film are removed using a hydrofluoric acid solution.
KR1019960072133A 1996-12-26 1996-12-26 Device isolation insulating film formation method of semiconductor device Expired - Fee Related KR100245087B1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5797643A (en) * 1980-12-10 1982-06-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
KR920020701A (en) * 1991-04-13 1992-11-21 문정환 Device isolation method of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5797643A (en) * 1980-12-10 1982-06-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
KR920020701A (en) * 1991-04-13 1992-11-21 문정환 Device isolation method of semiconductor device

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