JPH0161682U

JPH0161682U -

Info

Publication number: JPH0161682U
Application number: JP15715687U
Authority: JP
Priority date: 1987-10-14
Filing date: 1987-10-14
Publication date: 1989-04-19

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例による疑似目標信
号発生装置を示した図、第２図は従来の疑似目標
信号発生装置を示した図、第３図はこの発明の説
明を行う時に用いたタイミングチヤートであり、
１は基準信号発生部、２は第１の分周部、３は第
１のスピードカウンタ、４はレンジデイレー部、
５はパルスデイレー部、６は第２の分周部、７は
第２のスピードカウンタ、８は位相調整部、９は
カウンタ部、１０は遅延線路、イは速度情報、ロ
は距離情報、ハは基準信号発生部１の出力、ニは
疑似目標への送信信号、ホは第１のクロツク信号
、ヘはパルスデイレー部５の出力、トは第２のク
ロツク信号、チは遅延線路１０の出力である。な
お、図中同一符号は同一又は相当部分を示す。 Fig. 1 is a diagram showing a pseudo target signal generating device according to an embodiment of this invention, Fig. 2 is a diagram showing a conventional pseudo target signal generating device, and Fig. 3 is a diagram used when explaining the present invention. It is a timing chart,
1 is a reference signal generation section, 2 is a first frequency dividing section, 3 is a first speed counter, 4 is a range delay section,
5 is a pulse delay section, 6 is a second frequency dividing section, 7 is a second speed counter, 8 is a phase adjustment section, 9 is a counter section, 10 is a delay line, A is speed information, B is distance information, C is The output of the reference signal generator 1, D is the transmission signal to the pseudo target, E is the first clock signal, F is the output of the pulse delay unit 5, G is the second clock signal, and H is the output of the delay line 10. . Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims

[Scope of utility model registration request]

a reference signal generating section, a first frequency dividing section connected to the output end of the reference signal generating section, and a first speed counter connected to the output end of the first frequency dividing section;
The pseudo target signal generating device includes a range delay section connected to the output end of the first speed counter, and a pulse delay section connected to the output end of the range delay section and the output end of the reference signal generation section. a second frequency dividing section connected to the output terminal of the second frequency dividing section; a second speed counter connected to the output terminal of the second frequency dividing section; and an output terminal of the second speed counter and the first speed counter. A pseudo-target characterized in that a phase adjustment section connected to an output end, a counter section connected to an output end of the phase adjustment section, and a delay line connected to an output end of the counter section and an output end of the pulse delay section are added. Signal generator.