JPH0150100B2 - - Google Patents

Info

Publication number
JPH0150100B2
JPH0150100B2 JP461083A JP461083A JPH0150100B2 JP H0150100 B2 JPH0150100 B2 JP H0150100B2 JP 461083 A JP461083 A JP 461083A JP 461083 A JP461083 A JP 461083A JP H0150100 B2 JPH0150100 B2 JP H0150100B2
Authority
JP
Japan
Prior art keywords
solder
hybrid integrated
integrated circuit
background material
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP461083A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59129453A (ja
Inventor
Hiroshi Watabe
Susumu Toba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP461083A priority Critical patent/JPS59129453A/ja
Publication of JPS59129453A publication Critical patent/JPS59129453A/ja
Publication of JPH0150100B2 publication Critical patent/JPH0150100B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP461083A 1983-01-14 1983-01-14 混成集積回路 Granted JPS59129453A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP461083A JPS59129453A (ja) 1983-01-14 1983-01-14 混成集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP461083A JPS59129453A (ja) 1983-01-14 1983-01-14 混成集積回路

Publications (2)

Publication Number Publication Date
JPS59129453A JPS59129453A (ja) 1984-07-25
JPH0150100B2 true JPH0150100B2 (enrdf_load_html_response) 1989-10-27

Family

ID=11588815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP461083A Granted JPS59129453A (ja) 1983-01-14 1983-01-14 混成集積回路

Country Status (1)

Country Link
JP (1) JPS59129453A (enrdf_load_html_response)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020071460A1 (ja) 2018-10-02 2020-04-09 日本製鉄株式会社 巻鉄心

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0982760A (ja) * 1995-07-07 1997-03-28 Toshiba Corp 半導体装置、半導体素子およびその半田接続部検査方法
JP3416091B2 (ja) * 2000-01-21 2003-06-16 株式会社新川 ボンディング装置およびボンディング方法
KR100461949B1 (ko) * 2002-05-15 2004-12-14 앰코 테크놀로지 코리아 주식회사 반도체패키지용 솔더볼 및 그 제조 방법, 그리고 솔더볼의 이베포레이션 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020071460A1 (ja) 2018-10-02 2020-04-09 日本製鉄株式会社 巻鉄心

Also Published As

Publication number Publication date
JPS59129453A (ja) 1984-07-25

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