JPH0147813B2 - - Google Patents

Info

Publication number
JPH0147813B2
JPH0147813B2 JP57101487A JP10148782A JPH0147813B2 JP H0147813 B2 JPH0147813 B2 JP H0147813B2 JP 57101487 A JP57101487 A JP 57101487A JP 10148782 A JP10148782 A JP 10148782A JP H0147813 B2 JPH0147813 B2 JP H0147813B2
Authority
JP
Japan
Prior art keywords
data
cache
host
field
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57101487A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5823376A (ja
Inventor
Goodon Riido Deebitsudo
Edowaado Riiku Richaado
Suteiibun Uiriamuzu Jon
Hanto Kurisuchan Jon
Hawaado Haatangu Maikeru
Haabaato Noruta Aasaa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5823376A publication Critical patent/JPS5823376A/ja
Publication of JPH0147813B2 publication Critical patent/JPH0147813B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP57101487A 1981-08-03 1982-06-15 記憶システム Granted JPS5823376A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/289,632 US4533995A (en) 1981-08-03 1981-08-03 Method and system for handling sequential data in a hierarchical store
US289632 1981-08-03

Publications (2)

Publication Number Publication Date
JPS5823376A JPS5823376A (ja) 1983-02-12
JPH0147813B2 true JPH0147813B2 (fr) 1989-10-17

Family

ID=23112373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57101487A Granted JPS5823376A (ja) 1981-08-03 1982-06-15 記憶システム

Country Status (8)

Country Link
US (1) US4533995A (fr)
EP (1) EP0072108B1 (fr)
JP (1) JPS5823376A (fr)
AU (1) AU548909B2 (fr)
CA (1) CA1176382A (fr)
DE (1) DE3279135D1 (fr)
ES (1) ES8305146A1 (fr)
SG (1) SG25991G (fr)

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JPS59100964A (ja) * 1982-12-01 1984-06-11 Hitachi Ltd ディスク制御システム及びその並列データ転送方法
US4774654A (en) * 1984-12-24 1988-09-27 International Business Machines Corporation Apparatus and method for prefetching subblocks from a low speed memory to a high speed memory of a memory hierarchy depending upon state of replacing bit in the low speed memory
JPS62243044A (ja) * 1986-04-16 1987-10-23 Hitachi Ltd デイスクキヤツシユメモリの制御方式
US4928239A (en) * 1986-06-27 1990-05-22 Hewlett-Packard Company Cache memory with variable fetch and replacement schemes
US4853846A (en) * 1986-07-29 1989-08-01 Intel Corporation Bus expander with logic for virtualizing single cache control into dual channels with separate directories and prefetch for different processors
US5008820A (en) * 1987-03-30 1991-04-16 International Business Machines Corporation Method of rapidly opening disk files identified by path names
US5134563A (en) * 1987-07-02 1992-07-28 International Business Machines Corporation Sequentially processing data in a cached data storage system
US4926317A (en) * 1987-07-24 1990-05-15 Convex Computer Corporation Hierarchical memory system with logical cache, physical cache, and address translation unit for generating a sequence of physical addresses
US5133061A (en) * 1987-10-29 1992-07-21 International Business Machines Corporation Mechanism for improving the randomization of cache accesses utilizing abit-matrix multiplication permutation of cache addresses
US5321823A (en) * 1988-07-20 1994-06-14 Digital Equipment Corporation Digital processor with bit mask for counting registers for fast register saves
US5253351A (en) * 1988-08-11 1993-10-12 Hitachi, Ltd. Memory controller with a cache memory and control method of cache memory including steps of determining memory access threshold values
US5140683A (en) * 1989-03-01 1992-08-18 International Business Machines Corporation Method for dispatching work requests in a data storage hierarchy
US5155831A (en) * 1989-04-24 1992-10-13 International Business Machines Corporation Data processing system with fast queue store interposed between store-through caches and a main memory
US5133060A (en) * 1989-06-05 1992-07-21 Compuadd Corporation Disk controller includes cache memory and a local processor which limits data transfers from memory to cache in accordance with a maximum look ahead parameter
US5185694A (en) * 1989-06-26 1993-02-09 Motorola, Inc. Data processing system utilizes block move instruction for burst transferring blocks of data entries where width of data blocks varies
US5257370A (en) * 1989-08-29 1993-10-26 Microsoft Corporation Method and system for optimizing data caching in a disk-based computer system
US5133058A (en) * 1989-09-18 1992-07-21 Sun Microsystems, Inc. Page-tagging translation look-aside buffer for a computer memory system
US5544347A (en) * 1990-09-24 1996-08-06 Emc Corporation Data storage system controlled remote data mirroring with respectively maintained data indices
JPH05137393A (ja) * 1991-11-08 1993-06-01 Victor Co Of Japan Ltd 情報記録再生装置
JP3087429B2 (ja) * 1992-04-03 2000-09-11 株式会社日立製作所 記憶装置システム
US5408653A (en) * 1992-04-15 1995-04-18 International Business Machines Corporation Efficient data base access using a shared electronic store in a multi-system environment with shared disks
US5659713A (en) * 1992-04-24 1997-08-19 Digital Equipment Corporation Memory stream buffer with variable-size prefetch depending on memory interleaving configuration
US5381539A (en) * 1992-06-04 1995-01-10 Emc Corporation System and method for dynamically controlling cache management
JP3390482B2 (ja) * 1992-06-12 2003-03-24 株式会社リコー ファクシミリ装置
US5715424A (en) * 1992-12-10 1998-02-03 International Business Machines Corporation Apparatus and method for writing data onto rewritable optical media
JPH09506988A (ja) * 1993-09-30 1997-07-08 アップル コンピュータ,インコーポレイテッド コンピュータの仮想メモリにおける補助記憶の分散制御システム
JPH08328752A (ja) * 1994-06-10 1996-12-13 Canon Inc 情報記録装置及び方法
US5684986A (en) * 1995-06-07 1997-11-04 International Business Machines Corporation Embedded directory method and record for direct access storage device (DASD) data compression
JPH09190465A (ja) * 1996-01-11 1997-07-22 Yamaha Corp 分類格納された情報の参照方法
WO1998040810A2 (fr) 1997-03-12 1998-09-17 Storage Technology Corporation Sous-systeme memoire de donnees sur bande magnetique virtuel et attache a un reseau
US6658526B2 (en) 1997-03-12 2003-12-02 Storage Technology Corporation Network attached virtual data storage subsystem
US6154813A (en) * 1997-12-23 2000-11-28 Lucent Technologies Inc. Cache management system for continuous media system
US6070225A (en) * 1998-06-01 2000-05-30 International Business Machines Corporation Method and apparatus for optimizing access to coded indicia hierarchically stored on at least one surface of a cyclic, multitracked recording device
US6094605A (en) * 1998-07-06 2000-07-25 Storage Technology Corporation Virtual automated cartridge system
US6327644B1 (en) 1998-08-18 2001-12-04 International Business Machines Corporation Method and system for managing data in cache
US6141731A (en) * 1998-08-19 2000-10-31 International Business Machines Corporation Method and system for managing data in cache using multiple data structures
US6381677B1 (en) 1998-08-19 2002-04-30 International Business Machines Corporation Method and system for staging data into cache
US6330621B1 (en) 1999-01-15 2001-12-11 Storage Technology Corporation Intelligent data storage manager
US6728823B1 (en) * 2000-02-18 2004-04-27 Hewlett-Packard Development Company, L.P. Cache connection with bypassing feature
US6834324B1 (en) 2000-04-10 2004-12-21 Storage Technology Corporation System and method for virtual tape volumes
JP4162184B2 (ja) * 2001-11-14 2008-10-08 株式会社日立製作所 データベース管理システムの実行情報を取得する手段を有する記憶装置
DE10156749B4 (de) * 2001-11-19 2007-05-10 Infineon Technologies Ag Speicher, Prozessorsystem und Verfahren zum Durchführen von Schreiboperationen auf einen Speicherbereich
US20030126132A1 (en) * 2001-12-27 2003-07-03 Kavuri Ravi K. Virtual volume management system and method
US7437593B2 (en) * 2003-07-14 2008-10-14 International Business Machines Corporation Apparatus, system, and method for managing errors in prefetched data
TWI399651B (zh) * 2008-09-12 2013-06-21 Communication protocol method and system for input / output device
US20130326113A1 (en) * 2012-05-29 2013-12-05 Apple Inc. Usage of a flag bit to suppress data transfer in a mass storage system having non-volatile memory
CN108932206B (zh) * 2018-05-21 2023-07-21 南京航空航天大学 一种三维多核处理器混合缓存架构及方法
CN110879687B (zh) * 2019-10-18 2021-03-16 蚂蚁区块链科技(上海)有限公司 一种基于磁盘存储的数据读取方法、装置及设备
CN111198750A (zh) * 2020-01-06 2020-05-26 紫光云技术有限公司 一种提高虚拟磁盘读写性能的方法
CN117421112A (zh) * 2023-10-18 2024-01-19 中科驭数(北京)科技有限公司 加速单元、网卡、主机和报文处理加速方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5054249A (fr) * 1973-09-11 1975-05-13
JPS5444176A (en) * 1977-09-12 1979-04-07 Mitsubishi Electric Corp Tilt signal generating circuit
JPS5680872A (en) * 1979-12-06 1981-07-02 Fujitsu Ltd Buffer memory control system

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US3341817A (en) * 1964-06-12 1967-09-12 Bunker Ramo Memory transfer apparatus
US3521240A (en) * 1968-03-06 1970-07-21 Massachusetts Inst Technology Synchronized storage control apparatus for a multiprogrammed data processing system
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US4157587A (en) * 1977-12-22 1979-06-05 Honeywell Information Systems Inc. High speed buffer memory system with word prefetch
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US4262332A (en) * 1978-12-28 1981-04-14 International Business Machines Corporation Command pair to improve performance and device independence
JPS5911135B2 (ja) * 1979-01-17 1984-03-13 株式会社日立製作所 デ−タ処理システムのデ−タ転送方式
US4371924A (en) * 1979-11-09 1983-02-01 Rockwell International Corp. Computer system apparatus for prefetching data requested by a peripheral device from memory
US4370710A (en) * 1980-08-26 1983-01-25 Control Data Corporation Cache memory organization utilizing miss information holding registers to prevent lockup from cache misses
US4394732A (en) * 1980-11-14 1983-07-19 Sperry Corporation Cache/disk subsystem trickle

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5054249A (fr) * 1973-09-11 1975-05-13
JPS5444176A (en) * 1977-09-12 1979-04-07 Mitsubishi Electric Corp Tilt signal generating circuit
JPS5680872A (en) * 1979-12-06 1981-07-02 Fujitsu Ltd Buffer memory control system

Also Published As

Publication number Publication date
US4533995A (en) 1985-08-06
ES514648A0 (es) 1983-03-16
ES8305146A1 (es) 1983-03-16
AU548909B2 (en) 1986-01-09
AU8670182A (en) 1983-02-10
EP0072108B1 (fr) 1988-10-19
CA1176382A (fr) 1984-10-16
EP0072108A2 (fr) 1983-02-16
SG25991G (en) 1991-06-21
JPS5823376A (ja) 1983-02-12
EP0072108A3 (en) 1986-05-14
DE3279135D1 (en) 1988-11-24

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