JPH0147049B2 - - Google Patents

Info

Publication number
JPH0147049B2
JPH0147049B2 JP59086611A JP8661184A JPH0147049B2 JP H0147049 B2 JPH0147049 B2 JP H0147049B2 JP 59086611 A JP59086611 A JP 59086611A JP 8661184 A JP8661184 A JP 8661184A JP H0147049 B2 JPH0147049 B2 JP H0147049B2
Authority
JP
Japan
Prior art keywords
transistors
slave
master
level
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59086611A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60230714A (ja
Inventor
Tamio Myamura
Takashi Ookawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59086611A priority Critical patent/JPS60230714A/ja
Publication of JPS60230714A publication Critical patent/JPS60230714A/ja
Publication of JPH0147049B2 publication Critical patent/JPH0147049B2/ja
Granted legal-status Critical Current

Links

JP59086611A 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路 Granted JPS60230714A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59086611A JPS60230714A (ja) 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59086611A JPS60230714A (ja) 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路

Publications (2)

Publication Number Publication Date
JPS60230714A JPS60230714A (ja) 1985-11-16
JPH0147049B2 true JPH0147049B2 (enrdf_load_stackoverflow) 1989-10-12

Family

ID=13891810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59086611A Granted JPS60230714A (ja) 1984-04-28 1984-04-28 マスタ・スレ−ブ・フリツプフロツプ回路

Country Status (1)

Country Link
JP (1) JPS60230714A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4719366A (en) * 1985-10-11 1988-01-12 Advanced Micro Devices, Inc. Output state protection network for D-type flip-flop
EP0375247B1 (en) * 1988-12-21 1996-02-28 Texas Instruments Incorporated Metastable tolerant latch

Also Published As

Publication number Publication date
JPS60230714A (ja) 1985-11-16

Similar Documents

Publication Publication Date Title
JPH0368477B2 (enrdf_load_stackoverflow)
US4274017A (en) Cascode polarity hold latch having integrated set/reset capability
US4517475A (en) Master-slave flip-flop arrangement with slave section having a faster output transistion and a greater resistance to output degradation
JPH0147049B2 (enrdf_load_stackoverflow)
US4491745A (en) TTL flip-flop with clamping diode for eliminating race conditions
US4197470A (en) Triggerable flip-flop
US4156154A (en) Flip-flop circuit
US4417159A (en) Diode-transistor active pull up driver
EP0203491B1 (en) Bistable circuit
US4277698A (en) Delay type flip-flop
JPS6278908A (ja) Dタイプ・フリツプフロツプ回路
JPH08195651A (ja) 差動型rsラッチ回路
US4341960A (en) I2 L Static shift register
US3497718A (en) Bipolar integrated shift register
JPS6042551B2 (ja) 半導体記憶回路
JPS6253966B2 (enrdf_load_stackoverflow)
JPH05315902A (ja) Eclラッチ回路
JPS6278909A (ja) Dタイプ・フリツプフロツプ回路
JPH06209237A (ja) 記憶セル
EP0267852A2 (en) ECL read/write control circuit providing write-pull operation
JPS60502182A (ja) 電流切換装置
JPS6159008B2 (enrdf_load_stackoverflow)
JP2672969B2 (ja) Ecl回路
JPS6255327B2 (enrdf_load_stackoverflow)
JP2953805B2 (ja) データ保持ラッチ回路