JPH0143318B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of the Invention) The present invention relates to an active matrix liquid crystal display device having an independent drive circuit for each pixel.

(Prior Art) FIG. 1 shows the configuration of a conventional active matrix liquid crystal display device, in which 1 is a source line drive circuit;
2 is a gate line drive circuit, 3 is a switching transistor, 4 is a capacitor, 5 is a pixel electrode, 6 is a counter electrode connected to a DC voltage source V _C , 7 is a liquid crystal, and S ₁ to _{S n} are sources. Lines G ₁ to _{G o} are gate lines, and U _1,1 to _{U o,n} are pixel circuits. Here, each of the pixel circuits U _1,1 to U _o,n includes a switching transistor 3, a capacitor 4, and a pixel electrode 5.

In such a configuration, the source line drive circuit 1
operates, and drives the source lines S ₁ to _{S n} to a predetermined potential based on the first row data signal input from the outside. Furthermore, the gate line drive circuit 2 operates, and a voltage is applied to the gate line _G1 in the first row.
The potentials of the source lines S ₁ to _{S n} are the same as those of the pixel circuits U _1,1 to _{U 1,n}
is input. That is, an image is displayed by selectively driving the liquid crystal using the potential difference between the potential of each pixel electrode 5 and the potential (V _C ) of the counter electrode 6.

Thereafter, by sequentially repeating the above-mentioned operations from the second row onward to the nth row, a desired image is displayed on the entire display surface. By the way, it is known that if a DC voltage is continuously applied to a liquid crystal, its life will be shortened. For this reason, it has become essential to apply an alternating current voltage to the liquid crystal.

When the input data signal is a digital signal, the voltage level of the source line S _i (i = 1 to m) corresponding to "1" of the data signal is
There is a method of setting the voltage level to 2V _C in odd-numbered frames and zero (ground potential) in even-numbered frames, so that the voltage level of the source line S _i corresponding to "0" of the data signal is always set to V _C . That is, in each frame period, the liquid crystal corresponding to the data signal "1" is AC driven with a voltage width of ±V _C.

On the other hand, as the active matrix type display device shown in FIG. 1 becomes larger in area and higher in definition, the probability of defects occurring during manufacturing increases, and various countermeasures against defects have been proposed.

Figure 2 shows the configuration of a conventional active matrix display device with defect countermeasures.
12 is a switching transistor, UA _1,1 ~
UA _o,n is a pixel circuit, and the other symbols 1 to 5 are the same as those shown in FIG.

Pixel circuit UA _k,l (k=2, 3,...n, l=2,
3,...m) are each composed of switching transistors 11 and 12, a capacitor 4, and a pixel electrode 5. switching transistor 1
The drain of No. 1 is connected to the source line S _l-1 , and the gate of No. 1 is connected to the gate line G _k-1 .

In the pixel circuit UA _k,l , there is a route for applying voltage to the pixel electrode 5 via the switching transistor 11, and a route via the switching transistor 1.
There are two routes via 2. Therefore, the pixel circuit
UA _k,l contains a data signal that should originally be input to pixel circuit UA _k-1,l-1 (referred to as a spare data signal) and a data signal that should be input to pixel circuit UA _k,l (regular data signal). (referred to as data signals) are input in sequence.

Normally, the preliminary data signal is rewritten into a regular data signal, so that a display is performed based on the regular data. On the other hand, the gate line G _k becomes defective and the normal data signal is transferred to the pixel circuit.
If not written to UA _k,l , the preliminary data is retained. Therefore, if the number of gate lines and source lines is large enough, even if the gate line becomes defective,
You will no longer feel any discomfort in your appearance. However, the potential level of the defective gate line is almost zero voltage and needs to be lower than the threshold voltage of the switching transistor. However, the gate line with the disconnection defect is in a floating state, so
Electrostatic induction between the gate line and the source line may cause voltage fluctuations on the gate line, resulting in erroneous display.

FIG. 3 is an equivalent circuit diagram for explaining the cause of erroneous display, and is a configuration diagram of pixel circuits UB _j,1 to UB _j,n connected to gate line G _j . In the figure, 3 is the switching transistor, 4 is the capacitor, 8 is the liquid crystal capacitance C _LC , and 9 is the capacitance between the gate line and the drain.
C _GD , 10 is the capacitance V _GS between the gate line and the source line.

Now, a disconnection defect has occurred in the gate line G _j , and the gate line
Consider the case where G _j is in a floating state at zero voltage level. Capacity C _D or C _LC is equivalent to capacity C _GD or C _GS
Since it is large compared to , we will ignore it here.

In such a state, when the voltage level of the source line changes, the voltage level of the gate line _Gj also changes accordingly. For example, all source lines S ₁ ~
If S _n changes with the amplitude V _C , the gate line G _j changes with the amplitude C _GS ·V _C /(C _GS +C _GD ). Therefore,
Only source line S _i is zero, all other source lines are V _C
If this is the case, when the source line m is large, the voltage applied to the gate of the switching transistor of the pixel circuit UB _ji becomes approximately V _C /2, and the leakage current of the switching transistor increases.
Therefore, even though data information is held through a switching transistor connected to a normal gate line using the two-route method shown in Figure 2, the other gate is in a floating state. The information will disappear via the switching transistor connected to the line.

(Effects of the Invention) The present invention is characterized in that the average potential of all source lines is kept almost constant to reduce potential fluctuations in the gate line, and its purpose is to reduce potential fluctuations in the gate line caused by stray capacitance between the gate line and the source line. An object of the present invention is to provide an active matrix liquid crystal display device that eliminates display errors.

(Structure and operation of the invention) FIG. 4 is a block diagram of an embodiment of an active matrix type liquid crystal display device according to the invention,
UA _j,i (j=1, 2..., n, i=1, 2,..., 2m)
is a pixel circuit, and has the same configuration as the pixel circuit shown in FIG.

21 and 22 are source line drive circuits composed of two circuits, the source line drive circuit 21 is connected to the odd numbered source lines S ₁ , S ₃ ,...S _2n-1 , and the source line drive circuit 22 is Even numbered source lines S ₂ , S ₄ ,
..., connected to S _2n . That is, the odd-numbered source lines and the even-numbered source lines are each driven through separate source line drive circuits.

Therefore, when the input data signal is a digital signal, the voltage level of the source line corresponding to "1" of the data signal is set to 2V C (or zero) for the odd numbered source line, and to 2V _C (or zero) for the even numbered source line. It is possible to set it to zero (or 2V _C ) for the line. Using this method of applying voltage to source lines, if the number of "1"s in the data signals corresponding to odd-numbered source lines and even-numbered source lines is approximately equal, the source voltage level will be 2V _C. Since the number of lines and the number of source lines at zero potential are almost equal,
It is possible to bring the average voltage of all source lines to V _C .

FIG. 5a shows the source line drive circuit 2 in the present invention.
1, in which 23 is an m-bit shift register, 24 is an m-bit latch circuit, and 2
5 is an m-bit driver circuit, 26 is a data signal, 27 is a clock signal for the shift register, 2
8 is an alternating current signal whose polarity is reversed between odd and even frames, 29 _j (j=1, 2,..., m) is a latch circuit output signal, 30 _j (j=1, 2,..., m)
is the driver circuit output signal.

FIG. 5b is a logic diagram of the driver circuit for 1 bit, where 31 is an AND circuit, 32 is an inverter,
33 is a switch.

The operation of the source line drive circuit will be explained below using FIGS. 5a and 5b.

The data signal 26 is sequentially input to the shift register 23, and as a result, the contents corresponding to the m-bit data signal are stored in the shift register 23. The contents stored in the shift register 23 are stored as they are in the latch circuit 24, and each latch circuit output signal _29j is input to the driver circuit 25. In odd frames, the alternating current signal 28 becomes High level, and as a result, the latch circuit output signal 29 _j
When the latch circuit output signal _29j is "1", the voltage level of the driver circuit 30j is set to 2V _C , and when the latch circuit output signal _29j is "0", the voltage level of the driver circuit _30j is set to _VC .
On the other hand, in even frames, the alternating current signal 28
becomes Low level, and the latch circuit output signal 29 _j
When the latch circuit output signal 29 j is "1", the voltage level of the driver circuit 30 _j is set to zero, and when the latch circuit output signal 29 _j is "0", the voltage level of the driver circuit 30 _j is set to V _C .
That is, since the driver circuit output signal corresponding to the data signal "1" changes from 2V _C to zero voltage level every frame, it is possible to AC drive the liquid crystal with a voltage of ±V _C.

The source line drive circuit 22 and the source line drive circuit 21
It has the same configuration as . However, the AC signal input to the driver circuit 25 is
The alternating current signal 28 input to the driver circuit 25 of
This is a signal with reversed polarity. That is, the relationship between the voltage level of 2V _C and zero of the driver circuit output signal corresponding to data signal 1 is reversed.

In the example shown in Figure 4, pixel circuits belonging to odd-numbered columns and pixel circuits belonging to even-numbered columns are grouped, and the source lines in each group are connected to different source line drive circuits. The pixel circuit may be divided into two parts, and the source lines of the left half and the right half may be connected to different source line drive circuits, respectively. In short, arbitrary grouping is possible such that the average voltage of all source lines is approximately constant.

Also, as is clear from the above explanation, each pixel circuit is input with a potential of V _C , 2V _C , or zero, and the number of pixel circuits to which the potential of 2V _C is input and the potential of zero are input. The number of pixel circuits used is approximately equal. In addition, the potential of the pixel electrode set to the initial potential of V _C hardly changes, and the rate of decrease in the potential of the pixel electrode set to the initial potential of 2V _C is different from the potential of the pixel electrode set to the initial potential of zero. The rate of increase is approximately equal if the off resistance of the switching transistor is linear.

Therefore, the potential of the counter electrode is DC voltage source (V _c )
Regardless of whether it is connected to V C or not, it is fixed to the potential of V _C via the liquid crystal capacitance or resistance.
In other words, if the counter electrode is configured with one electrode that is common to the entire display surface, there is no need to take out the electrode. As a result, it is possible to reduce the manufacturing cost of the active matrix liquid crystal display device.

Further, in the present invention, although the case where the potential of the counter electrode is set to V _C is shown, the same effect can be obtained when the potential is set to zero and positive and negative potentials are inputted to each pixel circuit. Furthermore, although the case where a digital signal is used as the data signal has been shown, it is clear that the same effect can be obtained even if the data signal is a video signal.

(Effects) As explained above, according to the present invention, the number of source lines having a positive potential with respect to a predetermined potential and the number of source lines having a negative potential with respect to a predetermined potential can be reduced. Since the number can be made almost equal, the average voltage level of all source lines becomes constant, which has the advantage of reducing gate line voltage fluctuations caused by electrostatic induction, and providing an active matrix type liquid crystal display device without display errors. .

[Brief explanation of drawings]

Fig. 1 is a diagram showing the configuration of a conventional active matrix type liquid crystal display device, Fig. 2 is a diagram showing the configuration of a conventional active matrix type display device with defect countermeasures, and Fig. 3 is a diagram to explain the cause of erroneous display. FIG. 4 is a block diagram of an embodiment of an active matrix liquid crystal display device according to the present invention, FIG. 5a is a diagram showing an example of the structure of a source line drive circuit according to the present invention, and FIG. FIG. 2 is a logic diagram of a driver circuit for one bit. DESCRIPTION OF SYMBOLS 1... Source line drive circuit, 2... Gate line drive circuit, 3, 11, 12... Switching transistor, 4... Capacitor, 5... Pixel electrode, 6...
...Counter electrode, 7...Liquid crystal, 8...Liquid crystal capacitance C _LC ,
9... Capacitance C _GD between gate line and drain, 10...
Capacitance between gate line and source line C _GS , 11, 12...
Switching transistor, 21, 22... Source line drive circuit, 23... Shift register, 24...
...Latch circuit, 25...Driver circuit, 26...
Data signal, 27...Clock signal, 28...AC conversion signal, 29 _j ...Latch circuit output signal, 30 _j ...
...Driver circuit output signal, 31...AND circuit,
32...Inverter, 33...Switch, S ₁ ~
S _n ... Source line, G ₁ ~ _{G n} ... Gate line, U _1,1 ~
U _o,n , UA _1,1 ~ _{UA o,n} , UB _j,1 ~ UB _j,n ... Pixel circuit.

Claims (1)

[Scope of Claims] 1. n gate lines and m source lines that intersect with each other, and n×m pixel circuits that are arranged in n rows and m columns at their intersections and hold input information for a desired period of time. It consists of a substrate with a 100% voltage, a counter substrate with a transparent electrode, and a liquid crystal sandwiched between these substrates _.
Or apply a voltage of -V _C and set the data signal to “0”.
In an active matrix liquid crystal display device that displays an image by applying a voltage of 0 to _the liquid crystal corresponding to A second group consisting of ×m _B pixel circuits (m _A +m _B = m, m _A ≒
_mB ), and among the pixel circuits that write data "1" in one frame period, the liquid crystal of the pixel circuits of the first group has +V _C (or -V _C ).
An active matrix type liquid crystal display device, comprising means for applying a voltage of -V _C (or +V _C ) to the liquid crystal of the pixel circuits of the second group. Claim 1, wherein the first group of 2 n×m _A consists of pixel circuits belonging to odd columns, and the second group of n×m _B consists of pixel circuits belonging to even columns. The active matrix type liquid crystal display device described in 2. 3. Claim No. 3, characterized in that a voltage of +V _C (or -V _C ) and a voltage of -V _C (or +V _C ) are alternately input to the liquid crystal of an arbitrary pixel circuit every frame period. The active matrix liquid crystal display device according to item 1 or 2. 4. Claims 1, 2, or 3, characterized in that the transparent electrode is composed of one electrode common to the entire display surface, and that electrode is connected to a predetermined DC voltage source. active matrix type liquid crystal display device. 5. Claims 1, 2, or 5, characterized in that the transparent electrode is composed of one electrode common to the entire display surface, and that electrode is not connected to any voltage source including ground potential. 3. The active matrix liquid crystal display device according to item 3.