JPH0142167B2 - - Google Patents
Info
- Publication number
 - JPH0142167B2 JPH0142167B2 JP53140352A JP14035278A JPH0142167B2 JP H0142167 B2 JPH0142167 B2 JP H0142167B2 JP 53140352 A JP53140352 A JP 53140352A JP 14035278 A JP14035278 A JP 14035278A JP H0142167 B2 JPH0142167 B2 JP H0142167B2
 - Authority
 - JP
 - Japan
 - Prior art keywords
 - transistor
 - level
 - output
 - transistors
 - power supply
 - Prior art date
 - Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
 - Expired
 
Links
Classifications
- 
        
- H—ELECTRICITY
 - H03—ELECTRONIC CIRCUITRY
 - H03K—PULSE TECHNIQUE
 - H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
 - H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
 - H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
 - H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
 - H03K19/09425—Multistate logic
 
 - 
        
- H—ELECTRICITY
 - H03—ELECTRONIC CIRCUITRY
 - H03K—PULSE TECHNIQUE
 - H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
 - H03K19/0175—Coupling arrangements; Interface arrangements
 - H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
 - H03K19/018507—Interface arrangements
 - H03K19/01855—Interface arrangements synchronous, i.e. using clock signals
 
 - 
        
- H—ELECTRICITY
 - H03—ELECTRONIC CIRCUITRY
 - H03K—PULSE TECHNIQUE
 - H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
 - H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
 - H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
 - H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
 
 
Landscapes
- Engineering & Computer Science (AREA)
 - Computer Hardware Design (AREA)
 - Physics & Mathematics (AREA)
 - Computing Systems (AREA)
 - General Engineering & Computer Science (AREA)
 - Mathematical Physics (AREA)
 - Power Engineering (AREA)
 - Logic Circuits (AREA)
 
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP14035278A JPS5567235A (en) | 1978-11-14 | 1978-11-14 | Output circuit | 
| US06/093,263 US4345172A (en) | 1978-11-14 | 1979-11-13 | Output circuit | 
| DE19792946025 DE2946025A1 (de) | 1978-11-14 | 1979-11-14 | Integrierter ausgangsschaltkreis | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP14035278A JPS5567235A (en) | 1978-11-14 | 1978-11-14 | Output circuit | 
Publications (2)
| Publication Number | Publication Date | 
|---|---|
| JPS5567235A JPS5567235A (en) | 1980-05-21 | 
| JPH0142167B2 true JPH0142167B2 (en, 2012) | 1989-09-11 | 
Family
ID=15266824
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| JP14035278A Granted JPS5567235A (en) | 1978-11-14 | 1978-11-14 | Output circuit | 
Country Status (3)
| Country | Link | 
|---|---|
| US (1) | US4345172A (en, 2012) | 
| JP (1) | JPS5567235A (en, 2012) | 
| DE (1) | DE2946025A1 (en, 2012) | 
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPS55158738A (en) * | 1979-05-29 | 1980-12-10 | Seiko Epson Corp | Semiconductor integrated circuit | 
| JPS5619585A (en) * | 1979-07-26 | 1981-02-24 | Toshiba Corp | Semiconductor memory unit | 
| JPS57166713A (en) * | 1981-04-08 | 1982-10-14 | Nec Corp | Output circuit | 
| JPS58207718A (ja) * | 1982-05-28 | 1983-12-03 | Nec Corp | 出力回路 | 
| JPS5936427A (ja) * | 1982-08-24 | 1984-02-28 | Mitsubishi Electric Corp | 出力回路 | 
| US4465945A (en) * | 1982-09-03 | 1984-08-14 | Lsi Logic Corporation | Tri-state CMOS driver having reduced gate delay | 
| US4518869A (en) * | 1982-12-21 | 1985-05-21 | Motorola, Inc. | Resistance comparator for switch detection | 
| NL8303835A (nl) * | 1983-11-08 | 1985-06-03 | Philips Nv | Digitale signaalomkeerschakeling. | 
| FR2555380B1 (fr) * | 1983-11-18 | 1986-02-21 | Efcis | Circuit de translation de niveau logique | 
| JPS6110319A (ja) * | 1984-05-30 | 1986-01-17 | Fujitsu Ltd | 出力制御回路 | 
| US4709162A (en) * | 1986-09-18 | 1987-11-24 | International Business Machines Corporation | Off-chip driver circuits | 
| IT1250908B (it) * | 1990-06-22 | 1995-04-21 | St Microelectronics Srl | Struttura di porta d'uscita a tre stati particolarmente per circuiti integrati cmos | 
| US5099156A (en) * | 1990-10-02 | 1992-03-24 | California Institute Of Technology | Subthreshold MOS circuits for correlating analog input voltages | 
| US5281869A (en) * | 1992-07-01 | 1994-01-25 | Digital Equipment Corporation | Reduced-voltage NMOS output driver | 
| US5399925A (en) * | 1993-08-02 | 1995-03-21 | Xilinx, Inc. | High-speed tristate inverter | 
| US5402081A (en) * | 1993-10-12 | 1995-03-28 | Advanced Micro Devices, Inc. | Input buffer circuit with improved speed performance | 
| US5541528A (en) * | 1995-08-25 | 1996-07-30 | Hal Computer Systems, Inc. | CMOS buffer circuit having increased speed | 
| JP2007258891A (ja) * | 2006-03-22 | 2007-10-04 | Nec Electronics Corp | 相補信号生成回路 | 
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US3648071A (en) * | 1970-02-04 | 1972-03-07 | Nat Semiconductor Corp | High-speed mos sense amplifier | 
| US3774053A (en) * | 1971-12-17 | 1973-11-20 | North American Rockwell | Clamping arrangement for reducing the effects of noise in field effect transistor logic circuits | 
| JPS5742249B2 (en, 2012) * | 1974-01-19 | 1982-09-08 | ||
| US3906255A (en) * | 1974-09-06 | 1975-09-16 | Motorola Inc | MOS current limiting output circuit | 
| JPS5265841U (en, 2012) * | 1975-11-11 | 1977-05-16 | ||
| JPS596528B2 (ja) * | 1975-12-17 | 1984-02-13 | 三洋電機株式会社 | シユツリヨクバツフアカイロ | 
| US4023050A (en) * | 1976-05-10 | 1977-05-10 | Gte Laboratories Incorporated | Logic level converter | 
| FR2379945A1 (fr) * | 1977-02-04 | 1978-09-01 | Labo Cent Telecommunicat | Circuit d'adaptation d'un systeme logique a un autre | 
| US4096398A (en) * | 1977-02-23 | 1978-06-20 | National Semiconductor Corporation | MOS output buffer circuit with feedback | 
| US4129793A (en) * | 1977-06-16 | 1978-12-12 | International Business Machines Corporation | High speed true/complement driver | 
| US4275313A (en) * | 1979-04-09 | 1981-06-23 | Bell Telephone Laboratories, Incorporated | Current limiting output circuit with output feedback | 
- 
        1978
        
- 1978-11-14 JP JP14035278A patent/JPS5567235A/ja active Granted
 
 - 
        1979
        
- 1979-11-13 US US06/093,263 patent/US4345172A/en not_active Expired - Lifetime
 - 1979-11-14 DE DE19792946025 patent/DE2946025A1/de active Granted
 
 
Also Published As
| Publication number | Publication date | 
|---|---|
| DE2946025C2 (en, 2012) | 1987-11-19 | 
| JPS5567235A (en) | 1980-05-21 | 
| US4345172A (en) | 1982-08-17 | 
| DE2946025A1 (de) | 1980-07-24 | 
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