JPH0139647B2 - - Google Patents

Info

Publication number
JPH0139647B2
JPH0139647B2 JP58067174A JP6717483A JPH0139647B2 JP H0139647 B2 JPH0139647 B2 JP H0139647B2 JP 58067174 A JP58067174 A JP 58067174A JP 6717483 A JP6717483 A JP 6717483A JP H0139647 B2 JPH0139647 B2 JP H0139647B2
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
layer
silicon layer
gate
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58067174A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58220431A (ja
Inventor
Augusutain Borufuganku
Furatsushu Peteru
Iifuanshitsuku Buranka
Tsuegeru Marukusu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS58220431A publication Critical patent/JPS58220431A/ja
Publication of JPH0139647B2 publication Critical patent/JPH0139647B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
  • Semiconductor Memories (AREA)
JP58067174A 1982-06-14 1983-04-18 多結晶シリコン層中の開孔の端部角度を設定する方法 Granted JPS58220431A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP821051737 1982-06-14
EP82105173A EP0096096B1 (de) 1982-06-14 1982-06-14 Verfahren zur Einstellung des Kantenwinkels in Polysilicium

Publications (2)

Publication Number Publication Date
JPS58220431A JPS58220431A (ja) 1983-12-22
JPH0139647B2 true JPH0139647B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-08-22

Family

ID=8189085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58067174A Granted JPS58220431A (ja) 1982-06-14 1983-04-18 多結晶シリコン層中の開孔の端部角度を設定する方法

Country Status (4)

Country Link
US (1) US4452881A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0096096B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS58220431A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3277343D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0469370A3 (en) * 1990-07-31 1992-09-09 Gold Star Co. Ltd Etching process for sloped side walls
KR970002427B1 (en) * 1994-01-14 1997-03-05 Lg Semicon Co Ltd Fine patterning method of photoresist film
US7022592B2 (en) * 2003-10-03 2006-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Ammonia-treated polysilicon semiconductor device
TWI258201B (en) * 2005-02-16 2006-07-11 Powerchip Semiconductor Corp Method for manufacturing semiconductor device and plug
CN104409324A (zh) * 2014-11-12 2015-03-11 吉林华微电子股份有限公司 能够避免沾污的多晶硅磷掺杂后处理清洗方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3827908A (en) * 1972-12-11 1974-08-06 Ibm Method for improving photoresist adherence
CH573661A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-01-02 1976-03-15 Ibm
US3841926A (en) * 1973-01-02 1974-10-15 Ibm Integrated circuit fabrication process
US3811076A (en) * 1973-01-02 1974-05-14 Ibm Field effect transistor integrated circuit and memory
JPS5218098B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-05-04 1977-05-19
US4004044A (en) * 1975-05-09 1977-01-18 International Business Machines Corporation Method for forming patterned films utilizing a transparent lift-off mask
US4160991A (en) * 1977-10-25 1979-07-10 International Business Machines Corporation High performance bipolar device and method for making same

Also Published As

Publication number Publication date
US4452881A (en) 1984-06-05
DE3277343D1 (en) 1987-10-22
JPS58220431A (ja) 1983-12-22
EP0096096B1 (de) 1987-09-16
EP0096096A1 (de) 1983-12-21

Similar Documents

Publication Publication Date Title
US4869781A (en) Method for fabricating a semiconductor integrated circuit structure having a submicrometer length device element
US4182023A (en) Process for minimum overlap silicon gate devices
US5158903A (en) Method for producing a field-effect type semiconductor device
US4149904A (en) Method for forming ion-implanted self-aligned gate structure by controlled ion scattering
US5300445A (en) Production method of an HEMT semiconductor device
US6878646B1 (en) Method to control critical dimension of a hard masked pattern
KR100268923B1 (ko) 반도체소자의이중게이트형성방법
US4554046A (en) Method of selectively etching high impurity concentration semiconductor layer
JPH0139647B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
US6087238A (en) Semiconductor device having reduced-width polysilicon gate and non-oxidizing barrier layer and method of manufacture thereof
JPH0298143A (ja) Ldd構造ポリシリコン薄膜トランジスタの製造方法
US5780345A (en) Semiconductor device and method for forming the same
US6107173A (en) Method of manufacturing semiconductor device
KR0170436B1 (ko) 모스트랜지스터 제조방법
US6091105A (en) Method of making a self-aligned dopant enhanced RTA MOSFET
KR100252890B1 (ko) 반도체 소자의 이중게이트 형성방법
EP0111097B1 (en) Method for making semiconductor devices having a thick field dielectric and a self-aligned channel stopper
KR100206957B1 (ko) 고전압 반도체소자 및 그 제조방법
JP3371600B2 (ja) Misトランジスタの製造方法
KR100702118B1 (ko) 반도체 소자의 제조방법
KR0184937B1 (ko) 반도체 소자의 트랜지스터 제조 방법
JP3376305B2 (ja) 半導体装置の製造方法
JPH0481327B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR0182871B1 (ko) 반도체 소자의 트랜지스터 제조 방법
JP3228794B2 (ja) 半導体装置の製造方法