JPH01318228A - Crystal growth method of semiconductor thin film - Google Patents

Crystal growth method of semiconductor thin film

Info

Publication number
JPH01318228A
JPH01318228A JP15013788A JP15013788A JPH01318228A JP H01318228 A JPH01318228 A JP H01318228A JP 15013788 A JP15013788 A JP 15013788A JP 15013788 A JP15013788 A JP 15013788A JP H01318228 A JPH01318228 A JP H01318228A
Authority
JP
Japan
Prior art keywords
substrate
thin film
gaas
semiconductor thin
grown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15013788A
Other languages
Japanese (ja)
Inventor
Hirochika Ishikawa
博規 石川
Shigeya Narizuka
重弥 成塚
Yasuto Kawahisa
川久 慶人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP15013788A priority Critical patent/JPH01318228A/en
Publication of JPH01318228A publication Critical patent/JPH01318228A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To acquire a semiconductor thin film with good surface homology having fewer dislocations and defects with good reproducibility by obtaining a clean epitaxial growth layer surface of a nonpolar semiconductor on a substrate in advance and by causing a polar semiconductor thin film to grow thereon at once. CONSTITUTION:An Si crystal growth layer 2 is epitaxial-grown on an Si substrate 1 of phase azimuth (100) in a thickness of 1mum at a growth temperature of 1100 deg.C by using SiH4 as raw gas. Then an Si substrate temperature is set at 450 deg.C and a GaAs buffer layer 3 is made to grow in a thickness of 100-200Angstrom . To anneal a GaAs buffer layer 3, the Si substrate temperature is further set to 750 deg.C and held for 10 minutes. After annealing is finished, the substrate temperature is lowered. Then the Si substrate 1 is heated to a usual growth temperature of 750 deg.C and held for about 10 minutes. Thereafter, a GaAs epitaxial layer 4 is grown on a GaAs buffer layer 3. According to this constitution, a good GaAs thin film of good surface which has fewer dislocations and defects can be acquired with good reproducibility.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、半導体薄膜の結晶成長方法にかかり、特に無
極性半導体基板上に異種の有極性半導体薄膜をエピタキ
シャル成長させる方法に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a method for growing crystals of a semiconductor thin film, and more particularly to a method for epitaxially growing a different type of polar semiconductor thin film on a non-polar semiconductor substrate. .

(従来の技術) 近年、シリコン基板上にGaAsなと他の半導体を成長
させるヘテロエピタキシーと呼ばれる技術が、低価格化
、大面積化の利点に加え、電子デバイスと光デバイスの
モノリシックIC化の可能性の点から注目されている。
(Conventional technology) In recent years, a technology called heteroepitaxy, in which GaAs and other semiconductors are grown on silicon substrates, has the advantages of lower costs and larger areas, as well as the possibility of monolithic ICs for electronic and optical devices. It is attracting attention from a gender perspective.

この成長方法としては、二段階成長法(M、 Akiy
ama at al、、 J、 CrystalGro
wth、 77(1986)490))が提案されてい
るが、この成長方法においては歩留りが大きな問題点で
あった。これは基板の前処理の微妙な変化により成長す
るaaAsNの膜質が大きく左右されることに原因があ
った。
This growth method is a two-step growth method (M, Akiy
ama at al, J, CrystalGro
wth, 77 (1986) 490)), but the yield was a major problem with this growth method. This is because the quality of the grown aaAsN film is greatly influenced by subtle changes in the pretreatment of the substrate.

(発明が解決しようとする課題) この様に従来の技術では、成長層の転位や欠陥などの原
因となっていた基板表面の前処理法が確立されていなか
った。
(Problems to be Solved by the Invention) As described above, in the conventional technology, a pretreatment method for the substrate surface, which causes dislocations and defects in the grown layer, has not been established.

本発明は−F記事情を考慮してなされたもので、その目
的とするところは、無極性半導体基板上に転位及び欠陥
の少ない良質の有極性半導体薄膜を再現性良く成長する
方法を提供することにある。
The present invention was made in consideration of the above circumstances, and its purpose is to provide a method for growing a high-quality polar semiconductor thin film with few dislocations and defects on a non-polar semiconductor substrate with good reproducibility. There is a particular thing.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明は半導体薄膜の結晶成長方法にかかり。 (Means for solving problems) The present invention relates to a method for growing crystals of semiconductor thin films.

無極性半導体基板上に有極性半導体薄膜を結晶成長させ
るにあたり、このfi極性半導体基板上に予め無極性半
導体結晶層を成長させ、次いで前記無極性半導体結晶層
上に有極性半導体薄膜を結晶成長させることを特徴とす
る。
In crystal-growing a polar semiconductor thin film on a non-polar semiconductor substrate, a non-polar semiconductor crystal layer is grown in advance on this fi polar semiconductor substrate, and then a polar semiconductor thin film is crystal-grown on the non-polar semiconductor crystal layer. It is characterized by

(作 用) 本発明によれば、無極性半導体基板上に有極性半導体薄
膜を結晶成長する際に、あらかじめ基板−ヒに無極性半
導体の清浄なエピタキシャル成長層表面を得、直ちにそ
の上ヘイf極性半導体薄膜を成長させることにより、転
位や欠陥が少なく、表面モホロジーの良好な半導体薄膜
を再現性良く得ることが可能となる。さらに、この無極
性半導体結晶)14は、基板と同一材料で構成すると、
−層良好な結果が得られる。
(Function) According to the present invention, when crystal-growing a polar semiconductor thin film on a non-polar semiconductor substrate, a clean epitaxial growth layer surface of a non-polar semiconductor is obtained on the substrate in advance, and then the surface of the non-polar semiconductor layer is immediately grown. By growing a semiconductor thin film, it becomes possible to obtain a semiconductor thin film with few dislocations and defects and good surface morphology with good reproducibility. Furthermore, if this non-polar semiconductor crystal) 14 is made of the same material as the substrate,
- Good layer results are obtained.

(実施例) 以下、本発明の実施例について図を用いて説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.

第2図に本発明の実施例に用いた有機金属気相成長(M
OCVD)装置の概略構成を示す、第2図において、1
0は石英製の反応容器で、カーボンのサセプタ20が設
置され、このサセプタ20の上に半導体基板:30が保
持される。基板30は加熱装置40により加熱される。
Figure 2 shows metal organic vapor phase epitaxy (M
In Figure 2, which shows the schematic configuration of the (OCVD) apparatus, 1
0 is a reaction vessel made of quartz, in which a carbon susceptor 20 is installed, and a semiconductor substrate 30 is held on this susceptor 20. The substrate 30 is heated by a heating device 40 .

この反応容器10にはガス導入口11から原料ガスが導
入、され、ガス排出口12から排出され、減圧下及び常
圧下でのエピタキシャル成長が可能となっている。
A raw material gas is introduced into the reaction vessel 10 through a gas inlet 11 and discharged through a gas outlet 12, allowing epitaxial growth under reduced pressure and normal pressure.

以下この装置を用い、Si基板上にGaAs結品を成長
させた実施例について説明する。
An example in which a GaAs crystal was grown on a Si substrate using this apparatus will be described below.

第1図は本発明の一実施例に係わる結晶成長工程を示す
断面図である。本実施例では熱サイクル法を用いた。な
お、この熱サイクル法については、本出願人による特願
昭62−61969号の出願がある。
FIG. 1 is a sectional view showing a crystal growth process according to an embodiment of the present invention. In this example, a thermal cycle method was used. This heat cycle method has been filed in Japanese Patent Application No. 1983-61969 by the present applicant.

まず、面方位(100)のSi基板1上に、 5in4
を原料ガスに用い成長温度1100°CにおいてSi結
晶成長層2をIμI厚にエピタキシャル成長させる。つ
いで、SL基板温度を450℃に設定し、GaAsバッ
ファ層3を100〜200人厚に成長させる。続いて前
記GaAsバッファ層3にアニールを施すため、SL基
板温度を750℃に設定し、10分間保持する。かかる
アニールが終了したのち基板温度を下げる。ついでSj
基板1を通常の成長温度750℃に加熱し、10分間程
度保持した後、前記GaAsバッファ層3上にGaAs
エピタキシャル層4を成長させる。これにより表面モホ
ロジが優れ、かつ、転位や欠陥の少い良好なGaAs薄
膜を再現性良く得ることができ、その転位密度を5xl
O’個/d以下にすることができた。
First, on a Si substrate 1 with a plane orientation (100), a 5in4
The Si crystal growth layer 2 is epitaxially grown to a thickness of IμI at a growth temperature of 1100°C using as a raw material gas. Next, the SL substrate temperature is set at 450° C., and the GaAs buffer layer 3 is grown to a thickness of 100 to 200 layers. Subsequently, in order to anneal the GaAs buffer layer 3, the SL substrate temperature is set at 750° C. and held for 10 minutes. After this annealing is completed, the substrate temperature is lowered. Then Sj
After heating the substrate 1 to a normal growth temperature of 750°C and holding it for about 10 minutes, GaAs is deposited on the GaAs buffer layer 3.
Epitaxial layer 4 is grown. As a result, a good GaAs thin film with excellent surface morphology and few dislocations and defects can be obtained with good reproducibility, and the dislocation density can be reduced to 5xl.
It was possible to reduce the number to O' pieces/d or less.

なお、本発明は上述した実施例に限定されるものでない
。例えば、前記単導体基板はシリコンに限定されるもの
ではなく、ゲルマニウムその他の無極性半導体を用いる
ことが出来る。また、Si結晶の膜厚は1μmに限るも
のではない、同様に、前記成長させる半導体薄膜は[1
aAsに限るものではなく、他の■−■族半導体、ある
いは■−■族半導体を用いることが出来る。また1本発
明は他の基板面方位に対しても有効であるゆさらに、G
aAsエピタキシャル層4の成長温度は750℃になん
ら限定されるものではな(、GaAsが最も良好に成長
する最適成長温度600〜800℃の範囲で適宜選択す
ればよい、また、GaAsバッファ層3の成長温度は4
50℃に限られるものではなく、  GaAsの通常の
最 −過成長温度よりも低ければよい。但し、バッファ
1f13の成長温度がGaAsの最適成長温度に近いと
バッファ層形成の効果が得られないので、一般に最適成
長温度よりも100℃程度以上低くすればよい。
Note that the present invention is not limited to the embodiments described above. For example, the single conductor substrate is not limited to silicon, and may be made of germanium or other non-polar semiconductor. Furthermore, the film thickness of the Si crystal is not limited to 1 μm; similarly, the semiconductor thin film to be grown is [1 μm].
It is not limited to aAs, but other ■-■ group semiconductors or ■-■ group semiconductors can be used. Furthermore, since the present invention is effective for other substrate surface orientations,
The growth temperature of the aAs epitaxial layer 4 is not limited to 750° C. (it may be appropriately selected within the range of 600 to 800° C. at which GaAs grows best). Growth temperature is 4
The temperature is not limited to 50°C, but may be lower than the normal maximum overgrowth temperature of GaAs. However, if the growth temperature of the buffer 1f13 is close to the optimum growth temperature of GaAs, the effect of forming a buffer layer cannot be obtained, so it is generally necessary to lower the growth temperature by about 100° C. or more than the optimum growth temperature.

さらに本発明は、通常の2段階成長法にも有効である。Furthermore, the present invention is also effective for conventional two-step growth methods.

また、 GaAsバッファ層、GaAsエピタキシャル
層の成長について、その成長方法もMOCVD法に限定
されるものではなく、他の気相成長法6例えば分子線エ
ピタキシー法(MBE法)などを用いてもよく、ドーパ
ントとして何を用いたものでもかまわない。
Furthermore, the growth method for the GaAs buffer layer and the GaAs epitaxial layer is not limited to the MOCVD method, and other vapor phase growth methods 6 such as molecular beam epitaxy (MBE method) may also be used. Any material may be used as a dopant.

〔発明の効果〕〔Effect of the invention〕

以−F説明したように1本発明によれば無極性半導体基
板上に有極性半導体薄膜を成長させる際に。
As explained below, according to the present invention, a polar semiconductor thin film is grown on a non-polar semiconductor substrate.

予め前記無極性半導体基板と同じ材料の無極性半導体結
晶を成長させることにより、転位や欠陥が少なく、表面
モホロジーのよい有極性半導体薄膜を再現性良く成長さ
せることが出来る顕著な利点がある。
By growing a nonpolar semiconductor crystal made of the same material as the nonpolar semiconductor substrate in advance, there is a significant advantage that a polar semiconductor thin film with few dislocations and defects and good surface morphology can be grown with good reproducibility.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例にかかる半導体薄膜の結晶成
長方法を説明するための断面図、第2図は本発明の一実
施例に用いられる成長装置を示す断面図である。 1−−−−−−−−−−シリコン基板 2−−−一一一−−−−シリコンエピタキシャル層3−
−−−−−−−−−GaAsバッファ層4−−−−−−
−一−−GaAsエピタキシャル層10−−−−−−−
−−一反応容器 30−−−−−−−−−−基板 代理人 弁理士 大 胡 典 夫 第  1  図 /2:’7)’スネL七口 1に2@
FIG. 1 is a cross-sectional view for explaining a method of growing crystals of a semiconductor thin film according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a growth apparatus used in an embodiment of the present invention. 1---------Silicon substrate 2---111---Silicon epitaxial layer 3-
----------GaAs buffer layer 4------
-1--GaAs epitaxial layer 10--
---Reaction container 30-----Substrate agent Patent attorney Norihiro Ogo No. 1 Figure/2:'7)'Sneet L Nanakuchi 1 to 2@

Claims (1)

【特許請求の範囲】[Claims]  無極性半導体基板上に有極性半導体薄膜を結晶成長さ
せるにあたり、この無極性半導体基板上に予め無極性半
導体結晶層を成長させ、次いで前記無極性半導体結晶層
上に有極性半導体薄膜を結晶成長させることを特徴とす
る半導体薄膜の結晶成長方法。
In crystal-growing a polar semiconductor thin film on a non-polar semiconductor substrate, a non-polar semiconductor crystal layer is grown on the non-polar semiconductor substrate in advance, and then a polar semiconductor thin film is crystal-grown on the non-polar semiconductor crystal layer. A method for growing crystals of a semiconductor thin film, characterized by:
JP15013788A 1988-06-20 1988-06-20 Crystal growth method of semiconductor thin film Pending JPH01318228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15013788A JPH01318228A (en) 1988-06-20 1988-06-20 Crystal growth method of semiconductor thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15013788A JPH01318228A (en) 1988-06-20 1988-06-20 Crystal growth method of semiconductor thin film

Publications (1)

Publication Number Publication Date
JPH01318228A true JPH01318228A (en) 1989-12-22

Family

ID=15490298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15013788A Pending JPH01318228A (en) 1988-06-20 1988-06-20 Crystal growth method of semiconductor thin film

Country Status (1)

Country Link
JP (1) JPH01318228A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04202097A (en) * 1990-11-30 1992-07-22 Hikari Gijutsu Kenkyu Kaihatsu Kk Semiconductor substrate and its production

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04202097A (en) * 1990-11-30 1992-07-22 Hikari Gijutsu Kenkyu Kaihatsu Kk Semiconductor substrate and its production

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