JPH0131196B2 - - Google Patents

Description

[Detailed Description of the Invention] <Technical Field> The present invention relates to a screen division control device for dividing a display screen into a plurality of regions and displaying the contents of an arbitrary region of an image information memory in each region. be.

<Prior art> When the screen of one display is divided into n pieces of arbitrary size and displayed, conventionally, as shown in Fig. 1, image information memory a corresponding to display screen b is used.
The image information was stored and displayed by dividing the image.
Therefore, in order to move a certain split screen or change the size of a split screen, it is necessary to rewrite the contents of the image information memory.

<Purpose of the Invention> The present invention has been made with the aim of solving the above-mentioned conventional problems, and as shown in FIG. It is displayed at any position on the display screen shown in FIG. b, and allows the split screen to be moved, changed in size, and the contents of the split screen to be changed in an instant.

<Embodiment> As shown in FIG. 3, a conventional display circuit consists of an address counter 1, an image information memory 2, a display timing circuit 3, and a horizontal/vertical timing circuit 4 (5 is a display, 6 is a bus line). ), the contents of the image information memory indicated in order by the address counter are displayed on the display under timing control. In this way, since the address counter only shows the image information memory in order,
In order to display a display screen as shown in FIG. 1b, it is necessary that the image information memory be the same as that shown in FIG. 1a.

In the present invention, as shown in FIG. 2, the image information memory need not be the same as the display screen, and parts of the image information memory can be combined for display.

The present invention is realized by placing an address conversion circuit 7 between a conventional address counter 1 and an image information memory 2 as shown in FIG. In other words,
Rather than sequentially showing the image information memory as in the past, the idea is to arbitrarily change the address indicating the image information memory to indicate and display an arbitrary location in the image information memory.

If this address conversion circuit is written in some detail, it will be as shown in Fig. 5. Here, the mechanism of address conversion will be explained with reference to FIG. 6 (a in the figure shows the image information memory, and b shows the display screen). In conventional display circuits, the display start address is
SAD, the address counter 1 outputs from the display start address SAD to the display end address SED, which is the end of one screen display, and supplies the address data from SAD to SED as is to the image information memory 2 to provide image information. Only the area of the memory 2 corresponding to the display screen (the area above the dotted line of the image information memory in FIG. 6) is displayed as is. Therefore, in order to display as shown in FIG. 6b in the state of the image information memory 2 shown in FIG. When data area A is addressed to the starting position to be displayed on the display screen (this address is referred to as a), it should be changed to the address a' of the starting position of data area A in Figure 6a, that is, the address should be converted. Bye.

That is, when displaying data area A at a position on the display screen that corresponds to data area B of image information memory 2, the first address at which data area A on the display screen is to be displayed is set to a (the address a is (corresponds to the start address of data area B)
Let the start address of the data area A of the image information memory 2 be a'. Further, it is assumed that a'-a=d, where d is a bias value held in a bias value register to be described later. Here, when the address counter starts from SAD and reaches a, if we add the bias value α, a+α=a', and the contents of area A are displayed in area B, and the 6th
The display screen shown in the figure will appear. However, since there is no information indicating the extent of area A, the display screen only displays area A and one screen around it.

Therefore, in order to determine the area (hereinafter referred to as a "window"), a column address counter 11, a column map RAM 12, a row address counter 13, a row map RAM 14, and a window selection circuit 15 shown in FIG. 5 are provided. The column address counter 11 is a counter that counts the horizontal direction of the display screen using the display clock DISPCLOCK as a counter clock signal and the horizontal and vertical BLANK signals as reset signals. On the other hand, the row address counter 13 is a counter that counts the vertical direction of the display screen using the horizontal and vertical BLANK signals as clock signals and the vertical synchronization signal VSYNC as a reset signal. In addition, the two RAMs, the column map RAM 12 and the row map RAM 14, divide each window W ₀ to _{W 3} horizontally and vertically as shown in FIG. It is a boundary memory. In the embodiment, the column map RAM 12 and row map RAM 14 of the screen boundary memory each have memories corresponding to windows W ₀ to W ₃ , and can be divided into four at most. The window selection circuit 15 is configured as shown in FIG.
Row MAP Data from each map RAM in the row
Data, Column MAP Data becomes 1 and remains on until the next 1 comes, and unless both the column and row directions are on, the window will not be selected. To summarize the above, the columns and
Map each column and row with address counter for each row
RAM, whose data determines which window is selected. Bias value register 16 ₀ corresponding to the selected window number S ₀ to _{S 3}
~ ₁₆₃ is selected by the multiplexer 17, and the bias values _α0 to _α3 , which are the stored contents, are added to the address a from the address counter at the previous stage (by the full adder 18), resulting in address a', which is stored in the image information memory. , and a window is displayed.

Since each column/row map RAM and bias value register can be freely rewritten, it is possible to display any area of the image information memory at any location on the display screen. In addition, window movement and size changes can be done instantaneously without rewriting the image information memory. In order to simplify the explanation, we have used four windows here, but
Any number of windows is possible if circuitry permits.

<Effect> 1 Up to 4 times to specify the boundaries of one split screen
Just by writing points in the screen boundary memory, you can instantly change the position and size of the split screen.

2 Address conversion can be performed simply by specifying the bias value for address conversion in a register called bias value register, and since the bias value register can be freely rewritten, the split screen display area of the image information memory can be moved freely and instantly. Can be done.

3. The flexibility of the screen is improved and the efficiency of image information memory usage is improved.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining the prior art, and a
b indicates the contents of the image information memory, and b indicates the display screen. FIG. 2 is a diagram for explaining the present invention, in which a shows the contents of the image information memory, and b shows the display screen. FIG. 3 is a block diagram showing a conventional display circuit. FIG. 4 is a block diagram showing a display circuit according to the present invention. FIG. 5 is a block diagram showing a specific configuration of the address translation circuit shown in FIG. 4. FIG. 6 is a diagram for explaining address conversion, in which a shows the contents of the image information memory and b shows the display screen. Figure 7 is the column and row map shown in Figure 5.
FIG. 3 is a diagram for explaining RAM. FIG. 8 is a block diagram showing a specific configuration of the window selection circuit 15 shown in FIG. 5. Explanation of symbols, 1: Address counter, 2: Image information memory, 3: Display timing circuit, 4: Horizontal/vertical timing circuit, 5: Display, 6: Bus line, 7: Address conversion circuit, 11: Column address counter, 12 : Column map RAM, 13: Row address counter, 14: Row map RAM, 1
5: Window selection circuit, 16 ₀ ,..., 16 ₃ : Bias value register, 17: Multiplexer, 1
8: Full adder.

Claims (1)

[Scope of Claims] 1. In a screen split display in which image information in an image information memory is sequentially read out by an address counter and displayed in each window on a display screen divided into a plurality of areas (windows), a predetermined area of the display screen is displayed. In order to display a predetermined image information area held in the image information memory at a window position, the address value of the address counter is changed in synchronization with display scanning to the image information area of the image information memory corresponding to the predetermined window. an address conversion circuit that performs conversion control to read out a display screen; a rewritable column map memory that stores the horizontal (column direction) divided screen boundary position for each window of a display screen that is divided into a plurality of windows; and a screen boundary memory including a rewritable row map memory for storing divided screen boundary positions in the direction (row direction), and the address conversion circuit reads the screen boundary memory in synchronization with horizontal/vertical scanning signals of the display screen. a window selection means for determining the window position of the display screen based on the screen boundary information read from the screen and outputting a window selection signal; and a memory for image information to be displayed on each window of the display screen divided into a plurality of windows and the window. a rewritable bias value memory storing a bias value for positioning each image information area in a corresponding window in correspondence with the image information area;
Based on a window selection signal outputted from the window selection means in synchronization with the scanning signal of the display screen, the bias value corresponding to the selected window is retrieved from the bias value memory, and the bias value is transferred from the address counter. The image information memory is read out using the address value output from the address conversion circuit, and a predetermined image information area of the image information memory is displayed at a predetermined window position on the screen. A screen splitting control device.