JPH01297846A - Semiconductor package and manufacture thereof - Google Patents
Semiconductor package and manufacture thereofInfo
- Publication number
- JPH01297846A JPH01297846A JP12695688A JP12695688A JPH01297846A JP H01297846 A JPH01297846 A JP H01297846A JP 12695688 A JP12695688 A JP 12695688A JP 12695688 A JP12695688 A JP 12695688A JP H01297846 A JPH01297846 A JP H01297846A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor package
- solder resist
- sealed
- resist
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229910000679 solder Inorganic materials 0.000 claims abstract description 19
- 239000011347 resin Substances 0.000 claims abstract description 17
- 229920005989 resin Polymers 0.000 claims abstract description 17
- 238000007789 sealing Methods 0.000 claims abstract description 15
- 238000007747 plating Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 11
- 239000004033 plastic Substances 0.000 claims description 9
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 229920000178 Acrylic resin Polymers 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- PPBRXRYQALVLMV-UHFFFAOYSA-N Styrene Chemical compound C=CC1=CC=CC=C1 PPBRXRYQALVLMV-UHFFFAOYSA-N 0.000 description 2
- 238000010297 mechanical methods and process Methods 0.000 description 2
- 238000005488 sandblasting Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 235000011121 sodium hydroxide Nutrition 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 238000004506 ultrasonic cleaning Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、耐湿信頼性に優れたプラスチック製多ピン半
導体パッケージ及びその製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a plastic multi-pin semiconductor package with excellent moisture resistance and reliability, and a method for manufacturing the same.
（従来の技術）
近年多ピン型半導体パッケージ（以下ＩＣパッケージと
いう）としては、ビングリッドアレーパッケージ（以下
ＰＧＡという）が利用されておジ、例えばエポキシ又は
ポリイミド樹脂のプリント基板をベースとした、いわゆ
るプラスチック製ＰＧＡ（以下Ｐ −ＰＣ）Ａという）
などがある。(Prior Art) In recent years, bin grid array packages (hereinafter referred to as PGA) have been used as multi-pin semiconductor packages (hereinafter referred to as IC packages). Plastic PGA (hereinafter referred to as P-PC A)
and so on.
これらＰＧＡ構造の断面図例は、第２図に示すとおりで
あり、その製造方法の中には、ソルダーレジスト３を施
す工程、プリント基板１を貫通したピン４と配線回路２
と全半田又は半田ペースト５で固定する工程、半導体チ
ップ（以下ＩＣチップという）６と配線回路２とをワイ
ヤー１でポンディングして、その後封止樹脂８で封止す
る工程などが含まれている〇
しかしながら、このＰ（）Ａでは、封止された部分にソ
ルダーレジスト３の硬化物又はメツキレゾストが残るた
め、封止樹脂との界面の密着性が弱くなり、水の浸入が
あると不純物イオンが抽出されてそれがボンディングバ
ット部まで侵入し、耐湿信頼性に多大な影響を及ぼすこ
とになる。Examples of cross-sectional views of these PGA structures are shown in FIG.
The process includes a process of fixing the semiconductor chip (hereinafter referred to as an IC chip) 6 and a wiring circuit 2 with a wire 1, and then sealing it with a sealing resin 8. Yes However, in this P()A, since the cured product of solder resist 3 or the resin resist remains in the sealed part, the adhesion of the interface with the sealing resin becomes weak, and if water enters, impurity ions will be generated. is extracted and penetrates into the bonding butt portion, greatly affecting moisture resistance reliability.
（発明が解決しようとする課題）
本発明は、かかる欠点を解決するものであり、工Ｃパッ
ケージの樹脂封止されている部分のソルダーレジストの
硬化物又はメツキレシス）ｆ全て除去することによシ、
封止樹脂との密着部分の強度？向上させることができ、
しかも水の浸入に際しても不純物イオンの抽出がないの
で、耐湿信頼性に優れた多ピン型半導体パッケージ及び
その製造方法を完成するに至っ□た。(Problems to be Solved by the Invention) The present invention solves these drawbacks by removing all of the hardened solder resist or solder resist from the resin-sealed portion of the C package. ,
What is the strength of the part that is in close contact with the sealing resin? can be improved,
Moreover, since there is no extraction of impurity ions even when water enters, we have completed a multi-pin type semiconductor package with excellent moisture resistance and reliability, and a method for manufacturing the same.
（課題が解決するための手段）
すなわち本発明は、
１、 プラスチック製多ピン型半導体パッケージにおい
て、該半導体パッケージの封止樹脂で封止される部分の
ソルダーレゾスト硬化物又はメツキレゾストが除去され
ていることを特徴するプラスチック製多ピン半導体パッ
ケージ
２、 プラスチック製多ピン型半導体パッケージにおい
て、封止樹脂で封止される部分の半導体チップと配線回
路とをワイヤーボンディングする際に、前記配線回路上
のソルダーレジスト硬化物又はメッキレジストラあらか
じめ全て除去することを特徴するプラスチック製多ピン
半導体パッケージの製造方法
である。(Means for Solving the Problems) That is, the present invention has the following features: 1. In a plastic multi-pin semiconductor package, a cured solder resist or a hardened resin in a portion of the semiconductor package to be sealed with a sealing resin is removed. A plastic multi-pin semiconductor package 2, characterized in that in the plastic multi-pin semiconductor package, when wire bonding is performed between a semiconductor chip in a portion to be sealed with a sealing resin and a wiring circuit, This method of manufacturing a plastic multi-pin semiconductor package is characterized in that the cured solder resist or plating resistor is completely removed in advance.
（実施例〕 本発明全以下実施例により詳細に説明する。(Example〕 The present invention will be explained in detail with reference to the following examples.
第１図は、本発明の実施例であり、ＩＣパッケージの封
止樹脂８で封止されている部分のＩＣチップ６とワイヤ
ー７でボンディングしている配線回路２のイルターレジ
スト３の硬化物は、全て除去されている。ソルダーレゾ
スト（メツキレゾストも含む）３としては、例えばエポ
キシ系樹脂、アクリル系樹脂、フェノール系樹脂などの
樹脂系、メッキレジストとしては、ポリエステル系樹脂
、スチレン系樹脂、アクリル系樹脂などが用いられてい
る。またレゾスト３の硬化物を除去する方法としては、
機械的方法、化学的方法が用いられておジ、機械的方法
としては、サンディング、サンドブラスト、ナイフによ
る方法であシ、化学的方法としては、塩化メチレン、苛
性ソーダ（但しメッキレジストは不可）などがある。FIG. 1 shows an embodiment of the present invention, in which the cured product of the filter resist 3 of the wiring circuit 2 is bonded to the IC chip 6 in the portion sealed with the sealing resin 8 of the IC package with the wire 7. have all been removed. As the solder resist (including Metsuki resist) 3, resins such as epoxy resin, acrylic resin, and phenol resin are used, and as the plating resist, polyester resin, styrene resin, acrylic resin, etc. are used. There is. In addition, as a method for removing the cured product of Resost 3,
Mechanical methods and chemical methods are used. Mechanical methods include sanding, sandblasting, and knife methods, and chemical methods include methylene chloride and caustic soda (however, plating resists cannot be used). be.
第１図は、封止樹脂８で封止されている部分が、ＩＣチ
ップ６と配線回路２と全ワイヤー７でボンディングして
いる位置に限定されているため、その他の部分の配線回
路２上のソルダーレジスト３の硬化物は、半田５の場所
のみが除去されている。In FIG. 1, the part sealed with the sealing resin 8 is limited to the position where the IC chip 6, the wiring circuit 2, and all the wires 7 are bonded. In the cured product of the solder resist 3, only the locations of the solder 5 are removed.
のソルダーレジスト３の硬化物全除去することにより、
製造することができる。By completely removing the cured product of solder resist 3,
can be manufactured.
実施例１
すでにソルダーレゾストヲ施してピンが回路と半田で固
定されているＰ −ＰＧＡプリント基板に、ＩＣチップ
と配線回路と全ワイヤーでボンディングする前に、配線
回路上のソルダーレゾスト硬化物をサンドブラスト法に
よｐ全て除去し、その後エタノールで超音波洗浄して乾
燥した。そして第１図に示すＰ −ＰＧＡ ’ｉ作成し
た。耐湿信頼性の試験結果は、表に示すとおシ比較例よ
り優れていた。Example 1 Before bonding the IC chip, wiring circuit, and all wires to a P-PGA printed circuit board that has already been solder-resisted and the pins are fixed with the circuit and solder, the cured solder-resist material on the wiring circuit is applied. All p was removed by sandblasting, followed by ultrasonic cleaning with ethanol and drying. Then, P-PGA 'i shown in FIG. 1 was prepared. The moisture resistance reliability test results shown in the table were superior to the comparative example.
実施例２
配線回路上のソルダーレジスト硬化物の除去方法として
、塩化メチレンを用いた以外は、実施例１と同様に行っ
た。耐湿信頼性の試験結果は、表に示すとおり比較例よ
り優れていた。Example 2 The same procedure as in Example 1 was performed except that methylene chloride was used as the method for removing the cured solder resist on the wiring circuit. The moisture resistance reliability test results were superior to the comparative example as shown in the table.
比較例
実施例１と同様なＰ、 −ＰＧＡプリント基板を用いて
、ＩＣチップと配線回路と全ワイヤーでボンディングす
る前に、配線回路上のボンディング部分のみのソルダー
レジスト硬化物全除去してボンディングを行い第２図に
示すＰ −ＰＧＡを作成した。Comparative Example Using the same P, -PGA printed circuit board as in Example 1, before bonding the IC chip, wiring circuit, and all wires, the cured solder resist only on the bonding part on the wiring circuit was completely removed and bonding was performed. A P-PGA shown in FIG. 2 was prepared.
耐湿信頼性の試験結果は、表に示すとおり断線不良率が
高かった。As shown in the table, the moisture resistance reliability test results showed a high disconnection defect rate.
以下衣にトランスファー成形で得た実施例及び比較例の
Ｐ −ＰＧＡパッケージ勿用いて、電圧印加状態におけ
るプレッシャークツカーテスト（以下ＢＰＣＴというつ
の結果を示す〇
（発明の効果〕
以上のとおり本発明は、ＩＣパッケージの封止部分にあ
たるソルダーレジスト又はメッキレジストを全て除去す
ることにより、封止部の密着強度が向上し、しかも不純
物イオンの佃出葡防止できるため、耐湿信頼性に優れた
プラスチラック製条ビン型半導体パッケージを得る効果
を有している。The following shows the results of a pressure puller test (hereinafter referred to as BPCT) under voltage application using the P-PGA packages of Examples and Comparative Examples obtained by transfer molding. By removing all the solder resist or plating resist that is the sealing part of the IC package, the adhesion strength of the sealing part is improved and impurity ions can be prevented from coming out, making it possible to use plasticac with excellent moisture resistance and reliability. This has the effect of obtaining a strip-bottle type semiconductor package.
第１図は、本発明の半導体パッケージの断面図であう、
第２図は、従来の半導体パッケージを表す断面図である
。
符号
１・・・プリント基板、２・・・配線基板、３・・・ソ
ルダーレジスト、４・・・ピン、５・・・半田、６・・
・ＩＣチップ、７・・・ワイヤー、８・・・封止樹脂、
９・・・ヘースト特許出願人 電気化学工業株式会社FIG. 1 is a cross-sectional view of a semiconductor package of the present invention.
FIG. 2 is a sectional view showing a conventional semiconductor package. Code 1...Printed board, 2...Wiring board, 3...Solder resist, 4...Pin, 5...Solder, 6...
・IC chip, 7... wire, 8... sealing resin,
9... Heest patent applicant Denki Kagaku Kogyo Co., Ltd.
Claims (1)
、該半導体パッケージの封止樹脂で封止される部分のソ
ルダーレジスト硬化物又はメッキレジストが除去されて
いることを特徴するプラスチック製多ピン半導体パッケ
ージ。 ２、プラスチック製多ピン型半導体パッケージにおいて
、封止樹脂で封止される部分の半導体チツプと配線回路
とをワイヤーボンデイングする際に、前記配線回路上の
ソルダーレジスト硬化物又はメッキレジストをあらかじ
め全て除去することを特徴するプラスチック製多ピン半
導体パッケージの製造方法。[Scope of Claims] 1. A plastic multi-pin semiconductor package, characterized in that the cured solder resist or plating resist of the portion of the semiconductor package to be sealed with the sealing resin has been removed. pin semiconductor package. 2. In a plastic multi-pin semiconductor package, when wire bonding is performed between the semiconductor chip in the area to be sealed with the sealing resin and the wiring circuit, all cured solder resist or plating resist on the wiring circuit is removed in advance. A method for manufacturing a plastic multi-pin semiconductor package, characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12695688A JPH01297846A (en) | 1988-05-26 | 1988-05-26 | Semiconductor package and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12695688A JPH01297846A (en) | 1988-05-26 | 1988-05-26 | Semiconductor package and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01297846A true JPH01297846A (en) | 1989-11-30 |
Family
ID=14948058
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12695688A Pending JPH01297846A (en) | 1988-05-26 | 1988-05-26 | Semiconductor package and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01297846A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014236115A (en) * | 2013-06-03 | 2014-12-15 | 株式会社デンソー | Molded package |
| JP2015208868A (en) * | 2014-04-24 | 2015-11-24 | アピックヤマダ株式会社 | Apparatus and method for resin molding and molded product |
-
1988
- 1988-05-26 JP JP12695688A patent/JPH01297846A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014236115A (en) * | 2013-06-03 | 2014-12-15 | 株式会社デンソー | Molded package |
| JP2015208868A (en) * | 2014-04-24 | 2015-11-24 | アピックヤマダ株式会社 | Apparatus and method for resin molding and molded product |
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