JPH01297572A - Logical inspecting device - Google Patents

Abstract

PURPOSE:To directly inspect a current logical output signal in an integrated circuit to be inspected by providing a current/voltage comparator between the integrated circuit to be inspected and an H or L level use comparator. CONSTITUTION:A current logical output signal which has been outputted from an integrated circuit to be inspected 1 passes through its output line 11 and a current sense resistance 12, and supplied to a current supply power source 13 and a current/voltage comparator 14. Also, a voltage drop corresponding to the current logical output signal is generated across the resistance 12. This voltage drop is converted to a voltage logical output signal corresponding to the current logical output signal, passes through a voltage logical sense line 3 and inputted to an H level use comparator 4 and an L level use comparator 6. Subsequently, each set level voltage of the current logical signals of a voltage conversion which have been inputted, respectively and an H level use setting power source 5 and an L level use setting power source 7 are compared. Its result is outputted from sampling data lines 9, 10 by synchronizing with a signal of a sampling line 8, and H or L is discriminated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a logic testing device equipped with a current/voltage converter.

Conventional Technology Conventionally, logic testing devices have been used to test highly integrated MOS-type integrated circuits such as DRAM and MPU, and ECL.
It is used to test high-speed bipolar integrated circuits such as the following, and the number of channels it can handle and the speed it can handle are impressive.

A conventional logic testing device will be explained.

FIG. 3 shows the configuration of a voltage logic comparator for one channel in a conventional logic testing device.

In FIG. 3, 1 is an integrated circuit to be tested, 2 is its lead bin, and 3 is a voltage logic sense line.

4 is a comparator for high fist level, 5 is a setting power supply for high and low level, 6 is a comparator for low level, 7 is a setting power supply for low level, 8 is a sampling line for comparison, 9 is for high level Sampling data
line, 10 is the sampling data for low level.
It's a line.

First, the voltage logic output signal output from the integrated circuit under test 1 is sent to a high level via the voltage logic sense line 3.
The input voltage logic output signal is input to the level comparator 4 and the low level comparator 6, and the set level voltage of the high level setting power supply 5 and the low level setting power supply 7 is compared. Ru. The output signal result of the compared voltage logic is output as sampling data from a high level sampling data line 9 or a low level sampling data line 10 in synchronization with the sampling signal on line 8, A determination is made.

Problems to be Solved by the Invention However, since the configuration of the above-mentioned conventional example has only a voltage logic comparator, in order to determine the output signal of the current logic in the integrated circuit under test, it is necessary to
The problem was that peripheral circuits that convert current to voltage were created for each lead pin of the integrated circuit, and the circuits were added and tested.

In order to solve the problems of the conventional example described above, the present invention provides a logic test that makes it possible to directly test the output signal of current logic in an integrated circuit under test without adding a peripheral circuit that converts current to voltage. The purpose is to provide equipment.

Means for Solving the Problems To achieve this object, the logic testing device of the present invention has the following features:
A current/voltage converter is provided between the integrated circuit to be tested and a high or low level comparator, and the output signal of the current logic is connected via the current/voltage converter.

Operation: With this configuration, the output signal of the current logic in the integrated circuit to be tested can be directly tested without adding a peripheral circuit for converting current into voltage for each lead pin of the integrated circuit.

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings.

First Embodiment FIG. 1 shows a logic testing device according to a first embodiment of the present invention.
FIG. 2 is a block diagram showing the configuration of a current logic comparator for one channel.

In FIG. 1, 1 is an integrated circuit to be tested, 2 is its lead pin, and 3 is a voltage logic sense line.

4 is a high level comparator, 5 is a high level setting power supply, 6 is a low level comparator, 7 is a low level setting power supply, 8 is a sampling line for comparison, 9 is a sampling for high level ·data·
line, 10 is the sampling data for low level.
11 is an output line of the integrated circuit to be tested, 12 is a current sense resistor, 13 is a current supply power source for the integrated circuit to be tested, and 14 is a current/voltage converter.

Next, the operation of this logic testing device will be explained.

First, a current logic output signal outputted from the integrated circuit under test l is supplied to a current-voltage converter together with a current supply power source 13 via its output line 11 and current sense resistor 12. A voltage drop occurs across the current sense resistor 12 in accordance with the output signal of the negative current logic. This voltage drop is converted by the current/voltage converter 14 into a voltage logic output signal that matches the current logic output signal, and is sent to the high level comparator 4 and the low level comparator 6 via the voltage logic sense line 3. Here, each input voltage-converted current logic signal is compared with each set level voltage of the high level setting power supply 5 and the low level setting power supply 7. The output signal result of the compared voltage-converted current logic is sent to the sampling data line 9 for high level or the sampling data line 10 for low level in synchronization with the sampling signal of sampling line 8 for comparison.
It is output as sampling data from the current, and it is determined whether the current is high or low.

As described above, according to this embodiment, by providing a current/voltage converter between the integrated circuit under test and the high or low level comparator, the output signal of the current logic can be converted to the output signal of the integrated circuit under test. It is possible to realize a logic testing device that can directly test each read bin without adding a peripheral circuit that converts current to voltage.

Second Embodiment FIG. 2 shows a logic testing device according to a second embodiment of the present invention.
FIG. 2 is a circuit block diagram showing the configuration of a current logic comparator for one channel.

1, the voltage sense jumper line 15 is connected to the voltage logic sense line 3 via an interlocking switch 16 for voltage/current logic selection.
and the output line 11.

The operation of this logic testing device will be explained.

First, the current logic or voltage logic output signals output from the integrated circuit to be tested 1 are distributed by selecting the switch 16. In the case of a current logic output signal, it is supplied via an output line 11 and a resistor 12 to a current supply power source 13 and to a voltage/current converter. A voltage drop occurs across the current sense resistor 12 in accordance with the output signal of the current logic. This voltage drop is converted by the voltage/current converter 14 into a voltage logic output signal that matches the current logic output signal, and is input to the high level comparator 4 and the low level comparator 6 via the output line 3. Ru. For voltage logic output signals, output line 11
and the voltage logic sense line 3, it is input to the high level comparator 4 and the low level comparator 6, and the voltage-converted current logic signal or voltage logic output signal input here and the high level The set level voltages of the level setting power supply 5 and the low level setting power supply 7 are compared. The output signal result of the compared voltage-converted current logic or voltage logic becomes high in synchronization with the sampling signal of the comparator sampling line 8.
Sampling data line 9 for level and row
It is output as sampling data from the level sampling data line 10, and it is determined whether the current or voltage is high or low.

As described above, by providing a voltage sense jumper line between the integrated circuit under test and the comparator for each high or low level via the interlocking switch for voltage/current logic selection, the current logic By selecting the output signals of and voltage logic, it is possible to realize a logic testing device for integrated circuits that is capable of direct testing.

In the second embodiment, 16 is an interlocking switch for selecting voltage/current logic, but this switch may be an electronic circuit switch that can select voltage/current logic on the fly.

Effects of the Invention As described above, according to the present invention, by providing a current/voltage converter between the integrated circuit under test and the high or low level comparator, the output signal of the current logic can be
A logic testing device capable of direct testing can be realized without adding a peripheral circuit for converting current to voltage for each lead bin of an integrated circuit. In addition, a voltage sense jumper line can be provided between the integrated circuit under test and the high or low level comparator via an interlock switch for voltage/current logic selection, allowing current logic and voltage logic to be selected. By selecting the output signal of , it is possible to realize a logic testing device that can perform direct testing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a current logic comparator in a logic testing device according to a first embodiment of the present invention, and FIG.
FIG. 3 is a block diagram of a voltage/current comparator in a conventional logic testing device. 1... Integrated circuit to be tested, 2... Bin of integrated circuit to be tested, 3... Voltage logic sense.
Line, 4... High level comparator,
5... Setting power supply for high level, 6...
・Low level comparator, 7...Low level
Level setting power supply, 8...Sampling line for comparator, 9...Sampling data line for high level, 10...Sampling data for low level・Line 11...
Output line of integrated circuit to be tested, 12...Current sense resistor, 13...Current supply power source for integrated circuit to be tested, 14...Current/voltage converter, 1
5... Voltage sense jumper line, 16
・・・・・・Interlocking switch for voltage/current logic selection. Name of agent: Patent attorney Toshio Nakao and one other person Figure 43

Claims (3)

[Claims] (1) A logic testing device characterized by comprising a voltage logic comparator and a current/voltage converter. (2) Voltage logic sense line, high level comparator, high level setting power supply, low level comparator, low level setting power supply, comparator sampling line, and high level a low level sampling data line, an output line of the integrated circuit under test, a current sense resistor, a current supply power supply to the integrated circuit under test, and a current/voltage converter. A logic testing device characterized by comprising: (3) The voltage sense jumper line connects the voltage logic sense jumper line to the voltage logic sense
3. The logic testing device according to claim 2, wherein the logic testing device is provided between the line and the output line of the integrated circuit to be tested.