JPH0129342B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase control circuit for burst signals,
In particular, when the carrier wave of a burst signal is used as a reference signal,
This invention relates to improvements in a burst signal phase control circuit that generates a frequency control signal for a voltage controlled oscillator included in a phase locked loop.

For example, time division multiple access (Time Division Multiple Access)
Multiple Access (abbreviated as TDMA method)
In satellite communication systems and the like, a burst communication system is used in which information is transmitted only during predetermined time slots corresponding to the number of stations participating in the communication system. The advantages of this burst communication method are that it can effectively form a TDMA method that connects multiple earth stations using the same communication satellite and the same frequency band, and that it can reduce the power consumption required for information transmission. It is.

Traditionally, this type of burst communication method
In the TDMA system, for example, in the case of the aforementioned satellite communication system, the main parts are shown in Figures 1 and 2 as an example, in order to demodulate the burst phase modulation signal in the participating earth station equipment. A phase demodulation device is used which includes a phase control circuit for burst signals as a component as shown in FIG.

The conventional phase demodulator shown in Figure 1 is a 4-phase PSK
(Phase Shift Keying), which is one example to which the phase control circuit for burst signals of the present invention is applied, but since its phase demodulation effect is already well known, detailed explanation will be omitted. Only the main points relevant to explaining the operation of the present invention will be described. Burst 4-phase input from terminal 101
One side of the PSK signal is input to phase detectors 1 and 2, and the other side is input to an inverse modulator 3, and a carrier wave is regenerated through the inverse modulation effect and sent to a frequency converter 4. In the frequency converter 4, the oscillation output of the voltage controlled oscillator 9 and the regenerated carrier wave are mixed, the frequency of this regenerated carrier wave is converted, and is input to the frequency converter 7 via the delay circuit 5 and band filter 6. be done. This delay circuit 5 does not necessarily include a specific delay circuit inserted, but simply represents the delay time etc. in a circuit including an amplifier, an amplitude limiting circuit, and a band filter 6 corresponding to the illustrated position. . In the frequency converter 7, the oscillation output of the voltage controlled oscillator 9 and the output of the bandpass filter 6 are mixed to generate a reference signal corresponding to the carrier frequency, one of which is passed through the π/2 phase shifter 8. One of the signals is supplied to the phase detector 1, and the other is directly supplied to the phase detector 2.
The phase detectors 1 and 2 each input the reference signal, synchronously detect the burst phase modulated signal, and output it from terminals 102 and 103.

The phase detection outputs output from the phase detectors 1 and 2 are input to the burst signal phase control circuit 10 on the other hand. These two phase detection outputs are shown as e ₁ and e ₂ in FIG. The burst signal phase control circuit 10 inputs these phase detection outputs e ₁ and e ₂ and generates a frequency control signal voltage e _c that controls the oscillation frequency of the voltage controlled oscillator 9 and sends it to the voltage controlled oscillator 9. do.
This frequency control signal voltage e _c is a frequency control voltage generated corresponding to the relative phase difference between the carrier wave of the phase modulation signal inputted from the terminal 101 and the oscillation output of the voltage controlled oscillator 9. This control voltage e _c
As a result, the oscillation frequency of the voltage controlled oscillator 9 is controlled and adjusted, and its frequency and phase are automatically controlled so as to always be in phase synchronization with the carrier wave of the burst phase modulation signal input. In the phase demodulation device shown in FIG. 1, the deterioration of the phase demodulation characteristics caused by the carrier frequency fluctuation in the burst phase modulation signal input is suppressed by forming the phase locked loop as described above. , is automatically corrected.

In the conventional phase demodulation device shown in FIG. 1, the burst signal phase control circuit 10 included as one of its components has conventionally been a phase control circuit whose main part is shown in FIG. It is being In FIG. 2, the phase detection signals e ₁ and e ₂ are inputted from terminals 104 and 105, respectively. These e ₁ and e ₂ are input to an adder 11 and a subtracter 12, respectively.
Signals corresponding to e ₁ +e ₂ and e ₁ −e ₂ are outputted and multiplied by the multiplier 13 . Further, the above e ₁ and e ₂ are multiplied in the multiplier 14, and the multiplier 13
and 14 are both input to the multiplier 15 and multiplied, and the output is the peak hold circuit 16.
The frequency control signal voltage e _c is outputted from the terminal 106 via the frequency control signal voltage e c .

Considering the case where the phase modulation signal input is a four-phase PSK signal, the above e ₁ and e ₂ are expressed by the following equation.

e ₁ = Asin (△θ±2n-1/4π) e ₂ = Acos (△θ±2n-1/4π) In the above formula, A is a constant related to the amplitude of the 4-phase PSK signal, and △θ is the 4-phase PSK signal. The phase difference (in radians) between the carrier wave of the signal and the oscillation output of the voltage controlled oscillator 9, n, is an integer of 1 and 2. e ₁ above
and e ₂ , the multiplier 15 outputs a phase error △
Assuming θ≈0, a phase error signal voltage E corresponding to the following equation is output.

E=K・(△θ) (K: constant) However, since the input signal to the phase demodulator is a burst PSK signal, the phase error signal voltage E is output in a form that is turned on and off over time. . What is shown in FIGS. 3a, b and c is that the frame period of the burst-like signal is _Tf ,
Time waveform of E and peak hold circuit 16 when burst times are T ₁ , T ₂ and T ₃ respectively
Frequency control signal voltage e _ci (i=
1, 2, and 3). The peak hold circuit 16 is a charging/discharging circuit consisting of a normal wave detector, a resistor, a capacitor, etc. In a steady state, as shown in _{FIG . 3} , respectively the average output voltage, i.e. the frequency control signal voltage
Output e _c1 , e _c2 and e _c3 . Obviously T ₁ < T ₂ <
Corresponding to T ₃ , e _c1 < e _c2 < e _c3 .

Therefore, in the conventional phase control circuit for burst signals, the voltage level of the frequency control signal for the voltage controlled oscillator changes as the burst time changes, and therefore the burst signal used in the phase demodulator of FIG. 1 changes. In the case of a signal phase control circuit, the frequency control signal voltage e _c generated by the phase detection signals e ₁ and e ₂ changes not only depending on the phase difference △θ, but also depending on the length of the burst time. Therefore, in a phase-locked loop formed using the carrier wave of the input 4-phase PSK signal as a reference signal, the loop gain changes depending on the burst time of the 4-phase PSK signal, and as a result, the burst-like 4-phase PSK signal This impedes the phase synchronization of the voltage controlled oscillator 9 for demodulation, which in turn becomes a factor that deteriorates the demodulation characteristics of the phase demodulation device itself.

In the above explanation, the operation of a conventional burst signal phase control circuit as a component of a phase demodulation device corresponding to a burst-like phase modulation signal in the TDMA system has been explained. In the phase control circuit,
In general, in a phase-locked loop that includes this phase control circuit for burst signals as a component, the frequency for the voltage controlled oscillator that is output from the phase control circuit for burst signals in response to fluctuations in the burst time of the burst signal input. The control voltage changes,
For this reason, it becomes impossible to maintain the loop gain of the phase-locked loop at an appropriate value at all times, deteriorating the phase locking characteristics of the phase-locked loop, and as a result, the voltage-controlled oscillator synchronizes with the carrier wave of the burst-like signal input. The disadvantage is that it impedes the phase synchronization function of the

It is an object of the present invention to eliminate the above-mentioned drawbacks and to provide a burst signal that always generates a proper frequency control signal for a voltage controlled oscillator, regardless of the burst time, rather than an intermittent phase error signal that occurs in response to the burst time. An object of the present invention is to provide a phase control circuit for use in the present invention.

The burst signal phase control circuit of the present invention functions as a component of a phase-locked loop formed in response to a burst signal input, and generates a frequency control signal for a voltage-controlled oscillator included in the phase-locked loop. In the burst signal phase control circuit, a binary discrimination circuit generates a first binary level signal by comparing an intermittent phase error signal generated in response to the burst signal input with a predetermined reference level. a generating circuit that generates a predetermined second binary level signal using the first binary level signal as a trigger; and a frequency control circuit that generates a frequency control signal.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 4 is a block diagram showing the main elements of one embodiment of the present invention. In FIG. 4, the burst signal phase control circuit of the present invention with reference to this embodiment includes an adder 17, a subtracter 18, a multiplier 19,
20 and 21, a binary discrimination circuit including a voltage comparison circuit 22, a reference voltage generation circuit 23, and a slicer 24, a generation circuit that generates a second binary level signal formed by a one-shot trigger circuit 25, and a reversible Counter 26, oscillator 27 and D-
A frequency control circuit including an A converter 28 is provided.

One embodiment of the present invention shown in FIG.
In a phase demodulator (see Figure 1) that supports burst phase modulation signals in the TDMA system,
An example of application of the present invention as an improvement means to an example of a conventional burst signal phase control circuit (see FIG. 2) applied as a component thereof will be shown.

In FIG. 4, the aforementioned phase detection outputs e ₁ and e ₂ are inputted from terminals 107 and 108, respectively. The operation of generating phase error signal voltage E from e ₁ and e ₂ via adder 17, subtracter 18, and multipliers 19, 20, and 21 is as follows:
This is similar to the case of the conventional example shown in FIG. This phase error signal voltage E is input to the voltage comparison circuit 22, and is a predetermined reference voltage generated in the reference voltage generation circuit 23 and input to the voltage comparison circuit 22.
Referring to V _r , a phase error signal voltage corresponding to E>V _r is determined as an H (high) level through the slicer 24, and a phase error signal voltage corresponding to E≦V _r is determined as an H (high) level. The first binary level signal is determined to be L (low) level, and is output to the one-shot trigger circuit 25. In FIG. 5a, the phase error signal voltage and the reference voltage output from the multiplier 21 are compared with a predetermined reference level.
The correspondence relationship with V _r is shown, and in Figure 5b,
The first binary level signal input to the one-shot trigger circuit 25 is shown. In FIG. 5a, T _f and T represent the frame period and burst time of the burst signal, respectively, as described above.

The one-shot trigger circuit 25 which receives the first binary level signal as a trigger uses, for example, a monostable multivibrator, and receives a trigger signal input via a resistor and a capacitor with a predetermined time constant from the T _f . It has a function of maintaining a constant level for a relatively long predetermined period of time, and therefore, in response to the first binary level signal inputted from the slicer 24, the one shot trigger circuit A second binary level signal shown in FIG. 5c is output. In other words, one shot
The trigger circuit 25 outputs a second binary level signal corresponding only to the first binary level signal, regardless of the frame period T _f of the burst signal and the length of the burst time T.
6 is input. As mentioned above, in this embodiment, the frequency control circuit for the voltage controlled oscillator includes the reversible counter 26, the oscillator 27, and the D-A
The second binary level signal from the one-shot trigger circuit 25 is input to a reversible counter 26, which receives a clock signal of frequency f _c input from the oscillator 27. is counted in both up and down directions in response to both the H and L levels of the second binary level signal, and is output to the DA converter 28. The DA converter 28 inputs this counter output, performs DA conversion, and outputs it from a terminal 109 as a frequency control signal voltage e _c . Shown in FIG. 5d are the output voltages of the D-A converter 28 corresponding to FIGS. 5a, b, and c, and the frequency control signal voltage e _c is the voltage V _c0 It can be seen that the center voltage is formed as a frequency control voltage for the voltage controlled oscillator. Obviously, this phase-locked loop constitutes an on-off control system that targets the phase amount, and the above-mentioned binary discrimination circuit and one-shot trigger circuit 25
By appropriately selecting various constants related to the frequency control circuit, it is possible to always maintain the phase locking characteristics of the phase lock loop normally, regardless of the length of the burst time of the four-phase PSK signal input. Therefore, the first frequency control voltage corresponds to the relative phase error between the carrier wave of the burst-like four-phase PSK signal and the oscillation output of the voltage-controlled oscillator included in the phase-locked loop, as shown in FIG. It is clear that in the phase demodulator, the oscillation frequency of the voltage controlled oscillator 9 is always normally controlled in response to the input carrier wave, regardless of burst time variations, and the demodulation characteristics of the phase demodulator function normally. be.

Next, a case will be described in which the above embodiment of the present invention is applied to another phase demodulation device.

FIG. 6 is a block diagram showing the main parts of the phase demodulation device when the present invention is applied to a phase demodulation device using another method. This phase demodulation device is an example of a phase demodulation device called a frequency multiplication type for 4-phase PSK signals, and one embodiment of the present invention described above with reference to FIG. The signal phase control circuit 39 is included as a component of the phase demodulation device.

To briefly explain the phase demodulating operation of the phase demodulating device shown in FIG.
The phase PSK signal is split into two and sent to phase detectors 29 and 30, and on the other hand, it is input to a frequency multiplier 31 where it is multiplied by 4, output as a non-modulated signal, and input to a frequency converter 32. . In the frequency converter 32, a voltage controlled oscillator 38
The oscillation output of and the unconverted output are mixed, the frequency of this unconverted signal is converted, and the delay circuit 53
The signal is then input to the frequency converter 35 via the bandpass filter 34. This delay circuit 33 does not necessarily include a specific delay circuit, as in the case of the phase demodulator shown in FIG. The delay circuits, etc. in the circuit including 34 are collectively represented. In the frequency converter 35, the oscillation output of the voltage controlled oscillator 38 and the output of the bandpass filter 34 are mixed,
The frequency of the unmodulated signal, that is, 4-phase PSK
A reference signal with a frequency corresponding to four times the carrier frequency of the signal is generated and input to the frequency divider 36. In the frequency divider 36, the frequency of this reference signal is divided by 1/4, one of which is supplied to the phase detector 29 via a π/2 phase shifter 37, and the other is directly supplied to the phase detector 30. supplied to Phase detectors 29 and 3
0, input the above reference signals, and
Burst 4-phase input from terminal 110
PSK signal is synchronously detected and terminals 111 and 11
2, the respective phase detection signals are output, and on the other hand, these phase detection outputs are inputted to the burst signal phase control circuit 39 as e ₁ and e _2. The operation is shown in FIG. This is similar to the case of the phase demodulator. Furthermore, these phase detection outputs e ₁ and e ₂ are input to the burst signal phase control circuit 39, and the frequency control signal voltage e _c
is generated and the oscillation frequency of the voltage controlled oscillator 38 is controlled and adjusted, and a phase-locked loop consisting of an on/off control system including phase detectors 29 and 30 is formed, regardless of the fluctuation of the burst time of the 4-phase PSK signal. The effect of maintaining the phase demodulation characteristics normally is also the same as in the case where the embodiment of the present invention is applied to the phase demodulation device shown in FIG. 1 described above.

In the above description, one embodiment of the present invention has been described in the case where it is applied to the two phase demodulators shown in FIG. 1 and FIG. It is not limited to a phase demodulator, but as a phase demodulator,
It goes without saying that the present invention can be applied to phase demodulators corresponding to burst-like phase modulated signals having various phase synchronized detection functions, including remodulation comparison type phase demodulators including, for example, voltage controlled oscillators. Furthermore, not only in the field of communications including the above-mentioned phase demodulation device, but also in the fields of radar, radio navigation systems, measurement control, etc., the carrier wave of a burst signal is used as a reference signal, and the reproduction process of a signal synchronized with this is used. , it goes without saying that the present invention can be effectively applied.

As explained in detail above, the present invention provides a frequency control means having an on/off control function for a phase-locked loop formed in response to a burst signal input, thereby controlling the burst time in a burst signal. unaffected by fluctuations,
There is an advantage that the phase locking characteristic of the phase locking loop can always be operated normally.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the main parts of an example of a phase demodulator to which the present invention is applied as a component; FIG. 2 is a block diagram showing the main parts of an example of a conventional burst signal phase control circuit; Figures 3a, b, and c are explanatory diagrams of the frequency control signal voltage generation operation by the conventional burst signal phase control circuit, respectively;
The figure is a block diagram showing the main parts of an embodiment of the present invention, Figures 5a, b, c, and d are operational waveform diagrams in an embodiment of the present invention, and Figure 6 is an application of the present invention as a component. FIG. 2 is a block diagram showing the main parts of another example of a phase demodulation device. In the figure, 1, 2, 29, 30... phase detector, 3...
Inverse modulator, 4, 7, 32, 35... Frequency converter, 5, 33... Delay circuit, 6, 34... Band filter, 8, 37... π/2 phase shifter, 9, 3
8... Voltage controlled oscillator, 10, 39... Burst signal phase control circuit, 11, 17... Addition circuit,
12, 18...Subtraction circuit, 13, 14, 15, 1
9, 20, 21... Multiplier, 16... Peak hold circuit, 22... Voltage comparison circuit, 23... Reference voltage generation circuit, 24... Slicer, 25... One shot trigger circuit, 26... Reversible counter ,
27... Oscillator, 28... D-A converter, 31...
...Frequency multiplier, 36...Frequency divider.

Claims (1)

[Claims] 1. In a burst signal phase control circuit that functions as a component of a phase-locked loop formed in response to a burst signal input and generates a frequency control signal for a voltage-controlled oscillator included in the phase-locked loop, the burst signal a binary identification circuit that generates a first binary level signal by comparing an intermittent phase error signal generated in response to a signal input with a predetermined reference level; a frequency control circuit that receives the second binary level signal and generates a frequency control signal for the voltage controlled oscillator through an integral action. A phase control circuit for burst signals, comprising: