JPH01282866A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the low current side hFE by making a highly doped base region in the silicon substrate exposed side of the base region of emitter base junction. CONSTITUTION:Electrodes 5, 6 are constituted after a base region 2 and an emitter region 3 are formed on a collector substrate 1 in a specified way. At that time, a highly doped base region 7 is formed in the substrate exposed side of the base region 2 of an emitter base junction. It is desirable that the highly doped base region 7 should be diffused just after the base region 2 being formed, before the formation of the emitter region 3. Constituting the highly doped base region 7 like this makes it possible to improve the low current side hFE ratio to 0.95 or more. It is because injection of minority carriers of the base surface part which have been dominant on the low current side was suppressed, and increase of base recombination current was able to be prevented, by providing the highly doped base region 7.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a bipolar transistor, and particularly to a current amplification factor hpg! on the low current side. Concerning improving J-neality.

[Conventional technology]

FIG. 4 shows a cross-sectional view of a conventional general transistor. That is, a base region 2, an emitter region 3, and electrodes 5 and 6 are formed on a collector substrate 1.

[Problem to be solved by the invention]

In such a transistor, the current amplification factor hP shown in Fig. 3 is
The linearity curve A of H is obtained and the collector current (I
hFE ratio on the low current side of C) (hpx (IC')/
h a. (IC″)) is approximately 0.9. For example, when used in class A, class 3, etc. power amplifier circuits, the lower the ratio on the low current side, the more the output waveform will be distorted and the input There was a drawback that the signal could not be amplified properly.

The reason why the hl'E ratio decreases is that the injection of minority carriers from the emitter occurs more frequently near the surface of the emitter than in the bulk of the <-s junction as the current of the IC becomes lower. This is because carriers recombine more in the base surface area than in the base bulk area and contribute to the base current.

[Means to solve the problem]

In the present invention, in order to improve the hl'E ratio on the low current side, a highly doped base region is formed on the base region side of the exposed silicon substrate portion of the emitter-base coupling.

〔Example〕

Next, the present invention will be explained using the drawings.

FIG. 1 is a sectional view of an embodiment of the present invention. Base region 2. After forming the emitter region 3, the electrodes 5 and 6 are formed.The difference from the conventional transistor (FIG. 4) is that a highly doped base region 7 is formed in the base region 2 on the exposed substrate side of the emitter-base coupling.
It is located where it is formed. This highly doped base region 7 is preferably diffused immediately after the base region 2 is formed and before the emitter region 3 is formed.

FIG. 2 is a sectional view of another embodiment of the invention.

The internal configuration is the same as that of the embodiment shown in FIG. 1, except that the highly doped base region 7 is formed not over the entire base region 2 but only in the vicinity of the emitter-base coupling. In this embodiment, by making the series resistance RB inside the base region 2 as thick as that of a conventional transistor, the hFE
The advantage is that the linearity is improved and at the same time the forward safe operating area of the transistor is expanded.

〔Effect of the invention〕

As explained above, the present invention improves the low current side hpg of the conventional transistor by configuring the highly doped base region 7.
The ratio was improved from 0.9 to 0.95 or more (Figure 4 B)
. That is, by providing the highly concentrated base region 7, it was possible to suppress the injection of minority carriers in the base surface portion, which was dominant on the low current side, and prevent an increase in the base recombination current.

In addition, the base surface concentration of the NPN type transistor confirmed this time is approximately 5×10” atm/aA in base region 2 at the maximum value.
Approximately I x 1019 atm/cn in the high concentration base region!
It is.

[Brief explanation of the drawing]

Fig. 1 is a sectional view of a transistor according to an embodiment of the present invention, Fig. 2 is a sectional view of another embodiment of the invention, and Fig. 3 is a cross-sectional view of a transistor according to an embodiment of the present invention.
FIG. 4, which is a diagram showing the J-neality curve, is a sectional view of a conventional device. DESCRIPTION OF SYMBOLS 1... Collector substrate, 2... Base region, 3... Emitter region, 4... Insulating film, 5... Emitter electrode, 6...Base electrode, 7...High concentration base region, AB...
...h□linearity curve, engineering. l+L2...
...IC current value. Agent Patent Attorney Uchihara Oto Base cold Qh board 3 l mi
7 ri 4 rae 4.

Claims (1)

[Claims] a first semiconductor region of one conductivity type; a second semiconductor region of another conductivity type provided on the surface of the first semiconductor region;
the third semiconductor region of one conductivity type provided on the surface of the second semiconductor region; and the second semiconductor provided on the surface of the second semiconductor region in contact with the third semiconductor region. a fourth semiconductor region of the other conductivity type having a higher concentration than the second semiconductor region; a first electrode connected to the second semiconductor region; and a fourth semiconductor region connected to the third semiconductor region. A semiconductor device characterized by having a second electrode.