JPS60116170A - Semiconductor device - Google Patents

Abstract

PURPOSE:To perform the operation of a bipolar transistor by forming the other conductive type third region between the emitter and the collector regions of a semiconductor substrate, and implanting the majority of carrier in an insulating semiconductor region under the third region, thereby forming an imaginary base region in the third region. CONSTITUTION:The first and second regions 11, 12 are formed by ion implanting at the prescribed interval as n type emitter and collector regions in a semi-insulating semiconductor 10. The third p type high impurity density regions 13 is formed by ion implanting or diffusing on the plane surface between the first and the second regions 11 and 12. Emitter, collector and base electrodes 14, 15, 16 are formed on the regions 11, 12, 13, respectively. A forward bias is applied between the regions 11 and 13, and a reverse bias is applied between the regions 13 and 12. The holes of the majority of carrier from the region 13 are formed with an imaginary base region 18 by implanting to the high resistance region 17 of the conductor 10 under the region 13, thereby operating as lateral structure n-p-n type bipolar transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION Industrial Application) 'J'f The present invention provides a semiconductor device, and particularly a novel semiconductor device with a special configuration that allows high-bolar transistor operation.

Background technology and time II! JI): Akira Semiconductor'US
411 times (/8 times 1/& element) This bipolar transistor has a so-called lateral structure in which the emitter, base, and two-channel regions are arranged in a plane to simplify manufacturing and wiring patterns. However, this lateral structure bipolar transistor generally has a drawback of having a small current amplification factor β.

On the other hand, semiconductor devices using compound semiconductors such as GaAs,
Semiconductor cellulose circuits based on this technology are attracting attention because of their excellent commercial performance. In this compound semiconductor integrated circuit, for example, as shown in FIG. 1, for example, an n-type channel region (2) is formed on a semi-insulating compound semiconductor (1), and for example, A p-type gate region (3) is selectively formed by a diffusion method or the like to form a "C-gate junction JG," and on both sides thereof, for example, an n-type source region (4) and drain region (5) are formed. A selectively formed junction field effect transistor (J-FE)
T) is formed as a circuit element.

OBJECTS OF THE INVENTION The present invention applies a semiconductor device which has a lateral structure, operates as a bipolar transistor with a large current amplification factor, and is highly commercially viable, to an integrated circuit using, for example, two connected compound semiconductors. To make it possible to form the J-FIT in the same process as the manufacturing process of J-FIT, etc., without increasing any special work steps.

SUMMARY OF THE INVENTION In the present invention, a first region serving as an emitter region of one conductivity type and a second region serving as a collector region are arranged in a semi-insulating semiconductor with an IVA of 1λ for a required period. A third region of another conductivity type is provided between the first and second regions. Then, a forward bias 11 is applied between the third region and the first region. inject,
A virtual base region is formed in this third region and the bipolar transistor 11iJ+ is operated.

Embodiment An example of a semiconductor device according to the present invention will be explained with reference to FIG. Semi-insulating, essentially undoped with impurities, i(1+Ill, resistive, e.g. G a A
s l1l-V group compound semiconductor substrate or semiconductor layer a
For example, facing one principal surface (10a) of
The quotient impurity concentration ffs 1 and the second regions (11) and (12), which are the emitter and collector regions of the mold, respectively, are
For example, by ion implantation, the grooves C are arranged and formed at a required depth in a plane while maintaining a required interval. Then, between the first and second regions (11) and (12), a third region (13) having a p-type +lJi impurity concentration is formed between the regions (11) and (12) by ion implantation, diffusion, or the like. The area 12) is formed so as to face the main surface facing the areas 11 and 12, and to be parallel to the areas 11 and 12 in a plane. 1st. Emitters are provided in the second and third regions (11), (12) and (13), respectively.

Collector and base electrodes (14) (15) and (1
6) is ohmicly deposited. E, C and B indicate emitter, collector and base terminals, respectively.

Then, ζ, a forward bias is applied between the first and third regions (11) and (13), and a reverse bias is applied between the third and second regions (13) and (12). In this way, the third area (1
From 3), the pole with many hits '7 is in the third area (13)
The semi-insulating semiconductor (1 (II) between the first and second regions (11) and (12) of the
is injected into the virtual (virtual)
virtual) base region (18), which promotes the injection of electrons of the majority carriers in the first region (I1), which reach the third region (13) through 31η through the virtual base region. Structure II-p-
It operates as a type II bipolar transistor.

This virtual base region (18) is a portion where carriers are efficiently injected from the first and second regions (11) and (12) of the region (I7), and mainly the third region (
13) ``l・smell'' is generated.

In addition, in the example shown in Figure 2, (J, each area (month) ~ (
13) are arranged on the C plane while maintaining the distance between the respective holes. In Fig. 3, the ε-th and second areas (11) and (12) It can also be formed to extend over the top. In this case, "C" has the advantage that the distance between the first and second regions (11) and (12), as well as the substantial base +I?d w b, can be made smaller. Portions corresponding to those in the figures are designated by the same reference numerals, and redundant explanation will be omitted.

In addition, in the above example, ζ is the first to third regions (11
) to (13) are formed by the ion implantation method or the diffusion method, and these are shown in the diagram as shown in Figure 4.
The first and second regions (11) and (12) may be formed by a method such that the substantial depth of the first and second regions (11) and (12) is deeper than that of the third region (13). Concave portions (19) are formed in the portions forming regions (11) and (I2), respectively.
) and (20), and these four parts (19) and (2
The first and second regions (11) and (12) can also be formed in the substrate 0) by an alloying method, a diffusion method, an ion implantation method, or the like.

Effects of the Invention According to the semiconductor device according to the present invention described in 1.2, each region (11) to (13) has a lateral structure arranged in a flat pattern, so that electrode extraction and wiring are facilitated. , is advantageous when configuring an integrated circuit, and each region jliSi(11) ('12) (13) is, for example, J-PI! explained in FIG. Since each region in T can be formed in the same process as +41151 (3), there is no need to set up a special work process (the manufacturing process is done in C
It is also useful to apply this method to the first integration period.

Moreover, as mentioned above, the present invention device F! , the smell ζ has a lateral structure, but nevertheless,
There is a benefit in that humans can increase the current by increasing the rate of 1:1. That is, in the present invention, ζ is substantially the base region, ie, the current 1 due to the human gear t1, as described above.
/8 outside the third region (13) having a commercial impurity concentration, that is, in the region (17) with a low impurity concentration, the diffusion length of the 11 carriers is extremely long. , and that it is not easily affected by the part of the semiconductor surface where the recombination rate is high; is low and flat and suffers from the shadow of the collector voltage.
The current increases by +1'ii due to the flow in areas where J is difficult.
C+1 bipolar transistor operation is performed.

Further, especially when constructed using a compound semiconductor, it is possible to obtain a semiconductor device that can operate at a further +111 speed.

Furthermore, since the substantial base region is formed in a semi-insulating semiconductor, this characteristic is less affected by variations in the depth, characteristics, etc. of the third region (■3); , it is possible to easily manufacture a semiconductor device with stable and uniform characteristics.

Also, for the third area (13), the first and second areas 1) 5
Since (11) and (2) have a 4-1 property, it is possible to construct a transistor in which the emitter and collector are symmetrical.

In addition, since it is composed of a semi-insulating semiconductor, when applied to an integrated circuit, the isolation between elements is
! There are profits that can be made.

[Brief explanation of drawings]

FIG. 1 is an enlarged sectional view of a semiconductor device according to the present invention, and FIGS. 2 to 4 are enlarged sectional views of each side of the semiconductor device according to the present invention. (101 is a semi-insulating 171 semiconductor, (11), (12) and (13) are the first, second and third regions.

Claims (1)

[Claims] A semi-insulating semiconductor has a first layer that becomes a conductivity type emitter region.
The area and the second area, which will become the rectifier area, are arranged with a required distance 1) between them, and the first and 24th! A third region of another conductivity type is provided between the self regions, a forward bias voltage is applied between the third region and the first region, and the majority of the 21 people from the third region are The virtual base area
A semiconductor device formed on the semi-insulating semiconductor below the region to enable the operation of a bipolar transistor: 1.