JPH01276925A - Digital recording and reproducing device - Google Patents

Abstract

PURPOSE:To prevent the deterioration in the quality of a reproduction signal due to mis-detection of an error by applying AD conversion to each sampled value to obtain a digital signal, generating an error detection correction code signal from the digital signal, applying error detection and correction of the digital signal through the use of the said signal so as to obtain a reproduced digital signal. CONSTITUTION:An error detection correction code signal generating circuit 4 generates for each sampling m-set of error detection correction codes, which are given to a recording system processing circuit 5. An error detection correction circuit 8 of a recording reproducing system 6 uses the error detection correction code signal to detect an error in the digital signal and gives an error detection flag signal to an error discrimination circuit 9 in response to the result of error detection. the error discrimination circuit 9 receives an error detection flag signal from the error detection correction circuit 8 count the number of errors for a prescribed period T. If the count ne is a prescribed value nh or over, it is regarded that mis-detection is much caused, and an interpolation digital signal is outputted, and if the count ne is a prescribed value nh or less, it is regarded that mis-detection is less caused, and then a reproduced digital signal is outputted and it is given to a DA converter 14 as the output digital signal.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a digital recording and reproducing apparatus for converting analog signals such as video signals and audio signals into digital signals and recording and reproducing the digital signals.

Conventional technology Conventionally, analog signals such as video signals and audio signals are converted into digital signals by analog-to-digital conversion (hereinafter abbreviated as AD conversion), and errors occurring in the recording and reproducing system when recording and reproducing these digital signals are detected and There is a method of recording and reproducing by adding an error detection/correction code to correct the error.

Then, during reproduction, this error detection/correction code is used to perform error detection and correction, thereby reproducing an error-free digital signal.

Problems to be Solved by the Invention When performing this error correction, as the error rate in the recording/reproducing system increases, the uncorrectable error rate increases and some samples cannot be corrected. For samples that cannot be corrected, a common method is to use an error detection flag to identify the erroneous sample, and interpolate using the average value of samples before and after this sample. However, as the error rate in the recording and reproducing system increases, the number of false detections increases, making it impossible to identify erroneous samples, and interpolation does not work satisfactorily. When such an erroneous detection occurs, for example, in the case of recording and reproducing an audio signal, a click sound is generated, which causes a problem in that the sound quality is significantly deteriorated.

In view of the above-mentioned problems, the present invention provides a digital recording/reproducing apparatus that reduces significant deterioration in reproduction quality due to erroneous detection caused by an increase in the error rate of the recording/reproducing system.

Means for Solving the Problems In order to solve the above-mentioned problems, the digital recording and reproducing apparatus of the present invention includes a first means for sampling an analog signal at a constant period and converting each sample value into an analog-to-digital format to obtain a digital signal. , a second means for generating an error detection/correction code signal from the digital signal; a third means for recording and reproducing the digital signal and the error detection/correction code signal on a recording medium; A fourth means for obtaining a reproduced digital signal by detecting and correcting errors in this digital signal using a correction code signal, and counting the number of errors occurring for a certain period of time, and checking whether this counted value is equal to or greater than a predetermined number. a sixth means for determining whether the difference between a certain sample value of the reproduced digital signal and a predicted value generated from a previous sample value is a predetermined value; a sixth means for outputting the predicted value instead of the sample value to output an interpolated digital signal only when the counted value is equal to or greater than a predetermined number; A seventh means for obtaining an output digital signal by outputting a reproduced digital signal when the interpolated digital signal is less than 1, and an eighth means for converting the output digital signal from digital to analog to obtain a reproduced analog signal. It is prepared.

According to the above-described configuration, the present invention samples an analog signal at a constant period by the first means, AD converts each sample value to obtain a digital signal, and performs error detection from this digital signal by the second means. - A correction code signal is generated, and the third means records and reproduces this digital signal and the error detection/correction code signal on a recording medium. During reproduction, the fourth means detects and corrects errors in this digital signal using the error detection/correction code signal to obtain a reproduced digital signal. Next, by the means shown in FIG. 6, the number of errors occurring for a certain period of time is counted, and it is determined whether this counted value is greater than or equal to a predetermined number or less than a predetermined number, and a control signal is generated in accordance with the result of this determination. On the other hand, only when the difference between a certain sample value of the reproduced digital signal from the fourth means and the predicted value generated from the previous sample value is equal to or more than a predetermined value, This predicted value is output instead of [, and an interpolated digital signal is output. That is, by this sixth means, when the difference from this predicted value is greater than or equal to a predetermined value, this sample value is regarded as an error, and interpolation is performed using this predicted value, without using an error detection flag. Then, the seventh means outputs the interpolated digital signal by assuming that when the control signal and the count value are greater than a predetermined value, there are many occurrences of false detection, and when it is less than a predetermined value, the occurrence of false detection is extremely high. The output digital signal is obtained by outputting the reproduced digital signal on the assumption that the number is small. Next, this output digital signal is subjected to digital-to-analog conversion (hereinafter abbreviated as DA conversion) by an eighth means to obtain a reproduced analog signal.

Embodiment Below, a digital recording/reproducing apparatus according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a block diagram of an embodiment of the present invention, in which 1 is a recording signal input terminal for inputting a recording signal, 2 is a sample hold circuit for sampling the recording signal, and 3 is each sample value from the sample hold circuit. 4 is an error detection/correction code signal generation circuit that generates an error detection/correction code signal from the digital signal; 5 is an error detection/correction code signal generation circuit that records the digital signal and error detection/correction code signal; 6 is a recording system processing circuit that converts the recording modulation signal into a signal suitable for reproduction and obtains a recording modulation signal; 6 is a recording and reproduction system processing circuit that records and reproduces the recording modulation signal on a recording medium and obtains a reproduction modulation signal during reproduction; 7 is a reproduction modulation circuit; A reproduction system processing circuit converts the signal in the opposite manner to that during recording and reproduces the digital signal and the error detection/correction code signal; 8 detects and corrects errors in the reproduced digital signal using the error detection/correction code signal; An error detection/correction circuit 9 obtains a reproduced digital signal and outputs an error detection flag signal according to the error detection result. An error determination circuit 1o determines whether the value is greater than or equal to a value and generates a control signal according to the determination result, and 1o compares the sample value of the reproduced digital signal with its predicted value, A difference determination circuit 11 determines whether the value is greater than or equal to a value and outputs a control signal according to the result; 11 is a difference determination circuit that detects a predicted value signal for a certain sample value of the reproduced digital signal from a plurality of samples immediately before that sample value; Predicted value circuit that generates from values, 1
2 is a switch that outputs an interpolated digital signal by switching between the reproduced digital signal and the predicted value signal in response to a control signal from the difference discrimination circuit; and 13 is a switch that is controlled by a control signal from the error discrimination circuit and outputs the reproduced digital signal and the interpolated digital signal. A switch for switching and outputting an output digital signal, 14
D converts the output digital signal to obtain a playback signal.
A converter 16 is a reproduction signal output terminal for outputting a reproduction signal.

Next, the operation will be explained. First, a recording signal is applied to a sample hold circuit 2 via a recording signal input terminal 1. This recording signal is a video signal.

Although the signal is an analog signal such as an audio signal, in this embodiment, for ease of explanation, it is assumed that the signal is an audio signal.

Next, in the sample and hold circuit 2, this audio signal is sampled at a constant cycle and held until the next sampling, and then provided to the AD converter 3. The AD converter 3 performs AD conversion on each sample value to obtain a digital signal, which is supplied to an error detection/correction code signal generation circuit 4 and a recording system processing circuit 6. Error detection/correction code signal generation circuit 4
Here, m error detection/correction codes are generated for every k samples, outputted as an error detection/correction code signal, and given to the recording system processing circuit 5. However, k and m are arbitrary natural numbers. Next, the recording system processing circuit 5 converts the digital signal and the error detection/correction code signal into signals suitable for recording and reproduction to obtain a recording modulation signal, and outputs the signal to the recording and reproduction system 6. The recording system processing circuit 6 is a circuit for obtaining a recording modulation signal suitable for recording and reproduction, and is composed of, for example, the following circuit. An interleaving circuit that temporally rearranges digital signals and error detection/correction code signals to make them resistant to burst errors, a circuit that adds a synchronization signal to perform clock synchronization during playback, and a modulation circuit that modulates signals suitable for recording and playback. Consists of circuits, etc.

Next, the recording/reproducing system 6 records and reproduces this recording modulation signal onto a recording medium, and upon reproduction, a reproduction modulation signal is obtained and applied to the reproduction system processing circuit 7. The reproduction system processing circuit 7 performs the reverse signal processing of the reproduction modulation signal to the recording system processing circuit 6, reproduces the digital signal and the error detection/correction code signal, and performs error detection\
It is applied to the correction circuit 8. The error detection/correction circuit 8 uses this error detection/correction code signal to detect errors in the digital signal, and supplies an error detection flag signal to the error discrimination circuit 9 in accordance with the error detection result. Furthermore, according to the error detection result, error correction of the digital signal is also performed, and the difference discriminating circuit 1o and the switch 12.
Give to 13. A difference determining circuit 10 determines whether each sample value of the reproduced digital signal and a predicted value signal to be described later is larger or smaller than a predetermined value X, and provides a control signal to the switch 12 in accordance with the result. The switching of the switch 12 is controlled by this control signal, and when the difference is large, a predicted value signal is outputted and applied to the switch 13 and the predicted value circuit 11 as an interpolation digital signal. Next, the predicted value circuit 11 generates a predicted value signal having a predicted value corresponding to this sample/1/[ using the sample value earlier than the sample value of the currently reproduced digital signal, and the switch 12
is given to the difference discrimination circuit 1o. , Note that this predicted value circuit 1
Various circuits can be considered as 1, but for example, for a certain sump/X/Si, the sump immediately before it)vSi
It consists of a delay circuit that delays and synchronizes two samples of -1°5i-2, and an arithmetic circuit that performs the following calculation to generate a predicted value Si'.

Si' ”5i-1+Δ5i-1=Si-1+(SL
-1-8i-2)" 2Si-1-8i-2...
... (1) However, Δ51-1 is 51-2 to 81
This is the change when changing to -1, from 5i-4 to 81
The change in ΔS1. , the predicted value S
Find i'.

As described above, the difference discrimination circuit 10. Predicted value circuit 11.
An interpolated digital signal is generated by the switch 12, and the operation for obtaining this interpolated digital signal will be explained in more detail with reference to FIG.

FIG. 2 shows each sample value of the reproduced digital signal input to the difference discrimination circuit 1o, where a shows the case where there is no error, and b shows the case where an error occurs in sample S2 and becomes 82'. 82' indicates a predicted value generated from So and 81.

Difference ΔS between a certain sample S2 of the audio signal and the predicted value 82'
is very small due to the correlation of the audio signals when there are no errors, as shown in FIG. 2a. However, when an error occurs, this difference ΔS is large as shown in FIG. Therefore, if this difference ΔS is larger than the above-mentioned X, it is regarded as an error and the sample 82' is replaced with the predicted value 82', thereby performing isometric interpolation. As described above, the difference ΔS is limited to X or less. If X is too small, there is a high probability that there is an error even if there is no error, and if it is too large, the interference as a click sound will become large, so take these into consideration and set it to an optimal value.

On the other hand, the error discrimination circuit 9 inputs the error detection flag signals of the error detection and correction circuit 8, counts the number of errors in a certain period T, and calculates the counted value n. It is determined whether nh is greater than or equal to a predetermined value nh or less than a predetermined value nh, and a control signal corresponding to the result of this determination is output to the switch 13. The switch 13 receives this count value n. When is greater than or equal to a predetermined value nh, it is assumed that there are many false detections and an interpolated digital signal is output; when it is less than a predetermined value, it is assumed that there are few false detections and a reproduced digital signal is output. give,
I can do it. The DA converter 14 performs digital-to-analog conversion to obtain a reproduction signal, which is output to the reproduction signal output terminal 16.

Note that nh is set in consideration of the probability of occurrence of false detection, but since the probability of occurrence of false detection depends on the correction method, recording format, etc., it is set to an optimal value experimentally.

The above is a detailed explanation of the present invention. In this embodiment, an audio signal is used as a recording signal, but it is also possible to use a signal (for example, a video signal) in which adjacent sample values have a high correlation.

Effects of the Invention According to the present invention, it is possible to improve the quality deterioration of reproduced signals due to erroneous detection of errors, and in particular, it is possible to reduce the occurrence of click sounds when used for recording and reproducing audio signals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the digital recording/reproducing apparatus of the present invention, and FIG. 2 is an explanatory diagram for explaining part of the principle of the present invention. 1...recording signal input terminal, 2...sample hold circuit, 3...AD converter, 4...
...Error detection/correction code signal generation circuit, 6...
...recording system processing circuit, 6...recording and reproducing system, 7.
...Reproduction system processing circuit, 8...Error detection and correction circuit, 9...Error discrimination circuit, 1゜11...
...Predicted value circuit, 12.13...Switch,
14...DA converter, 16... Playback signal output terminal.

Claims (1)

[Claims] a first means for sampling an analog signal at a constant period and converting each sample value into an analog-to-digital signal to obtain a digital signal; a second means for generating an error detection/correction code signal from this digital signal; , a third means for recording and reproducing the error detection/correction code signal on a recording medium, and a fourth means for detecting and correcting errors in the digital signal using the error detection/correction code signal during reproduction to obtain a reproduced digital signal. and a fifth means for counting the number of errors occurring for a certain period of time, determining whether this counted value is greater than or equal to a predetermined number, or less than a predetermined number, and generating a control signal according to the determination result; Only when the difference between a certain sample value of the reproduced digital signal and a predicted value generated from previous sample values is greater than or equal to a predetermined value, this predicted value is output instead of that sample value to output an interpolated digital signal. and a seventh means that is controlled by the control signal and outputs the interpolated digital signal when the counted value is greater than or equal to a predetermined number, and outputs the reproduced digital signal when it is less than a predetermined number to obtain an output digital signal. A digital recording/reproducing apparatus comprising: and eighth means for converting the output digital signal from digital to analog to obtain a reproduced analog signal.