JPH01274259A - Universal interface controller - Google Patents

Abstract

PURPOSE:To attach a sufficient diagnostic function on an interface controller which employs an LSI on the market with insufficient diagnostic function by constituting a closed loop consisting of a data buffer part, an interface control part, and an internal bus. CONSTITUTION:A universal interface controller is provided with a processor part 11, the data buffer part 12, and the interface control part 13 in its inside, and those parts are connected so as to constitute the closed loop by the internal buses (101-105). Internal diagnosis is performed by transferring data to the closed loop, fetching the data in the processor part 11, the data buffer part 12, and the interface control part 13, and comparing the data with sent data.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a general-purpose interface control device, and in particular:
Regarding the diagnostic method inside the device.

Prior Art Conventionally, general-purpose interface control devices of this type have been designed, inter alia, with
In order to reduce costs by adopting a commercially available LSI for the interface control section, it does not have sufficient diagnostic functions.

Problems to be Solved by the Invention The above-mentioned conventional general-purpose interface control device had a drawback in that sufficient internal diagnosis could not be performed in terms of cost unless diagnosis was performed by connecting the other device.

The present invention has been made in order to eliminate the above-mentioned drawbacks inherent in the conventional technology, and therefore, it is an object of the present invention to provide a sufficient solution to an interface control device employing a commercially available LSI, which is normally difficult to fully diagnose. The objective is to provide a diagnostic function.

Means for Solving the Problems In order to achieve the above object, a general-purpose interface control device according to the present invention includes a processor section, a data buffer section, and an interface control section.

The processor section, the data buffer section, and the interface control section are connected to an internal bus, and the data buffer section and the interface control section also have a connection bus, and a closed loop is established between the internal bus, the interface control section, the data buffer section, and the internal bus. It has a configuration that allows internal diagnosis to be easily performed by configuring and transferring data.

Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

Referring to FIG. 1, 11 indicates a processor section, and the processor section 11 is connected to the internal path 101 at +02. 12 is a data buffer section, and a path 103
13 is an interface control unit, which is connected to the internal bus +01 via a path 104. The data buffer unit 12 and the interface control unit 13 are connected by a path 105, and the interface control unit 13 is further connected to an external interface by a path 106.

Next, the operation of this embodiment will be explained. In the case of this embodiment, data for normal input transfer is transmitted from the external interface 106 connected to the path 106 via the interface control unit 13, through the path 105, buffered in the data buffer unit 12, and transferred to the internal bus through the path 103. +01
will be forwarded to. On the other hand, data for output transfer follows the reverse course of the input transfer, from internal bus +01 to path +03.
The data is buffered in the data buffer section 12 through the path 105, and sent to the external interface connected to the path 106 via the interface control section 13.

When diagnosing this device, first, the processor section 11
By starting the 0 diagnostic mode, for example, two specific registers in the interface control unit 13 are connected to the path +05 to the data buffer unit 12, and one of the registers receives data from the interface control unit 13. Data is sent to the buffer section 12 (this will be referred to as register A). The other side receives data from the data buffer section 12 (this will be referred to as register B), and then transfers input from the processor section 11 to the interface control section 13 and data buffer section 12 (from the external interface). (direction in which this device receives data) control is activated, and a specific pattern of data is set in register A of the interface control unit 13 via the internal bus 101. The set data is sent to the data buffer section 12 by the input transfer control operation, and further from the data buffer section 12 to the internal bus 10! By sending the data to the processor section 12, the data can be taken into the processor section 12 again. The processor section 12 can determine the quality of all circuits related to the pass bus and input transfer control operation by comparing the fetched data and the data set in the register A.

Similarly, from the processor section 12 to the interface control section 1
3 and the data buffer unit 12, and starts output transfer (direction of transmitting data from the device to the external interface) control, and sends a specific pattern of data to the data buffer unit 12 via the internal bus. The sent data is transferred to the interface control unit 13 by the output transfer control operation.
and is set in its internal register B. Thereafter, the processor unit 11 reads the contents of register B via the internal bus 101 and compares it with the data sent to the data buffer unit 12 to determine the quality of all circuits related to the pass path and output transfer control operation. I can do it.

As described in detail, according to the present invention, by configuring a closed loop with a data buffer section, an interface control section, and an internal bus, commercially available LS, which is normally difficult to fully diagnose, can be
The effect is that an interface control device employing I can be provided with a sufficient diagnostic function.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 11... Processor section, 12... Data buffer section, 13... Interface control section, 101... Internal bus, 102-106... Connection path Patent applicant NEC Corporation Agent Patent attorney Yutabe Kumagai

Claims (1)

[Claims] It has a processor section, a data buffer section, and an interface control section inside, the processor section, the data buffer section, and the interface control section are connected to an internal bus, and the data buffer section and the interface control section also have a connection bus, and the internal A general-purpose interface control device characterized in that internal diagnosis can be performed by configuring a closed loop between a bus, an interface control unit, a data buffer unit, and an internal bus to transfer data.