JPS6278660A - Data transfer device - Google Patents

Abstract

PURPOSE:To perform a data transfer test with test data having different data patterns by using a means which produces automatically the test data used for the data transfer test and transfers this data to a logical device at the remote side. CONSTITUTION:A test mode is set to a mode register 18 when a data transfer test is performed. Therefore a selecting circuit 15 selects the test data 106 since a selection signal 108 instructs a test mode. The data 106 is sent out as an input signal 110. Here the contents of a data counting register 16 are subtracted one by one by a subtrahend counter 17 every time the data 106 is transmitted by a piece. Thus the register 16 transmits continuously the different data 106 until the contents of the register 16 are equal to 0. Then the data 106 is transferred to a main storage (not shown here) as write signals via the circuit 15, an input buffer 11 and a data register 12.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data transfer device, and particularly to a data transfer device capable of testing data transfer.

[Conventional technology]

2. Description of the Related Art Data transfer devices are generally used to interconnect a large number of logical devices that make up a data processing system and to transfer data. Such a data transfer device mainly connects a main storage device and an input/output device to transfer data between them.

Conventionally, the data transfer test for the data transfer device described above involves storing test data in advance in a data register owned by the data transfer device, and then transmitting and receiving the test data to and from the opposing logic device to check the transfer operation. are doing. Furthermore, if it is necessary to perform a transfer test using a large amount of test data, a data register for testing may be provided.

However, in the above-mentioned transfer test, the number of test data is limited, and the data patterns are also limited, so it is difficult to test combinations of various data patterns and send and receive data using a large amount of test data. The disadvantage is that it is not possible to conduct individual confirmation tests.

[Problem that the invention seeks to solve]

The problem to be solved by the present invention, in other words, the purpose of the present invention is to solve the above-mentioned drawbacks by providing a means for automatically generating test data used in a data transfer test and transferring it to a partner logical device. An object of the present invention is to provide a data transfer device with improved performance.

[Means for solving problems]

The data transfer device of the present invention is a data transfer device that connects and transfers data between a plurality of logical devices such as a main storage device, an arithmetic unit, an input/output device, etc. a first means for instructing to test data transfer between the logical device and the data transfer device; a first means for storing the number of data to be transferred between the logical device and the data transfer device; and a third means for transferring the number of data held by the second means to the logic device as test data for the test. Ru.

〔Example〕

Hereinafter, a data transfer device according to the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, a data transfer device 10 receives a read signal 100 from a main storage device (not shown) and sends it as a transfer signal 103 to an input/output device (not shown). Conversely, a transfer signal 103 sent from the input/output device is sent to the main storage device as a write signal 102.

The input buffer 7 inputs the above-mentioned read signal 1004 or an input signal 110 from the selection circuit 15 (described later), and sends out 7n as transfer data 101.

The data register 12 inputs the above transfer data 101 and sends it out as a write signal 102.

The output register 13 inputs the above write signal 102,
Transfer signal 103 is sent out via driver D. Further, the input register 14 receives the above transfer signal 103 via the receiver R, and sends out input data 104.

The data count register 16 inputs and stores control data 105 or subtraction data 107 sent from an input/output processing device (not shown), and sends out test data 106. Also, the decrement counter 17 is set to the test data 1 above.
Input 06 and subtract it by 51″ to get subtraction data 1
Send as 07.

Mode register 18 sends out selection signal 108 and control signal 109 according to control data 105 described above.

The selection circuit 15 selects input data 104 and test data 1.
06 and input data 10 according to the selection signal 108.
4 or the test data 106 is sent out as the input signal 110.

The control circuit 19 inputs the control signal 109 and controls the flow of data throughout the data transfer device 10 .

5. Next, the operation of the data transfer device configured as described above will be explained.

In normal operation, six operation modes are set in the mode register 18 by the control data 105, and the number of transfer data 101 is set in the data count register 16. Each time one piece of transfer data 101 is transferred, the contents of the data count register 16 are decremented by 1.
The data transfer operation is subtracted by ``1#'' through 7 and when nl becomes O'', the data transfer operation is completed. Note that in data transfer from the main memory device to the input/output device, the read signal 100 is sent to the input buffer 11, data register 12, output register 1.
3 and driver D as a transfer signal 103, and in data transfer from the input/output device to the main memory, the transfer signal 103 is sent to the receiver R1 manual register 14, selection circuit 15, input buffer 11, and data register 12. is sent as a write signal 102 via n
Ru. At this time, since the selection signal 108 indicates the 1 operation mode, the selection circuit 15 sends out the input data 1046 as the input signal 110.

In the data transfer test, the mode register 18 is set to “
"Test mode" is set. Therefore, selection signal 1
Since 08 indicates the "test mode", the selection circuit 15 selects the test data 106 and inputs it to the input signal 1.
Send as 10.

At this time, the contents of the data count register 16 are decremented by @1# via the decrement counter 17 every time one test data 106 is sent out, so the data count register 16 can be used for different tests until the contents become '0'. Continuously send out data 106.Test data 10 above.
6 is transferred to the main memory device as a write signal 102 via the selection circuit 15, input buffer 11 and data register 12.

〔Effect of the invention〕

As explained in detail above, according to the data transfer capacity of the present invention, it is possible to easily generate test data for performing a data transfer test. The effect is that it can be implemented using data.

Furthermore, since there is no need to provide a data register for data transfer testing, there is also the effect that maintenance of the data transfer device is facilitated and its reliability is improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a data transfer device according to the present invention.

Claims (1)

[Scope of Claims] A data transfer device that connects and transfers data between a plurality of logical devices such as a main storage device, an arithmetic unit, an input/output device, etc., wherein the logical device and the data transfer device a first means for instructing to test data transfer between the logical device and the data transfer device; storing the number of data to be transferred between the logical device and the data transfer device; A data transfer characterized by comprising: a second means for counting; and a third means for transferring the number of data held by the second means to the logical device as test data for the test. Device.