JPH01270483A - Time division channel switching memory - Google Patents

Abstract

PURPOSE:To curtail an external circuit and to easily set a tone control timing by building in the tone information to digitally code respective types of audible sound signals. CONSTITUTION:Input highway data 1 are written to the address of a call memory 2 designated by a WRITE counter 16, the address of the memory 2 designated a control memory 13 and outputted to an arbitrary highway. The tone information to digitally code respective types of the audible sound signal is stored into a tone memory 14. The contents of the memory 14 of an address designated by a tone control memory 15 are read. A selector 18 switches and outputs the tone signal and the call signal in accordance with the output from the memory 15 to a signal line 10. The writing of the control memory 13 and the tone control memory 15 is executed by using an READ counter 17 by a processor 19 to control the whole of an exchange.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a time division channel switch memory for switching time division multiplexed data in a digital exchange.

[Conventional technology]

Generally, in a digital exchange, digital signals digitally encoded by PCM or the like are time-division multiplexed and input to a communication path (hereinafter referred to as a highway).

Furthermore, the input signal is switched within the digital exchange and transmitted to any highway on the output side.

The time division channel switch memory is in charge of this switching.

A conventional example of a time-division channel switch memory will be explained using FIG.

The time-division channel switch memory mainly includes a communication memory 2 that stores voice information (input highway data 1) and a control memory that controls the communication path memory in order to transmit the data stored in the communication memory 2 to an arbitrary output highway. It consists of First, the write address 20 of the call memory is sequentially designated by the WRITE counter 16, and input highway data 1 is written to the call memory.

On the other hand, reading from the communication memory, that is, reading to an arbitrary highway, is performed according to the address output from the control memory.

Here, addressing to the control memory 13 is performed by the READ counter 17.

Also, writing of the call memory read address 5 to the control memory 13 is performed by the processor 19 that controls the entire exchange.
This is done by

Next, the audio data 3 outputted from the time-division channel switch memory is sent to the selector circuit 18 together with the tone data 8 outputted from the tone generation circuit configured as an external circuit.
is input into the voice data and tone data switching signal 2.
3 controls the selector circuit 18 and outputs audio data or tone data as the output highway data 11.

As described above, the time-division call path switch memory is call memory 2.
Consisting of two memory circuits: and control memory 13,
A circuit for controlling tone information and the like is configured by an external circuit.

[Problem to be solved by the invention]

The conventional time-division call path switch memory described above is composed only of a call memory and a control memory, so as shown in FIG. The control circuit for tone data and the selection circuit for call data and tone data must be configured externally, which increases the number of external circuits and makes it difficult to set tone-related timings.

[Problem to be solved by the invention]

The present invention provides a time-division channel switch memory for switching time-division multiplexed data in a digital exchange, in addition to a communication memory that stores digitally encoded voice information and a control memory circuit that specifies a read address of the communication memory. A tone memory circuit stores tone information obtained by digitally encoding various audible sound signals such as dial tone, busy tone, and hold tone, and the type of tone information and selection information of voice information and tone information are stored at the write address by processor control. It is characterized by a built-in tone control memory circuit that specifies tone information in the tone memory circuit by writing.

C Example] Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 shows a time division communication path switch according to the present invention, which is composed of a communication memory z, a control memory 13, a tone memory 14, a tone control memory 15, a WRITE counter 16, a READ counter 17, and a selector circuit 18. There is.

First, the operations of the call memory and control memory, and the tone memory and tone control memory will be explained using FIG. In FIG. 2, addresses for writing and reading input highway data (audio information) 1 into the communication memory 2 are controlled in accordance with each time slot t1 to t. Since write addresses need only be given sequentially from #1 to #N corresponding to time slots t1 to t1, write address control is performed using a WRITE counter 16 that increases by 1° for each time slot. On the other hand, the read address number 111 is a time slot) 1. ．． 1. . . . There is no relation to the order of t, and there is no regularity, so it is necessary to correspond the read addresses according to the time slots t1 to t. The control memory 13 is used for this purpose, and the read address of the call memory can be set arbitrarily.

The control memory 13 stores time slots t1 to t, respectively.
, an address from which a signal should be read from the call memory 2 is written.

control memory 1 in the read cycle of time slot t1.
Data 2', which is the read address of call memory 2, is read from address $1 of 3, and this address ``2''
Data B is read from address #2 of the call memory 2 corresponding to . In addition, in the read cycle of the next time slot )tz, data "1°, which is the read address of the call memory 2, is read from the address $2 of the control memory 13, and 7 of the call memory 2 corresponding to this address °1' is read. Data A is read from address #1.

Thereafter, the control is performed in the same manner sequentially up to t, and then the control is repeated again from tl.

On the other hand, address control of the control memory 13 uses a READ counter to serially increment the address in accordance with time slots t1 to t. Further, writing of the call memory read address to the control memory 13 is performed by a processor that controls the entire exchange.

The operations of the tone memory and tone control memory are also similar to the operations of the call memory and control memory described above.

Regarding this time-division call path switch memory, (1) the operation when the output data of the call memory is read out as output highway data, and (2)) the operation when the output data of the -n memory is read out as output highway data. I will explain about one.

(1) Operation when output data of the call memory is read out as output highway data.

Both the output data of the call memory and the output data of the tone memory are input to the selector circuit 18, and one signal line of the output data of the tone control memory (selector switching signal 10)
When the 1st signal line (selector switching signal 10) of the output data of the tone control memory 15, which controls the switching of the selector circuit 18, is L', the output data of the call memory is selected and is output externally as the output highway data 11. Output to.

(2) Operation when the output data of the tone memory is read out as the output highway data 11.

This operation is the same as when the output data of the call memory is selected, and when the 1st signal line of the output data of the tone control memory (selector switching signal 10) is H', the output data of the tone memory is selected. and is outputted to the outside as output highway data 11. For the selector switching signal, selector circuit control information is stored at a specific address in the tone control memory 15, and the processor that controls the entire system stores 'H' data at this address when tone information is required. It is controlled to keep it set. Through this control, a selector switching signal is sent to the corresponding output bus of the tone control memory 15, and the selector circuit 18 is switched.

The above is a description of the time-division channel switch memory of the present invention.

〔Effect of the invention〕

As explained above, the time-division call path switch memory of the present invention incorporates a tone memory and a tone control memory in addition to a call memory and a control memory, thereby making it possible to eliminate the need for a tone generation circuit including a counter etc. in an external circuit. , there is also the effect that there is no need to consider the timing of tone control, etc.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the present invention, FIG. 2 shows an example of controlling a call memory using a general control memory, and FIG. 3 shows a configuration diagram of a general time-division call path switch memory. l... Input highway data, 2...
Call memory, 3...Output data of call memory,
4... WRIT of call memory and tone memory
E address, 5... Control memory output data (
Call memory read address), 6... Control memory and tone control memory read address, 7.
...Tone control memory output data (tone memory read address), 8...Tone memory output data (tone data), 9...Control memory and tone control memory Write address, 10・
Mountain: Tone control memory output data (selector switching signal), 11: Output highway data,
12...Tone input data, 13...
Control memory, 14...Tone memory, 15...
...Tone control memory, 16...WRIT
E counter, 17...1 READ counter, 1
8... Selector circuit, 19... Processor, 20... Call memory address, 2
1...Tone control memory read address,
22...Tone memory write address, 2
3. Group/selector switching signal. Agent Patent Attorney Uchihara Onsho 1 drawing 2 drawings 3 times a month

Claims (1)

[Claims] In addition to the call memory that stores digitally encoded voice information, etc. in the time-division call path switch memory that switches time-division multiplexed data in the digital exchange, and the control memory circuit that specifies the read address of the call memory, there is also a dial tone, A tone memory circuit stores tone information obtained by digitally encoding various audible sound signals such as busy tone and hold tone, and the type of tone information and selection information of voice information and tone information are written to the write address under processor control. A time-division channel switch memory characterized by incorporating a tone control memory circuit for specifying tone information in the tone memory circuit.