JPH0126544B2 - - Google Patents
Info
- Publication number
- JPH0126544B2 JPH0126544B2 JP57147212A JP14721282A JPH0126544B2 JP H0126544 B2 JPH0126544 B2 JP H0126544B2 JP 57147212 A JP57147212 A JP 57147212A JP 14721282 A JP14721282 A JP 14721282A JP H0126544 B2 JPH0126544 B2 JP H0126544B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- chip carrier
- sheet
- wiring board
- multilayer wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14721282A JPS5936949A (ja) | 1982-08-25 | 1982-08-25 | マルチチツプパツケ−ジ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14721282A JPS5936949A (ja) | 1982-08-25 | 1982-08-25 | マルチチツプパツケ−ジ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5936949A JPS5936949A (ja) | 1984-02-29 |
JPH0126544B2 true JPH0126544B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1989-05-24 |
Family
ID=15425100
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14721282A Granted JPS5936949A (ja) | 1982-08-25 | 1982-08-25 | マルチチツプパツケ−ジ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5936949A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5070014B2 (ja) * | 2007-11-21 | 2012-11-07 | 株式会社豊田自動織機 | 放熱装置 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5248364U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1975-10-02 | 1977-04-06 | ||
JPS57126154A (en) * | 1981-01-30 | 1982-08-05 | Nec Corp | Lsi package |
-
1982
- 1982-08-25 JP JP14721282A patent/JPS5936949A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5936949A (ja) | 1984-02-29 |
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