JPH01253045A - Logical analyzing circuit - Google Patents

Abstract

PURPOSE:To trace all the history of the execution of a rewrite instruction for a storage device by reading and comparing an instruction address written in a storage means with a designed value and detecting a bug of a program when the instruction address is rewritten. CONSTITUTION:The storage means 3 is provided which has the same capacity as that of the storage device of an electronic circuit 2 where a microprocessor 1 is mounted. Then when the microprocessor 1 executes an instruction, its instruction address is written in the storage means 3 and when this instruction address is rewritten, the instruction address is read out and compared with a designed value to detect the bug of the program. Therefore, instructions of the microprocessor are stored in the storage means. Consequently, all the history of the rewrite instruction execution for the storage device of the microprocessor 1 can be traced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a logic analysis circuit used when developing software for an electronic circuit equipped with a microprocessor.

Conventional Technology Traditionally, when developing software for an electronic circuit equipped with a microprocessor, the operations before and after the trigger conditions are traced by storing and reading them in the microprocessor's memory device. The cause of bugs in the program was analyzed based on the execution process of the program.

Problems to be Solved by the Invention However, in the conventional method for analyzing the causes of bugs in programs, the causes of bugs in programs are stored in the microprocessor's storage device. The problem is that trace information can only be obtained within the capacity of .

Furthermore, even in the range where trace information can be obtained, if the contents of the storage device have been destroyed by other program processing such as interrupt processing, there is a problem in that bugs cannot be analyzed.

SUMMARY OF THE INVENTION In view of the above-mentioned conventional problems, it is an object of the present invention to provide a logic analysis circuit that can trace the entire history of execution of rewriting instructions for a storage device of a microprocessor.

Means for Solving the Problems In order to achieve the above object, the present invention provides a storage means having the same capacity as the storage device of an electronic circuit equipped with a microprocessor, and when the microprocessor executes an instruction, the instruction address is stored. is written in this storage means, and when this instruction address is rewritten, the instruction address is read out and compared with a design value to detect a bug in the program.

According to the present invention, with the above-described configuration, the instructions of the microprocessor are stored one by one in the storage means, so that the entire history of execution of rewriting instructions for the storage device of the microprocessor can be traced.

EXAMPLES Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a logic analysis circuit according to the present invention, FIG. 2 is an explanatory diagram showing an example of a program to be analyzed for the electronic circuit of FIG. 1, and FIG. FIG. 2 is an explanatory diagram showing the storage contents of the storage device of the electronic circuit shown in FIG. 1;

In FIG. 1, 1 is a microprocessor (in-circuit emulator) that performs devanogging of an electronic circuit 2 equipped with a microprocessor to be analyzed.
The microprocessor 1 and the electronic circuit 2 are connected to a data bus 10
and is connected via an address bus 11.

The CPU (not shown) of the electronic circuit 2 selects each module's interrupt processing program 15, wireless data processing program 16, wired data processing program 17, and other processing programs 18, as shown in FIG. 2 as an example. The wireless data processing program 16, the wired data processing program 17, and other processing programs 18 are allotted processing times by the real-time monitor 14.

Returning to FIG. 1, reference numeral 3 denotes a storage element having a storage area of the same capacity as the storage device (not shown) of the microprocessor of the electronic circuit 2.

As shown in FIG. 3, the storage device of the electronic circuit 2 includes a buffer area 19 for storing various variables, and a queue area addition for use while being freely occupied and returned by the program tasks shown in FIG. It also has a stack area 21 for holding the previous state in case of interrupt processing or the like.

Data in the stack area 21 and queue area are stored in the CP
When U selectively executes each program 15 to 18, it is rewritten.

A latch 4 stores the address of an instruction executed by the microprocessor 1 by launching a signal on the address bus 11 in synchronization with the operation code fetch signal S1 from the microprocessor 1, and outputs the address as data in the storage element 3. , 5 selectively switch the data from the data bus 10 or the instruction address from the address bus 11;
A bus switching circuit 6 that outputs address information to the storage element 3 is a decoder that decodes address information from the bus switching circuit 5 and outputs it to the storage element 3.

7 is a decoder for decoding the address information on the address bus 11; 8 is a buffer for temporarily storing the instruction address read out from the storage element 3; 9 is for storing the data on the data bus IO; This is a latch that outputs to the switching circuit 5.

Next, the operation of the above embodiment will be explained.

In FIG. 1, first, the latch 4 latches the signal on the address bus 11 in synchronization with the operation code fetch signal S1 from the microprocessor 1, thereby storing the instruction address executed by the microprocessor 1.

Next, in synchronization with the write signal W from the microprocessor 1, the instruction address stored in the latch 4 is written into the storage element 3.

If the data in the memory element 3 is rewritten during this process,
The microprocessor 1 interrupts the execution of the program, reads out the instruction address written in the memory element 3 using the read signal R, and reads it via the buffer 9.

Therefore, this read instruction address and storage element 3
By comparing the address values of , it is possible to determine whether the executed instruction address has been written to the correct address area of the storage element 3, and the cause of the software bug can be analyzed.

As described in detail, the present invention provides a storage means having the same capacity as a storage device of an electronic circuit equipped with a microprocessor,
When the microprocessor executes an instruction, the instruction address is written to this storage means, and when this instruction address is rewritten, the instruction address is read out and compared with the design value to detect bugs in the program. Therefore, the instructions of the microprocessor are stored one by one in the storage means, and therefore, the entire history of execution of rewriting instructions for the storage device of the microprocessor can be traced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a logic analysis circuit according to the present invention, FIG. 2 is an explanatory diagram showing an example of a program to be analyzed for the electronic circuit of FIG. 1, and FIG. FIG. 2 is an explanatory diagram showing the storage contents of the storage device of the electronic circuit shown in FIG. 1; ■...Microprocessor (insert emulator), 2...Electronic circuit (microprocessor to be analyzed), 3...Storage element. Name of agent: Patent attorney Toshio Nakao and 1 other person
1 Figure 2 Figure 3

Claims (1)

[Claims] A storage means having the same capacity as a writing device for an electronic circuit on which a microprocessor is mounted; when the microprocessor executes an instruction, an instruction address thereof is written in the storage means, and the instruction address written in the storage means is written. A logic analysis circuit having means for detecting a bug in a program by reading out the instruction address and comparing it with a design value when the instruction address is changed.