JPH01248543A - Chip carrier - Google Patents
Chip carrierInfo
- Publication number
- JPH01248543A JPH01248543A JP63077140A JP7714088A JPH01248543A JP H01248543 A JPH01248543 A JP H01248543A JP 63077140 A JP63077140 A JP 63077140A JP 7714088 A JP7714088 A JP 7714088A JP H01248543 A JPH01248543 A JP H01248543A
- Authority
- JP
- Japan
- Prior art keywords
- cap
- tab
- good thermal
- adhesive
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002184 metal Substances 0.000 claims abstract description 9
- 238000001816 cooling Methods 0.000 claims description 7
- 239000000853 adhesive Substances 0.000 abstract description 11
- 230000001070 adhesive effect Effects 0.000 abstract description 11
- 239000004593 Epoxy Substances 0.000 abstract description 6
- 239000011248 coating agent Substances 0.000 abstract description 4
- 238000000576 coating method Methods 0.000 abstract description 4
- 239000004642 Polyimide Substances 0.000 abstract description 3
- 239000011521 glass Substances 0.000 abstract description 3
- 229920001721 polyimide Polymers 0.000 abstract description 3
- 230000017525 heat dissipation Effects 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、電子装置等に使用される配線基板にICを実
装するために用いるチップキャリアに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a chip carrier used for mounting an IC on a wiring board used in an electronic device or the like.
従来、この種のチップキャリアは、ICのダイとキャッ
プとの接着につかう接着剤に放熱性を良くするため導電
性の接着剤(例えばAg入りエポキシ)を使うことが多
く、その場合、金属製のキャップを使うと、ICと冷却
モジュールが絶縁されていなかった(例えばU、S、P
atent4652970.あるいは、特許比1[59
−69759) 。Conventionally, this type of chip carrier often uses a conductive adhesive (for example, Ag-containing epoxy) to improve heat dissipation as the adhesive used to bond the IC die and cap. When using the cap, the IC and cooling module were not insulated (for example, U, S, P
agent4652970. Or, patent ratio 1 [59
-69759).
上述した従来のチップキャリアは金属製のキャップを使
用するとICと冷却モジュールが電気的に絶縁されてい
ないため、ICと冷却モジュール等が電気的にショート
する危険がある。また、絶縁性材料(例えばSiC,A
N)のキャップを使用すると、絶縁性材料はもろい
ため、厚くする必要があり、放熱性が悪くなるという欠
点がある。When the above-mentioned conventional chip carrier uses a metal cap, there is a risk of electrical short-circuiting between the IC and the cooling module because the IC and the cooling module are not electrically insulated. Also, insulating materials (e.g. SiC, A
If a cap of N) is used, since the insulating material is fragile, it needs to be thick, which has the disadvantage of poor heat dissipation.
本発明のチップキャリアは、配線基板と該配線基板にフ
ェイスダウンで実装されるTAB ICのダイに接着
され、かつ、該配線基板とで該TAB ICを密封す
る熱伝導率の良好な金属(例えばCu / W )から
できたキャップとからなり、冷却モジュールが接続され
る該キャップの上面に無機絶縁ペースト(例えばガラス
ペイント)あるいは、有機絶縁ペースト(例えば、ポリ
イミド、エポキシ)により絶縁コートが施されている。The chip carrier of the present invention is made of a metal having good thermal conductivity (e.g. The cap is made of Cu/W), and the upper surface of the cap to which the cooling module is connected is coated with an insulating coating using an inorganic insulating paste (e.g., glass paint) or an organic insulating paste (e.g., polyimide, epoxy). There is.
本発明のチップキャリアは、配線基板と、該配線基板に
フェイスダウンで実装されるTAB ICと、該TA
B ICのダイと接着され、がっ、該配線基板とで該
TAB ICを密封する熱伝導率の良好な金属からで
きたキャップとからなり、該キャップの上面に冷却モジ
ュールが接続されるチップキャリアにおいて、前記キャ
ップ上面に絶縁コートを有することを特徴とするチップ
キャリアであり、前記絶縁コートが、無機絶縁ペースト
を塗布し硬化させて形成されることを特徴とするチップ
キャリアであり、あるいは、前記絶縁コートが、有機絶
縁ペーストを塗布し硬化させて形成されることを特徴と
するチップキャリアである。The chip carrier of the present invention includes a wiring board, a TAB IC mounted face down on the wiring board, and a TAB IC mounted face down on the wiring board.
A chip carrier consisting of a cap made of a metal with good thermal conductivity that is bonded to the B IC die and seals the TAB IC with the wiring board, and a cooling module is connected to the top surface of the cap. The chip carrier is characterized in that it has an insulating coat on the upper surface of the cap, and the insulating coat is formed by applying and curing an inorganic insulating paste, or The chip carrier is characterized in that the insulating coat is formed by applying and curing an organic insulating paste.
〔実施例〕 次に本発明について図面を参照して説明する。〔Example〕 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の模式的な縦断面図である。FIG. 1 is a schematic vertical sectional view of an embodiment of the present invention.
配線基板1は表面にリード用パッド2゜裏面に入出力用
パッド3が形成されており、リード用パッド2と入出力
用パッド3は内部配線4により接続されている。また、
キャップ5は熱伝導率の良好な金属(例えばCu /
W )でできており、上面には、無機絶縁ペースト(例
えばガラスペースト)あるいは、有機絶縁ペースト(例
えばポリイミド、エポキシ)により絶縁コート6が薄く
(10〜30μ)施されいる。TAB IC7は、基
板1の表面にフェイスダウンで実装されTAB IC
7のり−ド8はリード用パヅド2に接続される。TAB
IC7のダイはキャップ5と熱伝導率の良好な接着
剤(例えばAg入りエポキシ)9によって接着される。The wiring board 1 has lead pads 2 on the front surface and input/output pads 3 on the back surface, and the lead pads 2 and the input/output pads 3 are connected by internal wiring 4. Also,
The cap 5 is made of a metal with good thermal conductivity (for example, Cu/
A thin (10 to 30 μm) insulating coat 6 is applied to the top surface using an inorganic insulating paste (eg, glass paste) or an organic insulating paste (eg, polyimide, epoxy). The TAB IC7 is mounted face down on the surface of the board 1.
7 is connected to the lead pad 2. TAB
The IC 7 die is bonded to the cap 5 with an adhesive 9 having good thermal conductivity (for example, Ag-containing epoxy).
次に、キャップ5と基板1が接着剤10により接着され
、TAB IC7は密封される。そして最後にキャッ
プ5上面にヒートシンク11が熱伝導率の良好な接着剤
12(例えばAg入りエポキシ)により接着される。Next, the cap 5 and the substrate 1 are bonded together with an adhesive 10, and the TAB IC 7 is sealed. Finally, a heat sink 11 is bonded to the upper surface of the cap 5 using an adhesive 12 having good thermal conductivity (for example, epoxy containing Ag).
ICが発生する熱は、熱伝導率の良好な接着剤9を通し
て熱伝導率の良好な金属でできたキャップ5に伝わる。The heat generated by the IC is transmitted to the cap 5 made of metal with good thermal conductivity through adhesive 9 with good thermal conductivity.
そして、絶縁コート6はペーストを塗布し硬化させて形
成されるため大変薄く(10〜30μ)形成することが
できる。そのため、熱抵抗を増加させることなく、キャ
ップ5に伝わった熱を熱伝導率の良好な接着剤12を通
してヒートシンク11に伝え放出することができる。ま
た、TAB IC7とヒートシンク11は絶縁コート
6により完全に絶縁されショートすることはない、また
、キャップ5が金属でできているため薄< (10,5
nm以下)作られており、熱の放出が効率よく行なえる
。Since the insulating coat 6 is formed by applying and curing a paste, it can be formed very thinly (10 to 30 μm). Therefore, the heat transmitted to the cap 5 can be transmitted to the heat sink 11 and released through the adhesive 12 having good thermal conductivity without increasing thermal resistance. In addition, the TAB IC 7 and the heat sink 11 are completely insulated by the insulating coat 6 and will not be short-circuited, and since the cap 5 is made of metal, it is thin < (10,5
(nm or less) and can efficiently release heat.
以上説明したように本発明は熱伝導率の良好な金属性の
キャップを使い、キャップ上面に絶縁コートを施すこと
により、TAB ICの発生する熱を効率良く放出す
ることができ、また、TABICと冷却モジュール等の
電気的ショートを防ぐことができる。As explained above, the present invention uses a metal cap with good thermal conductivity and applies an insulating coating to the top surface of the cap, thereby making it possible to efficiently dissipate the heat generated by TAB IC. Electrical short circuits in cooling modules, etc. can be prevented.
第1図は本発明のチップキャリアの一実施例の模式的な
縦断面図、第2図は従来のチップキャリアの模式的な縦
断面図である。
1・・・配線基板、2・・・リード用パッド、3・・・
入出力用パッド、4・・・内部配線、5・・・キャップ
、6・・・絶縁コート、7・・・TAB ICl3・
・・リード、9.10.12・・・接着剤、11・・・
ヒートシンク。FIG. 1 is a schematic vertical cross-sectional view of an embodiment of a chip carrier of the present invention, and FIG. 2 is a schematic vertical cross-sectional view of a conventional chip carrier. 1... Wiring board, 2... Lead pad, 3...
Input/output pad, 4...internal wiring, 5...cap, 6...insulation coat, 7...TAB ICl3・
...Lead, 9.10.12...Adhesive, 11...
heat sink.
Claims (1)
るTABICと、該TABICのダイと接着され、かつ
、該配線基板とで該TABICを密封する熱伝導率の良
好な金属からできたキャップとからなり、該キャップの
上面に冷却モジュールが接続されるチップキャリアにお
いて、前記キャップ上面に絶縁コートを有することを特
徴とするチップキャリア。A wiring board, a TABIC mounted face down on the wiring board, and a cap made of a metal with good thermal conductivity that is bonded to the die of the TABIC and seals the TABIC with the wiring board. A chip carrier having a cooling module connected to the upper surface of the cap, characterized in that the upper surface of the cap has an insulating coat.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63077140A JP2590521B2 (en) | 1988-03-29 | 1988-03-29 | Chip carrier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63077140A JP2590521B2 (en) | 1988-03-29 | 1988-03-29 | Chip carrier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01248543A true JPH01248543A (en) | 1989-10-04 |
JP2590521B2 JP2590521B2 (en) | 1997-03-12 |
Family
ID=13625499
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63077140A Expired - Lifetime JP2590521B2 (en) | 1988-03-29 | 1988-03-29 | Chip carrier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2590521B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03244145A (en) * | 1990-02-22 | 1991-10-30 | Nec Corp | Chip carrier |
US5825625A (en) * | 1996-05-20 | 1998-10-20 | Hewlett-Packard Company | Heat conductive substrate mounted in PC board for transferring heat from IC to heat sink |
US5960535A (en) * | 1997-10-28 | 1999-10-05 | Hewlett-Packard Company | Heat conductive substrate press-mounted in PC board hole for transferring heat from IC to heat sink |
US5966290A (en) * | 1997-09-03 | 1999-10-12 | Internatioinal Business Machines Corporation | Electronic packages and a method to improve thermal performance of electronic packages |
US6911724B1 (en) * | 2001-09-27 | 2005-06-28 | Marvell International Ltd. | Integrated chip package having intermediate substrate with capacitor |
JP2010171030A (en) * | 2008-12-22 | 2010-08-05 | Kaneka Corp | Heat radiating structure |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001008221A1 (en) * | 1999-07-26 | 2001-02-01 | Tdk Corporation | High frequency module |
-
1988
- 1988-03-29 JP JP63077140A patent/JP2590521B2/en not_active Expired - Lifetime
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03244145A (en) * | 1990-02-22 | 1991-10-30 | Nec Corp | Chip carrier |
JP2570880B2 (en) * | 1990-02-22 | 1997-01-16 | 日本電気株式会社 | Chip carrier |
US5825625A (en) * | 1996-05-20 | 1998-10-20 | Hewlett-Packard Company | Heat conductive substrate mounted in PC board for transferring heat from IC to heat sink |
US5966290A (en) * | 1997-09-03 | 1999-10-12 | Internatioinal Business Machines Corporation | Electronic packages and a method to improve thermal performance of electronic packages |
US5960535A (en) * | 1997-10-28 | 1999-10-05 | Hewlett-Packard Company | Heat conductive substrate press-mounted in PC board hole for transferring heat from IC to heat sink |
US6018193A (en) * | 1997-10-28 | 2000-01-25 | Hewlett-Packard Company | Heat conductive substrate press-mounted in PC board hole for transferring heat from IC to heat sink |
US6911724B1 (en) * | 2001-09-27 | 2005-06-28 | Marvell International Ltd. | Integrated chip package having intermediate substrate with capacitor |
US6979894B1 (en) * | 2001-09-27 | 2005-12-27 | Marvell International Ltd. | Integrated chip package having intermediate substrate |
US6995463B1 (en) * | 2001-09-27 | 2006-02-07 | Marvell International Ltd. | Integrated chip package having intermediate substrate and multiple semiconductor chips |
US8525317B1 (en) | 2001-09-27 | 2013-09-03 | Marvell International Ltd. | Integrated chip package having intermediate substrate with capacitor |
JP2010171030A (en) * | 2008-12-22 | 2010-08-05 | Kaneka Corp | Heat radiating structure |
Also Published As
Publication number | Publication date |
---|---|
JP2590521B2 (en) | 1997-03-12 |
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