JPH01248197A - Control method for buzzer sound generation - Google Patents
Control method for buzzer sound generationInfo
- Publication number
- JPH01248197A JPH01248197A JP63074354A JP7435488A JPH01248197A JP H01248197 A JPH01248197 A JP H01248197A JP 63074354 A JP63074354 A JP 63074354A JP 7435488 A JP7435488 A JP 7435488A JP H01248197 A JPH01248197 A JP H01248197A
- Authority
- JP
- Japan
- Prior art keywords
- buzzer sound
- generation
- buzzer
- sound
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 6
- 230000002401 inhibitory effect Effects 0.000 abstract description 2
- 238000005070 sampling Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、ブザー音を発生する装置のブザー音発生制御
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a buzzer sound generation control method for a device that generates a buzzer sound.
従来の装置は、ブザー音発生に関し、その音種に無条件
で発生し、禁止する時は全ての音種を禁止していた。な
お、この種の制御に関連するものとしては、指定された
データの有効・無効を判断し、ソフトウェアで有効台・
無効音の発生を制御するという特開昭６１−１９４５２
８号がある。With regard to the generation of buzzer sounds, conventional devices generate the buzzer sound unconditionally for each type of sound, and when prohibiting the buzzer sound, all types of sounds are prohibited. In addition, related to this type of control, it is possible to determine whether specified data is valid or invalid, and to use software to determine whether the specified data is valid or invalid.
Japanese Patent Application Laid-Open No. 61-19452 for controlling the generation of invalid sounds
There is No. 8.
上記従来の方式では、特定の音種についてのみブザー音
発生禁止とすることは不可能であり、ユーザがブザー音
発生を禁止するためには、ボリュームを操作し全種の音
を発生禁止にしなければならな−かった。In the conventional method described above, it is impossible to prohibit the generation of the buzzer sound only for a specific type of sound, and in order for the user to prohibit the generation of the buzzer sound, the user must operate the volume and prohibit the generation of all types of sounds. It had to be.
また、特開昭６１−１９４５２８に示される方式では、
ブザー音発生に関し必ずソフトウェアが介入しなければ
ならず、例えば障害検出等でハードウェアが単独で発生
させるブザー音の制御等は不可能となる。In addition, in the method shown in Japanese Patent Application Laid-Open No. 61-194528,
Software always has to intervene in generating the buzzer sound, and it is impossible to control the buzzer sound generated by hardware alone when detecting a fault, for example.
本発明の目的は、ソフトウェアの介入なしで特定の音種
のブザー音の発生を制御し得る方法を提供することであ
る。An object of the present invention is to provide a method that can control the generation of a specific type of buzzer sound without software intervention.
上記目的は、ブザー音の音種それぞれに発生を許可・禁
止する回路を設け、ユーザが音種毎に予めブザー音発生
を禁止する設定を行うことにより、達成される。The above object is achieved by providing a circuit for permitting or prohibiting generation of each type of buzzer sound, and by allowing the user to set in advance to prohibit generation of the buzzer sound for each type of sound.
ブザー音は、ｒＯＪと「１」のデジタル信号を発振させ
、これをブザー内のスピーカの振幅として発生させる。The buzzer sound oscillates a digital signal of rOJ and "1", which is generated as the amplitude of the speaker in the buzzer.
本発明では、上記手段により、ブザー音となるデジタル
信号はユーザが設定したブザー音発生条件によって入力
されるｒＯＪまたは「１」のデジタル信号とＡＮＤ演算
され、発生禁止の場合はデジタル信号の発振は停止し、
ブザー音は発生しない。In the present invention, by the above means, the digital signal that becomes the buzzer sound is ANDed with the digital signal of rOJ or "1" that is input according to the buzzer sound generation condition set by the user, and when generation is prohibited, the oscillation of the digital signal is stop,
No buzzer sound is generated.
以下、本発明の一実施例を第１図により説明する。 An embodiment of the present invention will be described below with reference to FIG.
ブザー音を発生させる要因としては、プログラムによる
命令をＣＰＵｌ０が実行した場合とシステム制御部１１
で障害を検出した場合などがあり、これらのブザー音発
生要因はＯＲ回路１３で合成され要因発生によりカウン
タ回路１４をスタートさせる。カウンタ回路１４の出力
が「１」となるとＡＮＤ回路１６はブザー音種を決定す
るＣＬＫＩ５の信号を後段に伝え、このＣＬＫＩ ５は
ＯＲ回路１７を介してブザー１２へ送出されブザー音を
発生する。The causes of the buzzer sound include when the CPU10 executes a program instruction and when the system control unit 11
These buzzer sound generation factors are combined in an OR circuit 13, and the counter circuit 14 is started upon occurrence of the factor. When the output of the counter circuit 14 becomes "1", the AND circuit 16 transmits the CLKI5 signal for determining the type of buzzer sound to the subsequent stage, and this CLKI5 is sent to the buzzer 12 via the OR circuit 17 to generate a buzzer sound.
以上の説明は、ブザー音発生回路の一般的な方式であり
、上記の構成の回路、すなわち第２図で示す回路が従来
の回路である。第２図で示す回路では、前述の問題点で
記した通り、ハードウェアが独自でブザー音を発生させ
る場合、すなわち、システム制御部１１からのブザー音
発生要求を禁止することは不可能である。The above explanation is a general system of a buzzer sound generating circuit, and the circuit having the above configuration, that is, the circuit shown in FIG. 2 is a conventional circuit. In the circuit shown in FIG. 2, as mentioned above in the problem section, if the hardware generates the buzzer sound on its own, it is impossible to prohibit the buzzer sound generation request from the system control unit 11. .
この問題の解決手段として、第１図のブザー音発生禁止
回路２０を追加する。すなわち、ブザー音発生の許可・
禁止する信号を発生するフリップフロップ１８を音種毎
に設け、フリップフロップ１８の出力を前記ＡＮＤ回路
１６に追加する。フリップフロップ１８の設定はユーザ
の初期設定に従いあらかじめＣＰＵｌ０により設定する
、あるいは、外部スイッチの入力をサンプリングして行
う。As a solution to this problem, a buzzer sound generation inhibiting circuit 20 shown in FIG. 1 is added. In other words, permission to generate the buzzer sound
A flip-flop 18 that generates a prohibition signal is provided for each tone type, and the output of the flip-flop 18 is added to the AND circuit 16. The settings of the flip-flop 18 are set in advance by the CPU 10 according to the user's initial settings, or by sampling the input of an external switch.
尚、ＯＲ回路１７は、各音種毎にＣＰＵｌ０゜システム
制御回路１１．ブザー１２に対して並列に設けられるＯ
Ｒ回路１３．カウンタ１４ 、 ＣＬＫＩ５、ブザー音
発生禁止回路２ｏをブザー１２へ出力するものである。Incidentally, the OR circuit 17 connects the CPU10° system control circuit 11. O provided in parallel to the buzzer 12
R circuit 13. It outputs the counter 14, CLKI5, and buzzer sound generation prohibition circuit 2o to the buzzer 12.
音の高低はＣＬＫＩ５の発振周波数で決まり、発音周期
はカウンタ回路１４で設定される。The pitch of the sound is determined by the oscillation frequency of the CLKI 5, and the sound generation period is set by the counter circuit 14.
以上の構成から成るブザー発生禁止回路２０を追加する
ことにより、例えばシステム制御部１１からブザー音発
生要求が出された場合でも、フリップフロップ１８がブ
ザー音発生禁止に設定されていれば、ＡＮＤ回路１６で
条件が成立しないため、ブザー音発生を禁止することが
可能となる。By adding the buzzer generation prohibition circuit 20 having the above configuration, even when a buzzer generation request is issued from the system control unit 11, if the flip-flop 18 is set to prohibit buzzer generation, the AND circuit Since the condition is not satisfied in 16, it becomes possible to prohibit the generation of the buzzer sound.
本発明によれば、簡易な回路追加により従来制御不能で
あったハードウェアが単独で発生するブザー音を含め、
音種毎にユーザが任意にブザー音発生の選択が可能とな
る。According to the present invention, with the addition of a simple circuit, the buzzer sound generated by hardware, which was previously uncontrollable, can be eliminated.
The user can arbitrarily select whether to generate a buzzer sound for each type of sound.
第１図は本発明方法の一実施例が行われるブザー音発生
回路図、第２図は従来例のブザー音発生回路図である。
１０・・・マイクロプロセッサ、１２・・・ブザー、１
３および１７・・ＯＲ回路、１４・・カウンタ回路、１
６・・・ＡＮＤ回路、１８・・フリップフロップ、２０
・・・ブザー音発生禁止回路。FIG. 1 is a buzzer sound generation circuit diagram in which an embodiment of the method of the present invention is carried out, and FIG. 2 is a buzzer sound generation circuit diagram of a conventional example. 10... Microprocessor, 12... Buzzer, 1
3 and 17...OR circuit, 14...counter circuit, 1
6...AND circuit, 18...Flip-flop, 20
...Buzzer sound generation prohibition circuit.
Claims (1)
定の種類の音種それぞれについて、ブザー音発生禁止回
路を有し、音種毎の禁止設定に応じてブザー音の発生を
制御することを特徴とするブザー音発生制御方法。1. A device that generates a buzzer sound is characterized by having a buzzer sound generation prohibition circuit for all types or for each specific type of sound, and controlling the generation of the buzzer sound according to the prohibition setting for each type of sound. A buzzer sound generation control method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63074354A JPH01248197A (en) | 1988-03-30 | 1988-03-30 | Control method for buzzer sound generation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63074354A JPH01248197A (en) | 1988-03-30 | 1988-03-30 | Control method for buzzer sound generation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01248197A true JPH01248197A (en) | 1989-10-03 |
Family
ID=13544704
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63074354A Pending JPH01248197A (en) | 1988-03-30 | 1988-03-30 | Control method for buzzer sound generation |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01248197A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021126741A1 (en) * | 2019-12-18 | 2021-06-24 | Texas Instruments Incorporated | Duty cycle tuning in self-resonant piezo buzzer |
| US11402265B2 (en) | 2019-11-05 | 2022-08-02 | Texas Instruments Incorporated | Apparatus for integrated offset voltage for photodiode current amplifier |
| US11468756B2 (en) | 2020-04-02 | 2022-10-11 | Texas Instruments Incorporated | Integrated circuit for smoke detector having compatibility with multiple power supplies |
-
1988
- 1988-03-30 JP JP63074354A patent/JPH01248197A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11402265B2 (en) | 2019-11-05 | 2022-08-02 | Texas Instruments Incorporated | Apparatus for integrated offset voltage for photodiode current amplifier |
| WO2021126741A1 (en) * | 2019-12-18 | 2021-06-24 | Texas Instruments Incorporated | Duty cycle tuning in self-resonant piezo buzzer |
| US11361644B2 (en) | 2019-12-18 | 2022-06-14 | Texas Instruments Incorporated | Duty cycle tuning in self-resonant piezo buzzer |
| US11468756B2 (en) | 2020-04-02 | 2022-10-11 | Texas Instruments Incorporated | Integrated circuit for smoke detector having compatibility with multiple power supplies |
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