JPH01225148A - Thin film of dielectric and manufacture thereof - Google Patents
Thin film of dielectric and manufacture thereofInfo
- Publication number
- JPH01225148A JPH01225148A JP63049733A JP4973388A JPH01225148A JP H01225148 A JPH01225148 A JP H01225148A JP 63049733 A JP63049733 A JP 63049733A JP 4973388 A JP4973388 A JP 4973388A JP H01225148 A JPH01225148 A JP H01225148A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- film
- metal oxide
- dielectric
- leakage current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims description 9
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229910052751 metal Inorganic materials 0.000 claims abstract description 42
- 239000002184 metal Substances 0.000 claims abstract description 42
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 34
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 33
- 239000003990 capacitor Substances 0.000 claims abstract description 14
- 239000000470 constituent Substances 0.000 claims abstract description 3
- 239000010408 film Substances 0.000 claims description 37
- 239000003989 dielectric material Substances 0.000 claims description 6
- 229910052726 zirconium Inorganic materials 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 229910052735 hafnium Inorganic materials 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 abstract description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 9
- 239000001301 oxygen Substances 0.000 abstract description 9
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 239000010953 base metal Substances 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- 239000011148 porous material Substances 0.000 abstract 1
- 230000005684 electric field Effects 0.000 description 12
- 238000004544 sputter deposition Methods 0.000 description 7
- 238000000137 annealing Methods 0.000 description 6
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 6
- 150000002739 metals Chemical class 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- 239000000370 acceptor Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- VVTSZOCINPYFDP-UHFFFAOYSA-N [O].[Ar] Chemical compound [O].[Ar] VVTSZOCINPYFDP-UHFFFAOYSA-N 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000001447 compensatory effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 210000003127 knee Anatomy 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- -1 metal oxides tantalum oxides Chemical class 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229910052762 osmium Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
（産業上の利用分野）
本発明は、誘電体薄膜及びその製造方法に係り、特に誘
電体として用いる高−電車金属酸化物のリーク電流を大
幅に低減でき、ＶＬＳＩチップ等への搭載に好適なキャ
パシタに適用される。[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a dielectric thin film and a method for manufacturing the same, and in particular, to significantly reduce leakage current of a high-current metal oxide used as a dielectric. It is applied to capacitors that can be reduced and are suitable for mounting on VLSI chips and the like.
（従来の技術）
例えば、ダイナミックＲＡＭ（ｄＲＡＭ）は１個のＭＯ
ＳＦＥＴとキャパシタによってメモリセルが構成され、
このようなメモリセル等を高集積化したＬＳＩが開発さ
れている。このようなＬＳＩチップに搭載される従来の
キャパシタとしては、誘電体として酸化シリコン膜（Ｓ
ｕｎ、膜）を使用した平面キャパシタが広く用いられて
きた。しかし、 ＬＳＩの一層の高集積化に伴なって、
キャパシタは、その面積が縮小化される一方、必要とさ
れる容量は殆んど変っていないため、誘電体であるＳｕ
ｎ、膜の薄膜化だけでこれに対応することは困難になっ
てきていた。(Prior art) For example, dynamic RAM (dRAM) has one MO
A memory cell is configured by an SFET and a capacitor,
LSIs in which such memory cells and the like are highly integrated have been developed. Conventional capacitors mounted on such LSI chips use a silicon oxide film (S
Planar capacitors using un, membranes) have been widely used. However, as LSIs become more highly integrated,
Although the area of capacitors has been reduced, the required capacitance has hardly changed, so the dielectric material Su
It has become difficult to meet this demand simply by making the film thinner.
このため、誘電体として５ｉｎ２膜単体に代えて、これ
にＳｉＯ□膜よりも誘電率の高い窒化シリコン膜（Ｓｉ
２Ｎ３膜）を組合わせたＳｉＯ□膜／Ｓｉ、Ｎ４膜の積
層構造や、Ｓｉｎ、膜／Ｓｉ、Ｎ、膜／Ｓｉｎ、膜の積
層構造のものが現われてきており、さらに１６メガｄＲ
ＡＭのような超高密度集積のＶＬＳＩでは、より一層の
高誘電率を有する誘電体の開発が不可欠になってきてい
る。Therefore, instead of using a single 5in2 film as a dielectric, we used a silicon nitride film (SiO2), which has a higher dielectric constant than the SiO
2N3 film), a stacked structure of SiO□ film/Si, N4 film, and a stacked structure of Sin, film/Si, N, film/Sin, and film are emerging.
In ultra-high-density integrated VLSIs such as AM, it is becoming essential to develop dielectrics with even higher dielectric constants.
そして、このような高誘電率誘電体として、金属酸化物
である酸化タンタルＴａ、 Ｏｓ が最も広く研究開発
が行なわれている６その理由は、Ｔａ２Ｏ。As such high permittivity dielectrics, the metal oxides tantalum oxides Ta and Os are the most widely researched and developed6.The reason for this is Ta2O.
の比誘電率が２５〜３０でＳｉＯ□の６〜８倍、または
Ｓｉ、Ｎ４の３〜４倍であり、従って、同一のキャパシ
タ容量を得るのに必要な膜厚は、その倍率分だけ厚くて
もよいことになるからである。The dielectric constant of is 25 to 30, which is 6 to 8 times that of SiO□, or 3 to 4 times that of Si or N4, and therefore, the film thickness required to obtain the same capacitance is thicker by that multiple. This is because it will be a good thing.
しかしながら、Ｔａ、 Ｏ，はＳｉ、 Ｎ４膜等と比較
するとリーク電流が数桁大きい、これは、高誘電率の金
属酸化物では正規組成からのゆらぎによるものと考えら
れる余剰電子が存在するためである。そこで、 Ｔａ
、０．について、そのリーク電流低減化対策として、酸
素０２を過剰にして酸素欠損密度を減少させたり、窒素
Ｎ２をスパッタ法による成膜中に添加する方法が試みら
れており、その結果には若干の特性改善が見られている
が大幅な改善効果は現れていない。However, the leakage current of Ta, O, is several orders of magnitude larger than that of Si, N4 films, etc. This is because metal oxides with high dielectric constants have surplus electrons that are thought to be due to fluctuations from the normal composition. be. Therefore, Ta
,0. As a measure to reduce the leakage current, attempts have been made to reduce the density of oxygen vacancies by adding too much oxygen 02 or to add nitrogen N2 during film formation by sputtering. Improvements have been seen, but no significant improvement has occurred.
誘電体のリーク電流が大きいと、高誘電率を有していて
もキャパシタに蓄積した電荷の保持機能が劣化して、メ
モリセル等構成用のキャパシタとして十分な機能が得ら
れない。If the leakage current of the dielectric is large, even if the capacitor has a high dielectric constant, its ability to retain the charges accumulated in the capacitor deteriorates, making it impossible to obtain a sufficient function as a capacitor for configuring a memory cell or the like.
（発明が解決しようとする課題）
従来の高誘電率の金属酸化物は、正規組成からのゆらぎ
によるものと考えられる余剰電子の存在のため、リーク
電流が大きく、高誘電率を有していてもキャパシタとし
て十分な機能が得られないという問題点があった。そし
て従来のリーク電流低減化対策では大幅な改善効果は現
われていなかった。このため、高誘電率誘電体である金
属酸化物について、リーク電流低減化のための本質的な
対策が望まれていた。(Problem to be solved by the invention) Conventional metal oxides with a high dielectric constant have a large leakage current and a high dielectric constant due to the presence of surplus electrons, which are thought to be due to fluctuations from the normal composition. However, there was a problem that a sufficient function as a capacitor could not be obtained. Conventional measures to reduce leakage current have not shown any significant improvement effects. For this reason, there has been a desire for essential measures to reduce leakage current with respect to metal oxides, which are high permittivity dielectrics.
上記正規組成よりＴａ成分が過剰になるのを防止する方
法として成膜時に酸素を過剰に導入する方法がある。例
えば、化成スパッタリングにおいて、Ｔａターゲットを
酸素過剰の酸素／アルゴン界囲中でスパッタする事によ
って、形成したＴａ、０．膜のリーク電流をある程度減
少せしめる事が可能である。２５０人のＴａ、０．を酸
素過剰の条件で比抵抗が５ΩｃｍでＰ型（１００）Ｓｉ
上に化成スパッタし、６００℃窒素中６０分のアニール
を行なった場合、０．１■ｌ＋２のキャハシタテ、ｔｏ
−”Ａ流しル（１０−”Ａ／ａＪ）時（ＩＦ）電界強度
は、２．１ニー２，２ＭＶ／ｃｍ、であり、破壊電界は
、５．５〜６．２ＭＶ／ｃｓｉとなる。上部電極は、純
ＡＱである。この特性の一例を第２図（イ）に示す、比
誘電率は、９．０である。 ４ＭｄＲＡＭ〜１６ＭｄＲ
ＡＭで要求されるリーク電流レベルは、〜１０−’Ａ／
ｃｄである。上記特性を １５ｉｎ、に換算して、換
算膜厚及び、換算電界強度を求めると、各々１０８人、
４．８〜５．ＩＭＶ／ｃｍとなり。One way to prevent the Ta component from becoming excessive compared to the normal composition is to introduce an excessive amount of oxygen during film formation. For example, in chemical sputtering, by sputtering a Ta target in an oxygen/argon atmosphere with excess oxygen, Ta, 0. It is possible to reduce the leakage current of the membrane to some extent. 250 Ta, 0. is P-type (100)Si with a specific resistance of 5Ωcm under oxygen-excess conditions.
When chemical sputtering is performed on the top and annealing is performed for 60 minutes in nitrogen at 600°C, the capacity is 0.1 1 + 2, to
-"A current flow (10-"A/aJ) (IF) electric field strength is 2.1 knee 2.2 MV/cm, and the breakdown electric field is 5.5 to 6.2 MV/csi. The top electrode is pure AQ. An example of this characteristic is shown in FIG. 2(a), and the dielectric constant is 9.0. 4MdRAM~16MdR
The leakage current level required for AM is ~10-'A/
It is a CD. Converting the above characteristics to 15 inches and calculating the equivalent film thickness and the equivalent electric field strength, 108 people and 108 people, respectively.
4.8-5. IMV/cm.
Ｓｉｎ、と比ベリーク電流の点で劣る事が明らかである
。ＳｉＯ□では、６〜７ ＭＶ／ａｍが得られている。It is clear that it is inferior to Sin in terms of specific leakage current. For SiO□, 6 to 7 MV/am has been obtained.
又、比誘電率をさらに増加するためには９００℃アニー
ルが有効であるが、９００℃アニールによってリーク電
流はさらに大きくなる。第２図（ロ）に６００℃酸素中
にて６０分のアニールを行なった後、９００℃アルゴン
中で６０分のアニールを行なった場合のリーク電流１−
Ｖ特性を示す。ｔｏ−”Ａ／ａＪ時の電界強度は、 ０
．７ＭＶ／ｃｍである。比誘電率は１５である。従って
５ｉｎ２換算膜厚、及び換算電界は６５人。Furthermore, although 900° C. annealing is effective for further increasing the dielectric constant, the leakage current becomes even larger due to 900° C. annealing. Figure 2 (b) shows the leakage current 1-
Shows V characteristics. The electric field strength at the time of to-”A/aJ is 0
．． It is 7MV/cm. The dielectric constant is 15. Therefore, the 5in2 equivalent film thickness and the equivalent electric field are 65 people.
２．７ＭＶ／ｃｓ＋であり、リーク電界は、ますます低
下する。2.7 MV/cs+, and the leakage electric field decreases more and more.
本発明は、上記従来の問題点に鑑みてなされたもので、
特に誘電体として用いる高誘電率金属酸化物のリーク電
流を大幅に低減でき、 ＶＬＳＩチップ等への搭載に好
適なキャパシタと、その製造方法を提供することを目的
とするものである。The present invention has been made in view of the above-mentioned conventional problems.
In particular, it is an object of the present invention to provide a capacitor that can significantly reduce the leakage current of a high dielectric constant metal oxide used as a dielectric material and is suitable for mounting on a VLSI chip, etc., and a method for manufacturing the same.
（課題を解決するための手段）
本発明は、金属酸化物中膜中にその金属よりもイオン化
状態において正の電荷数が小さい金属元素を添加した誘
電体膜、及びその製造方法であり、特にその添加する金
属元素のイオン化状態における正の電荷数が、母体を構
成する金属より１小さい事を特徴とする。母体金属酸化
物への上記の条件である異種金属の添加は、酸素空孔で
生じたドナーに対してイオン価数の小さい金属はアクセ
プタとなり、半導体と同様な補償効果がある。従って、
ある濃度の異種金属添加は母体金属酸化物の電気伝導率
を最小にする事が可能となる。(Means for Solving the Problems) The present invention relates to a dielectric film in which a metal element having a smaller number of positive charges in an ionized state than the metal is added to a metal oxide intermediate film, and a method for manufacturing the same. It is characterized in that the number of positive charges in the ionized state of the added metal element is 1 smaller than that of the metal constituting the base body. When a different metal is added to the base metal oxide under the above conditions, the metal with a low ionic valence becomes an acceptor for the donor generated by the oxygen vacancy, and has a compensatory effect similar to that of a semiconductor. Therefore,
Addition of a certain concentration of different metals makes it possible to minimize the electrical conductivity of the host metal oxide.
（作 用）
誘電体として用いられる高誘電率の金属酸化物膜中にそ
の構成金属よりイオン化状態における電荷数が小さい異
種金属を添加する事により、母体金属酸化物膜中の酸素
空孔などによって生ずるドナーを異種金属アクセプタで
補償し、金属酸化物膜の電気伝導率を下げる事が可能と
なる。電気伝導率の低下はリーク電流低減化へとつなが
る。従って、小面積・大容量で、かつ、低リーク電流特
性を有し、ＶＬＳＩチップ等の半導体製品に搭載するの
に極めて好適な誘電膜となる。(Function) By adding a different metal with a smaller number of charges in the ionized state than the constituent metals into a metal oxide film with a high dielectric constant used as a dielectric, oxygen vacancies in the base metal oxide film, etc. By compensating for the generated donors with different metal acceptors, it becomes possible to lower the electrical conductivity of the metal oxide film. A decrease in electrical conductivity leads to a reduction in leakage current. Therefore, the dielectric film has a small area, large capacity, and low leakage current characteristics, and is extremely suitable for being mounted on semiconductor products such as VLSI chips.
（実施例）
以下、本発明の誘電体膜及びその製造方法の実施例につ
き１図面を参照して説明する。(Example) Hereinafter, an example of the dielectric film of the present invention and its manufacturing method will be described with reference to one drawing.
本発明の誘電体膜は第１図に示すように、導電物質１上
に、イオン化状態における電荷数が母体金ｌ１ＸＮｔ化
＃２を構成する金属の電荷数より小さい異種金属３を混
入させてなるものである。As shown in FIG. 1, the dielectric film of the present invention includes a conductive material 1 mixed with a different metal 3 whose charge number in an ionized state is smaller than the charge number of the metal constituting the base gold l1XNt #2. It is something.
次に、本発明にかかるの誘電体膜の製造方法の実施例に
つき説明する。Next, an example of the method for manufacturing a dielectric film according to the present invention will be described.
〈実施例１及び２〉
比抵抗が５ΩｃＩＩｌでＰ型（１００）Ｓｉ半導体基板
を第１図の１とする。６−ｎｉｎｅの純度のＴａ中にＴ
ｉをｌａｔ％混入させたターゲットをＤＣマグネトロン
スパッタ装置内にセットし、炭素−水素系汚染のないポ
ンプを用いてＩ Ｘ １０−’Ｐａ以下に排気した後、
酸素と不活性ガス、例えば０．５Ｐａ酸素−アルゴン（
５０：１）雰囲気中にてＰ型（１００）Ｓｉ半導体基板
上にスパッタする。膜厚は、２２０人である。スパッタ
の初期にＳｉ基板に約２０〜３０人の５ｉｎ２が形成さ
れる。以下のＴａ、 Ｏ，の誘電率は５ｉｎＲを含めた
全体的な誘電率とする。Examples 1 and 2 A P-type (100) Si semiconductor substrate with a specific resistance of 5ΩcIIl is designated as 1 in FIG. T in Ta of 6-nine purity
A target mixed with lat% of i was set in a DC magnetron sputtering device, and the target was evacuated to below I x 10-'Pa using a pump free of carbon-hydrogen contamination.
Oxygen and inert gas, e.g. 0.5 Pa oxygen-argon (
Sputtering is performed on a P-type (100) Si semiconductor substrate in a 50:1) atmosphere. The film thickness is 220 people. Approximately 20 to 30 5in2 layers are formed on the Si substrate at the beginning of sputtering. The dielectric constants of Ta and O below are the overall dielectric constants including 5 inR.
Ｔｉ １ ａｔ％混入Ｔａ、 Ｏ，膜を第１図中２とす
る。第１図中３は、Ｔｉである。この後６００℃Ｎ２中
にて１時間及び９００℃Ｎ２中にて１時間の熱処理を行
なう。The Ti 1 at% mixed Ta, O, film is designated as 2 in FIG. 3 in FIG. 1 is Ti. Thereafter, heat treatment is performed in N2 at 600°C for 1 hour and in N2 at 900°C for 1 hour.
第３図にＡＱをゲート電極として、Ａｇ側に負電位を与
えた時のリーク電流−電界強度特性を示す。FIG. 3 shows leakage current-field strength characteristics when AQ is used as a gate electrode and a negative potential is applied to the Ag side.
（イ）は６００℃の場合、（ロ）は、（イ）の後に９０
０℃アニールを行なった場合である０両者共に従来例第
２図（イ）（ロ）と比べると飛躍的にリーク電流が減少
し、特に低電界側では、３桁の低下となる。第３図（イ
）（ロ）各々に対し比誘電率は、９及び１５であり、１
Ｏ−１１Ａ（１０−”Ａ／ｃｄ）の時の電界強度は、各
々４．４ＭＶ／ｃｍ、 ２．５ＭＶ／ｃｍである。これ
らをＳｉｎ、の誘電率を考慮に入れて、ＳｉＯ□膜厚に
換算した電界強度は、（イ）の場合１０．２ＭＶ／ｃｍ
、（ロ）の場合９．６１ｔＶ／ｃｓ＋と高＜、ＳｉＯ，
、換算膜厚は、各々９５人、６０人となる。(a) is 600℃, (b) is 90℃ after (a)
When annealing is performed at 0° C., the leakage current in both cases is dramatically reduced compared to the conventional example shown in FIGS. The relative permittivity for each of Figure 3 (a) and (b) is 9 and 15, and 1
The electric field strength at O-11A (10-”A/cd) is 4.4 MV/cm and 2.5 MV/cm, respectively. Taking these into consideration the dielectric constant of Sin, the SiO□ film thickness The electric field strength converted to is 10.2MV/cm in case (a).
, In the case of (b), it is 9.61 tV/cs+ and high <, SiO,
, the equivalent film thickness is 95 people and 60 people, respectively.
〈実施例３及び４〉
実施例１及び２と同様な手法を用いて、 Ｚｒが１ａｔ
％混入したＴａターゲットを用いて、６００℃及び９０
０℃でＮ２中６０分のアニールを行なった場合のリーク
電流−電界強度特性を第４図に示す、 Ｚｒ混入Ｔａ２
Ｏ，の膜厚は、２２０人である。（イ）（ロ）は、各々
６００℃Ｎ２中６０分及び６００℃Ｎ２中６０分後９０
０℃Ｎ、中６０分アニールを行なった場合であり、誘電
率は、９及び１５である。はとんどＴｉと同様な特性が
得られる事がわかる。<Examples 3 and 4> Using the same method as in Examples 1 and 2, Zr was 1at
600°C and 90°C using a Ta target mixed with
Figure 4 shows the leakage current vs. electric field strength characteristics when annealing is performed in N2 for 60 minutes at 0°C.
The film thickness of O, is 220 people. (A) and (B) are respectively 90 minutes after 60 minutes in 600℃ N2 and 60 minutes in 600℃ N2.
This is the case where annealing was performed at 0° C.N for 60 minutes, and the dielectric constants were 9 and 15. It can be seen that almost the same characteristics as Ti can be obtained.
〈実施例５及び６〉
１ばをｆａｔ％混入したＴａ、 ０．２２０人の場合の
リーク電流−電界強度特性を第５図に示す。<Examples 5 and 6> Figure 5 shows the leakage current vs. electric field strength characteristics in the case of 0.220 Ta mixed with 1 fat%.
Ｈｆの場合もＴｉ、 Ｚｒと同様な特性が得られる事が
わかる。It can be seen that the same characteristics as Ti and Zr can be obtained in the case of Hf.
尚１本発明実施例では、Ｔｉ、 Ｚｒ、Ｈｆ各々１種が
混入したＴａターゲットの場合について述べたが、同様
の効果は２種以上の異種金属が混入したＴａターゲット
、あるいは丁ａと異種金属が、カソード電位が印加され
る部分において所望の面積比で配置した複合ターゲット
でもよい、又、高周波（ＲＦ）スパッタ法を用いれば、
異種金属を混入したＴａ酸化物あるいはＴａ酸化物と異
種金属酸化物又は異種金属の複合ターゲットでもよい、
さらに、Ｔａ以外に母体となる金属としてＮｂ、 Ｚｒ
、ｌｌｆ他種々の金属に対してもその金属よりイオン化
状態において電荷数の小さい金属を添加する事によって
同様な効果が得られる。また、金属酸化膜に異種金属元
素を添加する際に、成膜装置のターゲットを金属酸化膜
を構成する金属又は金属酸化物で、また、前記ターゲッ
トと同電位となる部位に配置される治具が金属酸化物中
に添加される元素よりなる異種金属、該元素が添加され
た異種金属、金属酸化物のいずれかで予め夫々を形成し
てもよい。尚、添加される異種金属元素の添加量は、金
属酸化物を＋ｑ成する金属の５原子％未濶とするのがよ
い。In the embodiment of the present invention, the case of a Ta target mixed with one type each of Ti, Zr, and Hf was described, but the same effect can be obtained with a Ta target mixed with two or more types of different metals, or with a Ta target mixed with two or more types of different metals. However, it may be a composite target arranged at a desired area ratio in the part where the cathode potential is applied, or if radio frequency (RF) sputtering is used,
It may be a Ta oxide mixed with a different metal or a composite target of a Ta oxide and a different metal oxide or a different metal.
Furthermore, in addition to Ta, Nb and Zr are used as base metals.
, llf, and other various metals, a similar effect can be obtained by adding a metal having a smaller number of charges in the ionized state than the other metal. In addition, when adding a different metal element to a metal oxide film, the target of the film forming apparatus is a metal or metal oxide that constitutes the metal oxide film, and a jig is placed at a location that has the same potential as the target. The metal oxide may be formed in advance using any one of a dissimilar metal consisting of an element added to a metal oxide, a dissimilar metal to which the element is added, and a metal oxide. The amount of the different metal element to be added is preferably 5 atom % of the metal forming the +q metal oxide.
以上説明したように、この発明によれば、誘電体として
用いられる金属高誘電率酸化物中にイオン価数の小さい
異種金属元素を添加し、母体となる金属酸化物中のリー
ク電流を著しく減少せしめる事ができる。従って、小面
積・大容量でかつリーク電流の少ないＶＬＳＩチップ等
に搭載するのに好適なキャパシタを提供する事ができる
。As explained above, according to the present invention, a different metal element with a low ionic valence is added to a metal high dielectric constant oxide used as a dielectric, thereby significantly reducing leakage current in the metal oxide that serves as the base material. I can force it. Therefore, it is possible to provide a capacitor suitable for mounting on a VLSI chip or the like, which has a small area, large capacity, and low leakage current.
第１図は本発明に係るＭ電体膜の構成を示す断面図、第
２図は従来の無添加の金属酸化物のリーク電流と電界強
度の特性を示す線図、第３図ないし第５図はいずれも本
発明による金属酸化物のリーク電流と電界強度の特性を
示す線図である。
Ｌ −−−−一導電性物質
２−−一一一金属酸化物
３−−−−一異種金属FIG. 1 is a cross-sectional view showing the structure of the M electric film according to the present invention, FIG. 2 is a diagram showing the leakage current and electric field strength characteristics of a conventional additive-free metal oxide, and FIGS. Each figure is a diagram showing characteristics of leakage current and electric field strength of the metal oxide according to the present invention. L -----1 conductive substance 2--1-1 metal oxide 3-----1 different metal
Claims (5)
構成する金属よりもイオン化状態における正の電荷数が
小なる異種金属元素が添加されていることを特徴とする
キャパシタ用誘電体薄膜。(1) A dielectric material for a capacitor characterized in that a dielectric thin film formed of a metal oxide film is doped with a different metal element having a smaller number of positive charges in an ionized state than the metal constituting the dielectric film. Thin film.
正の電荷数が、金属酸化物を構成する金属の電荷数より
１小さいことを特徴とする請求項１記載の誘電体薄膜。(2) The dielectric thin film according to claim 1, wherein the number of positive charges in the ionized state of the different metal element to be added is smaller by 1 than the number of charges of the metal constituting the metal oxide.
を構成する金属の５原子％未満であることを特徴とする
請求項１記載の誘電体薄膜。(3) The dielectric thin film according to claim 1, wherein the amount of the different metal element added is less than 5 at % of the metal constituting the metal oxide.
あり、添加される異種金属元素がＴｉ、Ｚｒ、Ｈｆの内
の少なくとも一つであることを特徴とする請求項１記載
の誘電体薄膜。(4) The dielectric thin film according to claim 1, wherein the metal oxide is Ta_2O_5 or Nb_2O_5, and the different metal element added is at least one of Ti, Zr, and Hf.
ける誘電体薄膜の製造にあたり、金属酸化物中にこれを
構成する金属よりもイオン化状態における正の電荷数が
小なる異種金属元素を添加することを特徴とする誘電体
薄膜の製造方法。(5) When manufacturing a dielectric thin film in a capacitor using a metal oxide film as a dielectric, a different metal element having a smaller number of positive charges in an ionized state than the constituent metal is added to the metal oxide. A method for producing a dielectric thin film characterized by:
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63049733A JPH01225148A (en) | 1988-03-04 | 1988-03-04 | Thin film of dielectric and manufacture thereof |
| KR1019890002719A KR920010201B1 (en) | 1988-03-04 | 1989-03-04 | Semidonductor device and method for manufacturing of the same |
| US07/683,132 US5189503A (en) | 1988-03-04 | 1991-04-10 | High dielectric capacitor having low current leakage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63049733A JPH01225148A (en) | 1988-03-04 | 1988-03-04 | Thin film of dielectric and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01225148A true JPH01225148A (en) | 1989-09-08 |
Family
ID=12839393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63049733A Pending JPH01225148A (en) | 1988-03-04 | 1988-03-04 | Thin film of dielectric and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01225148A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4337889A1 (en) * | 1992-11-07 | 1994-05-26 | Gold Star Electronics | Prodn. of capacitor in storage appts. - by depositing poly-silicon layer on substrate, forming silicon oxide layer, tantalum@ layer and then tantalum oxide layer |
| US6144057A (en) * | 1990-07-24 | 2000-11-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor memory device including a field effect transistor |
| US7335570B1 (en) | 1990-07-24 | 2008-02-26 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming insulating films, capacitances, and semiconductor devices |
| JP2013093589A (en) * | 1998-03-12 | 2013-05-16 | Alcatel-Lucent Usa Inc | Individual element including dielectric materials or integrated circuit device including semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6471166A (en) * | 1987-09-10 | 1989-03-16 | Sharp Kk | Manufacture of tantalum oxide thin film |
-
1988
- 1988-03-04 JP JP63049733A patent/JPH01225148A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6471166A (en) * | 1987-09-10 | 1989-03-16 | Sharp Kk | Manufacture of tantalum oxide thin film |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6144057A (en) * | 1990-07-24 | 2000-11-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor memory device including a field effect transistor |
| US7335570B1 (en) | 1990-07-24 | 2008-02-26 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming insulating films, capacitances, and semiconductor devices |
| DE4337889A1 (en) * | 1992-11-07 | 1994-05-26 | Gold Star Electronics | Prodn. of capacitor in storage appts. - by depositing poly-silicon layer on substrate, forming silicon oxide layer, tantalum@ layer and then tantalum oxide layer |
| DE4337889B4 (en) * | 1992-11-07 | 2006-01-12 | Lg Semicon Co. Ltd., Cheongju | A method of manufacturing a capacitor in a semiconductor memory device |
| JP2013093589A (en) * | 1998-03-12 | 2013-05-16 | Alcatel-Lucent Usa Inc | Individual element including dielectric materials or integrated circuit device including semiconductor device |
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