JPH01223721A - Method and device for crystal growth - Google Patents

Method and device for crystal growth

Info

Publication number
JPH01223721A
JPH01223721A JP5020288A JP5020288A JPH01223721A JP H01223721 A JPH01223721 A JP H01223721A JP 5020288 A JP5020288 A JP 5020288A JP 5020288 A JP5020288 A JP 5020288A JP H01223721 A JPH01223721 A JP H01223721A
Authority
JP
Japan
Prior art keywords
substrate
crystal growth
layer
molecular beam
growth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5020288A
Other languages
Japanese (ja)
Inventor
Junji Saito
齊藤 淳二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5020288A priority Critical patent/JPH01223721A/en
Publication of JPH01223721A publication Critical patent/JPH01223721A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To remove an impurity such as carbon on the surface of a substrate, and to form a thin buffer layer by heating the substrate composed of a compound semiconductor at a fixed temperature, irradiating the substrate with hydrogen molecular beams, getting rid of impurity atoms and causing a crystal growth on the substrate. CONSTITUTION:When a GaAs substrate is used as a substrate 10, an impurity such as carbon on the surface is removed when the substrate is heated at approximately 600 deg.C and the substrate is irradiated with hydrogen molecular beams. Consequently, a heating temperature is brought to approximately 600 deg.C, As, etc., on the surface are evaporated and are not etched and a surface having excellent surface morphology is acquired according to the surface treating method. The substrate is surface-treated in a substrate anteroom 2, and the substrate 10 is sent into a crystal growth chamber 1 and a crystal growth layer such as a GaAs layer is grown. Accordingly, traps on the interface are decreased, thus acquiring the excellent crystal growth layer even when a thin buffer layer is shaped.

Description

【発明の詳細な説明】 [概要] 被成長基板の表面処理方法とその処理を実施する装置に
関し、 基板表面の炭素などの不純物を除去し、薄いバッファ層
の形成を可能にすることを目的とし、化合物半導体から
なる被成長基板を所定温度に加熱し、該被成長基板に水
素分子線を照射して不純物原子を除去し、次いで、該被
成長基板に結晶成長する工程が含まれることを特徴とし
、その結晶成長装置として、基板交換室と結晶成長室と
の間に基板準備室を備え、該基板準備室に被成長基板を
保持して加熱する加熱ホルダーと該被成長基板面に水素
分子線を照射する水素分子線セルを設けて、被成長基板
の表面処理をするようにしたことを特徴とする。
[Detailed Description of the Invention] [Summary] This invention relates to a method for surface treatment of a substrate to be grown and an apparatus for performing the treatment. , comprising the steps of heating a growth substrate made of a compound semiconductor to a predetermined temperature, irradiating the growth substrate with a hydrogen molecular beam to remove impurity atoms, and then growing crystals on the growth substrate. The crystal growth apparatus is equipped with a substrate preparation chamber between the substrate exchange chamber and the crystal growth chamber, a heating holder that holds and heats the substrate to be grown, and a heating holder that holds and heats the substrate to be grown, and a hydrogen molecule on the surface of the substrate to be grown. The present invention is characterized in that a hydrogen molecular beam cell for irradiating a beam is provided to treat the surface of the growth substrate.

[産業上の利用分野〕 本発明は結晶成長方法と結晶成長装置に係り、特に被成
長基板の表面処理方法とその処理を実施する装置に関す
る。
[Industrial Application Field] The present invention relates to a crystal growth method and a crystal growth apparatus, and more particularly to a method for surface treatment of a growth substrate and an apparatus for carrying out the treatment.

最近、m−v減化合物半導体層をエピタキシャル成長し
て、高性能半導体素子を作成する研究が盛んにおこなわ
れており、例えば、GaAs/AlGaAs。
Recently, much research has been carried out to create high-performance semiconductor devices by epitaxially growing m-v reduced compound semiconductor layers, such as GaAs/AlGaAs.

In P / InGaAs系などのへテロ接合構造を
形成し、このペテロ構造を利用した超高速デバイスや光
デバイスが開発されつつある。
Ultrahigh-speed devices and optical devices are being developed that form heterojunction structures such as InP/InGaAs systems and utilize this petrostructure.

そのような化合物半導体層をエピタキシャル成長する方
法として、分子線結晶成長(MolecularBea
m Epitaxy ; M B E)法が開発されて
、このMB2法は急峻な接合が形成できる優れた成長法
として知られている。しかし、高品位な結晶成長層を薄
く形成するためには、その基盤となる結晶基板表面の品
質が極めて重要である。
As a method for epitaxially growing such a compound semiconductor layer, molecular beam crystal growth (Molecular Bea crystal growth) is used.
The MB2 method has been developed and is known as an excellent growth method that can form steep junctions. However, in order to form a thin, high-quality crystal growth layer, the quality of the surface of the crystal substrate, which is the base thereof, is extremely important.

[従来の技術] 第4図はMB2法を適用する従来のガスソース分子線結
晶成長装置の概要を示しており、1は結晶成長室、2は
基板(jA備室、3は基板交換室、4゜5はゲートバル
ブ、6は基板移送棹、7は基板マニュピレータ、8は加
熱ヒータを備えた基板ホルダー、9は分子線源セル、1
0は基板(被成長基板;ウェハー)である。操作は、基
板10を保持した基板ホルダー8を基板交換室3に挿入
し、ゲートバルブ4,5を開閉して基板準備室2を通じ
て結晶成長室1に送入する。基板準備室2から結晶成長
室1に送入する場合、基板移送棹6によって結晶成長室
1の基板マニュピレータフに保持させ、それを回転して
分子線源セル9に対向させる。なお、基板準備室2内に
記入している破線は基板ホルダーの回転移動の軌跡を示
している。結晶成長室1における成長処理は、基板10
が、例えばGaAs基板の場合は600〜700℃に加
熱し、その表面にHEMTなどのGaAsデバイスを成
長させる際には、分子線源セル9はAs分子線源セル、
 Ga分子線源セルその他の複数の分子線源セルを配置
しておき、これらから分子線を照射して結晶成長層を成
長させる。
[Prior Art] Fig. 4 shows an outline of a conventional gas source molecular beam crystal growth apparatus applying the MB2 method, in which 1 is a crystal growth chamber, 2 is a substrate (jA room, 3 is a substrate exchange room, 4.5 is a gate valve, 6 is a substrate transfer rod, 7 is a substrate manipulator, 8 is a substrate holder equipped with a heater, 9 is a molecular beam source cell, 1
0 is a substrate (a substrate to be grown; a wafer). In operation, the substrate holder 8 holding the substrate 10 is inserted into the substrate exchange chamber 3, gate valves 4 and 5 are opened and closed, and the substrate is sent into the crystal growth chamber 1 through the substrate preparation chamber 2. When transferring the substrate from the substrate preparation chamber 2 to the crystal growth chamber 1, the substrate is held by the substrate manipulator turf in the crystal growth chamber 1 by the substrate transfer rod 6, and rotated to face the molecular beam source cell 9. Note that the broken line drawn inside the substrate preparation chamber 2 indicates the locus of rotational movement of the substrate holder. The growth process in the crystal growth chamber 1 is performed on the substrate 10.
However, for example, in the case of a GaAs substrate, when heating it to 600 to 700°C and growing a GaAs device such as a HEMT on the surface, the molecular beam source cell 9 is an As molecular beam source cell,
A plurality of molecular beam source cells such as a Ga molecular beam source cell are arranged, and molecular beams are irradiated from these cells to grow a crystal growth layer.

ところで、このようにして、基板10に分子線結晶成長
を行なう場合、基板の成長面を清浄にする表面処理がお
こなわれており、例えば、基板がGaAs基板の場合は
、真空中において基板を約300〜400℃で加熱して
、表面に付着していた水分を除去し、更に、成長直前に
は約600℃で3〜5分間加熱して基板表面の自然酸化
膜を除去し、しかる後、所要の結晶成長層の成長をおこ
なっている。
By the way, when molecular beam crystal growth is performed on the substrate 10 in this way, a surface treatment is performed to clean the growth surface of the substrate. For example, if the substrate is a GaAs substrate, the substrate is cleaned in vacuum. The substrate is heated at 300 to 400°C to remove moisture adhering to the surface, and immediately before growth, it is heated to about 600°C for 3 to 5 minutes to remove the natural oxide film on the substrate surface. The required crystal growth layer is grown.

このような水分と自然酸化膜(膜厚10人程度)を除去
するのが、従来の表面処理方法である。
Conventional surface treatment methods remove such moisture and natural oxide film (film thickness of about 10 mm).

[発明が解決しようとする課題〕 しかし、上記の表面処理方法では水分や酸素の除去はで
きても、炭化水素や二酸化炭素として基板面に付着して
いる炭素(C)を除去することができない。このような
炭化水素や二酸化炭素は大気中あるいは真空成長室の内
部から飛来して付着する。
[Problem to be solved by the invention] However, although the above surface treatment method can remove moisture and oxygen, it cannot remove carbon (C) attached to the substrate surface as hydrocarbons and carbon dioxide. . Such hydrocarbons and carbon dioxide come from the atmosphere or from inside the vacuum growth chamber and adhere thereto.

そのように、GaAs基板表面に炭素が付着した状態で
、その面に結晶成長層をエピタキシャル成長すると、炭
素原子がGaAs中に混入してアクセプタ(p型)とし
て働き、GaAs基板と結晶成長層との間に界面準位を
形成して、デバイス特性を害することになる。
In this way, when a crystal growth layer is epitaxially grown on the surface of a GaAs substrate with carbon attached to it, carbon atoms mix into the GaAs and act as acceptors (p-type), resulting in a bond between the GaAs substrate and the crystal growth layer. This results in the formation of interface states between the two, which impairs device characteristics.

従来、この界面準位の影響を回避するために、1μm近
い膜厚の厚いバッファ層を形成しているが、この厚いバ
ッファ層を設けることは結晶成長処理の工数が嵩み、そ
れだけスループットを低下させることになる。
Conventionally, in order to avoid the influence of this interface state, a thick buffer layer with a film thickness of nearly 1 μm is formed, but providing this thick buffer layer increases the number of steps in the crystal growth process, which reduces throughput. I will let you do it.

その対策として、例えば、先にサーマルエツチング方法
を提案し゛た(特開昭62−030317号参照)。
As a countermeasure against this problem, for example, we have previously proposed a thermal etching method (see Japanese Patent Laid-Open No. 62-030317).

その方法によれば、GaAs基板表面を熱的にエツチン
グして炭素を除去し、バッファ層を薄膜化することがで
きる。しかし、このサーマルエ・ノチング法はGaAs
表面層を真空中のAs分子線照射下で750℃以上に加
熱して熱的に蒸発させる方法であるから、表面を均一に
除去することが難しく、表面モホロジーが低下して面荒
れを生じる。表面の面荒れは製造プロセス上、種々の弊
害を起こす。
According to this method, the surface of the GaAs substrate is thermally etched to remove carbon and the buffer layer can be made thinner. However, this thermal notching method is not suitable for GaAs.
Since this is a method of thermally evaporating the surface layer by heating it to 750° C. or higher under irradiation with As molecular beams in a vacuum, it is difficult to remove the surface uniformly, and the surface morphology deteriorates, resulting in surface roughness. Surface roughness causes various problems in the manufacturing process.

本発明は基板表面の炭素などの不純物を除去し、薄いバ
ッファ層の形成を可能にすることを目的とした結晶成長
法の表面処理方法とそれを実施する成長装置を提案する
ものである。
The present invention proposes a surface treatment method for a crystal growth method and a growth apparatus for carrying out the method, with the purpose of removing impurities such as carbon from the surface of a substrate and making it possible to form a thin buffer layer.

[課題を解決するための手段] その目的は、化合物半導体からなる被成長基板を所定温
度に加熱し、該被成長基板に水素分子線を照射して不純
物原子を除去し、次いで、該被成長基板に結晶成長する
工程が含まれる結晶成長方法によって達成される。
[Means for solving the problem] The purpose is to heat a growth substrate made of a compound semiconductor to a predetermined temperature, irradiate the growth substrate with a hydrogen molecular beam to remove impurity atoms, and then This is achieved by a crystal growth method that includes the step of growing crystals on a substrate.

且つ、それを実施する成長装置として、基板交換室と結
晶成長室との間に基板準備室を備え、該基板準備室に被
成長基板を保持して加熱する加熱ホルダーと該被成長基
板面に水素分子線を照射する水素分子線セルを設けて、
被成長基板の表面処理をするようにしたことを特徴とす
る。
In addition, the growth apparatus for carrying out this process includes a substrate preparation chamber between the substrate exchange chamber and the crystal growth chamber, and a heating holder that holds and heats the growth substrate in the substrate preparation chamber, and a heating holder that holds and heats the growth substrate. A hydrogen molecular beam cell is installed to irradiate hydrogen molecular beams,
The method is characterized in that the surface of the growth substrate is treated.

[作用] 即ち、本発明は、被成長基板を比較的低温度に加熱して
、水素(H2)分子線で照射しながら炭素(C)などの
不純物原子を除去する。そうすれば、清浄で表面モホロ
ジーの良い面が表われ、その表面に結晶成長層をエピタ
キシャル成長すれば、結晶品質の良い成長層が得られる
。従って、薄いバッファ層を設けるだけで良くなる。
[Operation] That is, in the present invention, impurity atoms such as carbon (C) are removed while heating the growth substrate to a relatively low temperature and irradiating it with a hydrogen (H2) molecular beam. In this way, a clean surface with good surface morphology appears, and if a crystal growth layer is epitaxially grown on that surface, a growth layer with good crystal quality can be obtained. Therefore, it is sufficient to provide only a thin buffer layer.

[実施例] 以下1図面を参照して実施例によって詳細に説明する。[Example] An embodiment will be described in detail below with reference to one drawing.

第1図は本発明にかかる結晶成長方法を適用したガスソ
ース分子線結晶成長装置の概要を示しており、第1図に
おいて第4図に示す従来の結晶成長装置と同一部位には
同一記号が付けであるが、その他の11は水素分子線源
セル、 12.13はバルブ。
Figure 1 shows an outline of a gas source molecular beam crystal growth apparatus to which the crystal growth method according to the present invention is applied. In Figure 1, the same parts as the conventional crystal growth apparatus shown in Figure 4 are designated by the same symbols. The other 11 are hydrogen molecular beam source cells, and 12 and 13 are valves.

14は水素純化器、15は水素ボンベで、水素分子線源
セル11は基板準備室2に設けである。且つ、本例での
加熱ホルダーは基板ホルダーそのものであり、基板10
と共に搬送される構成である。
14 is a hydrogen purifier, 15 is a hydrogen cylinder, and a hydrogen molecular beam source cell 11 is provided in the substrate preparation room 2. In addition, the heating holder in this example is the substrate holder itself, and the heating holder is the substrate holder itself.
It is configured to be transported together with the vehicle.

さて、基板10をGaAs5板とした場合、本発明によ
れば基板の加熱を約600℃にして水素分子線を照射す
れば、表面の炭素などの不純物が除かれる。
Now, when the substrate 10 is a 5-GaAs plate, according to the present invention, impurities such as carbon on the surface are removed by heating the substrate to about 600° C. and irradiating it with a hydrogen molecular beam.

従って、従来のサーマルエツチング法では、As分子線
照射下で750℃以上に加熱して蒸発させていたが、こ
の表面処理法によれば加熱温度が約600℃であり、そ
のような700℃以下の加熱温度であれば、表面の^S
などが蒸発してエツチングされることがなくなり、表面
モホロジーの良い面が得られる。
Therefore, in the conventional thermal etching method, evaporation is performed by heating to 750°C or higher under As molecular beam irradiation, but with this surface treatment method, the heating temperature is approximately 600°C, and such 700°C or lower If the heating temperature is , the surface ^S
etc. will not evaporate and be etched, and a good surface morphology will be obtained.

基板準備室2においてこの表面処理した後、次に、基板
10を結晶成長室1に送入して結晶成長層、例えば、G
aAs層を成長する。尚、第1図の結晶成長室には2つ
の分子線源セルしか図示してないが、これは基板10に
対して分子線源セルが回転対称に配置されているためで
、縦断面的な第1図には現われない他の分子線源セルも
存在する。
After this surface treatment in the substrate preparation chamber 2, the substrate 10 is then transferred to the crystal growth chamber 1 to form a crystal growth layer, for example, G
Grow the aAs layer. Although only two molecular beam source cells are shown in the crystal growth chamber in FIG. 1, this is because the molecular beam source cells are arranged rotationally symmetrically with respect to the substrate 10. There are also other molecular beam source cells that do not appear in FIG.

次に、このような表面処理する詳細例とその効果につい
て説明する。
Next, a detailed example of such surface treatment and its effects will be explained.

第1の実施例はSi (シリコン)を7 xlO”/c
dドープしたGaAs基板上に、同じ(Siを7X10
/dドープしたn −GaAs層を成長する例である。
The first embodiment uses Si (silicon) at a rate of 7 x lO”/c
The same (Si 7X10
This is an example of growing a /d doped n-GaAs layer.

まず、GaAs基板を大気中においてモリブデン(Mo
)ブロック(基板ホルダー)にIn半田で貼着し、これ
を基板交換室3に挿入して、基板交換室を10−′T〜
10  Torr程度に排気した後、ゲートパルプ5を
開いて基板準備室2に送入する。
First, a GaAs substrate is exposed to molybdenum (Mo) in the atmosphere.
) Attach it to the block (board holder) with In solder, insert it into the board exchange chamber 3, and open the board exchange chamber from 10-'T~
After evacuation to about 10 Torr, the gate pulp 5 is opened and introduced into the substrate preparation chamber 2.

基板準備室2は真空度IQ  Torr程度に維持して
あり、その中でGaAs基板を約600℃に加熱し、上
記の水素分子線照射をおこなって20分間保持する。
The substrate preparation chamber 2 is maintained at a vacuum level of about IQ Torr, in which the GaAs substrate is heated to about 600° C., subjected to the above hydrogen molecular beam irradiation, and held for 20 minutes.

その場合、真空度は10  Torr程度に低下するが
、表面処理後も排気を続行して真空度を回復させ、且つ
、基板を降温させる。
In that case, the degree of vacuum decreases to about 10 Torr, but evacuation is continued even after the surface treatment to restore the degree of vacuum and lower the temperature of the substrate.

次いで、結晶成長室1に送入して、GaAs基板を約6
80℃に加熱し、成長処理してSiを7X10/−ドー
プしたn −GaAs層を成長する。
Next, the GaAs substrate is introduced into the crystal growth chamber 1 to a thickness of about 6
It is heated to 80 DEG C. and grown to grow an n-GaAs layer doped with 7.times.10/- Si.

しかる後、この基板試料の基板−成長層界面付近のキャ
リア濃度分布をC−V測定法によって調べた。その結果
を第2図に示しており、縦軸はキャリア濃度、横軸は表
面からの深さで、曲線Iは本発明にかかる表面処理法を
適用した試料によるデータ、曲線■は従来の表面処理を
適用した試料によるデータである。同図において、従来
法による試料の曲線■の凹みの大きいのはドナー不純物
(St)がアクセプタ不純物(C;炭素)に食われ\番 て減少していることを示している。一方、本発明にかか
る表面処理法による試料の曲線lでは凹みが小さくなっ
ており、改善されていることが判る。
Thereafter, the carrier concentration distribution near the substrate-growth layer interface of this substrate sample was examined by CV measurement. The results are shown in Figure 2, where the vertical axis is the carrier concentration and the horizontal axis is the depth from the surface.Curve I is data from a sample to which the surface treatment method according to the present invention was applied, and curve ■ is data from a conventional surface treatment method. This data is based on samples to which processing has been applied. In the same figure, the large concavity of the curve (2) of the sample obtained by the conventional method indicates that the donor impurity (St) is consumed by the acceptor impurity (C; carbon) and is reduced. On the other hand, in the curve 1 of the sample obtained by the surface treatment method according to the present invention, the dents are smaller, indicating an improvement.

この第2図より、積分計算してキャリアの空乏量を求め
ると、従来法による試料は1.5X10  /C−程度
1本法による試料では7X10  /era程度で、顕
著に低減されている。なお、この基板−成長層界面近傍
のキャリア濃度の変化量は基板表面の残留炭素の量と相
関があることが知られており(Japanese Jo
urnal of Applied Physics 
25(8)+1986+pp1216参照)、従って、
本発明にかかる表面処理法は残留炭素量の減少に効果が
あることが明白である。
From FIG. 2, when the amount of carrier depletion is determined by integral calculation, it is 1.5×10 2 /C− for the sample made by the conventional method, and about 7×10 2 /era for the sample made by the single method, which is significantly reduced. It is known that the amount of change in carrier concentration near the substrate-growth layer interface is correlated with the amount of residual carbon on the substrate surface (Japanese Jo
urnal of Applied Physics
25(8)+1986+pp1216), therefore,
It is clear that the surface treatment method according to the present invention is effective in reducing the amount of residual carbon.

次に、第2の実施例について説明する。半絶縁性GaA
s基板にGaAs層+ AlGaAs層+  n  A
lGaAs層からなるペテロ構造を成長した実施例(H
BMT構造の例)で、第3図にその断面図を示しており
、20は半絶縁性GaAs基板、21はGaAsバッフ
ァ層、22はへ1GaAsスペーサ層、23はn−へ1
GaAs電子供給層。
Next, a second example will be described. Semi-insulating GaA
GaAs layer + AlGaAs layer + n A on s substrate
Example (H
An example of a BMT structure), whose cross-sectional view is shown in FIG.
GaAs electron supply layer.

24はn−GaAsコンタクト層である。24 is an n-GaAs contact layer.

まず、半絶縁性GaAs基板20を前記と同様にして本
発明にかかる表面処理、即ち、真空度10  Torr
程度に維持した基板準備室の中で約600℃に加熱し、
水素分子線を20分照射する処理をおこない、次に、結
晶成長室において上記の結晶成長層を成長する。各結晶
成長層の詳細な値は次の通りである。
First, the semi-insulating GaAs substrate 20 was subjected to the surface treatment according to the present invention in the same manner as described above, that is, the vacuum level was 10 Torr.
heated to about 600°C in a substrate preparation room maintained at a moderate temperature,
A process of irradiating with a hydrogen molecular beam for 20 minutes is performed, and then the above-mentioned crystal growth layer is grown in a crystal growth chamber. The detailed values of each crystal growth layer are as follows.

■GaAsGaAsバフフッ膜厚0.2μm■AlxG
a  xAsスペーサ層22:膜厚60人、X(ffi
o、3■n−八1xGa  xAs電子供給層23:膜
厚900人、X値0.3 不純物濃度1× 10  /a+! ■n−GaAsコンタクト層:膜厚200人、不純物)
;度1×10/cIa そして、この基板試料の電子移動度および電子濃度を測
定したところ、電子移動度90000cnl / VS
、電子濃度5.0xlO/cdであった。
■GaAsGaAs buff film thickness 0.2μm ■AlxG
axAs spacer layer 22: film thickness 60mm,
o, 3■n-81xGa xAs electron supply layer 23: film thickness 900, X value 0.3, impurity concentration 1x 10 /a+! ■n-GaAs contact layer: thickness 200, impurities)
degree 1×10/cIa Then, when the electron mobility and electron concentration of this substrate sample were measured, the electron mobility was 90000cnl/VS
, the electron concentration was 5.0xlO/cd.

他方、従来と同様の表面処理、即ち、約400℃。On the other hand, the same surface treatment as before, ie about 400°C.

20分間の加熱処理したS板に膜厚0.6μmのGaA
sバッファ層21を成長し、他の結晶成長層は上記と同
様の条件で成長した試料を作製した。そして、その電子
移動度および電子濃度を測定した結果、末法による前記
の基板と殆ど同様の値が得られ、しかも、表面欠陥密度
が半分に減少していた。どの結果、本発明にかかる表面
処理を適用すれば、バッファ層の厚みを1(できること
が明らかである。
A GaA film with a thickness of 0.6 μm was applied to an S plate that was heat-treated for 20 minutes.
A sample was prepared in which the s-buffer layer 21 was grown and the other crystal growth layers were grown under the same conditions as above. As a result of measuring its electron mobility and electron concentration, it was found that the values were almost the same as those of the substrate prepared by the final method, and the surface defect density was reduced by half. As a result, it is clear that the thickness of the buffer layer can be reduced to 1 (1) by applying the surface treatment according to the present invention.

従って、本発明を適用すれば界面のトラップが減少して
、薄いバッファ層を形成しても良質の結晶成長層が得ら
れ、例えば、HEMTのような電子デバイスでは、二次
元電子ガスが増加して性能が向上する。且つ、薄いバッ
ファ層を設けると、結晶成長処理工数が減少してスルー
ブツトが向上し、しかも、表面欠陥密度も減少する効果
もある。
Therefore, by applying the present invention, traps at the interface are reduced, and a high-quality crystal growth layer can be obtained even when a thin buffer layer is formed.For example, in electronic devices such as HEMT, two-dimensional electron gas is increased. performance is improved. Furthermore, providing a thin buffer layer has the effect of reducing the number of crystal growth processing steps, improving throughput, and reducing surface defect density.

なお、上記はGaAs基板を実施例としているが、本発
明はその他の化合物半導体基板、例えば1nP基板やI
nSb基板にも適用でき、その場合の蒸発し易い元素は
W(P)やアンチモニ−(Sb)である。
Note that although the above example uses a GaAs substrate, the present invention is applicable to other compound semiconductor substrates, such as 1nP substrates and I
It can also be applied to an nSb substrate, and the elements that are easily evaporated in that case are W (P) and antimony (Sb).

更に、上記実施例はガスソースMBE法で説明したが、
本発明は金属ソースMBE法やMOCVD法にも適用で
きる。
Furthermore, although the above embodiment was explained using the gas source MBE method,
The present invention can also be applied to metal source MBE and MOCVD.

[発明の効果] 以上の説明から明らかなように、本発明にかかる結晶成
長方法によれば、膜厚の薄いバッファ層を設けて、スル
ープットが向上し、且つ、高品質な結晶成長層かえられ
て、電子デバイスや光デバイスの性能向上に太き(寄与
するものである。
[Effects of the Invention] As is clear from the above description, according to the crystal growth method of the present invention, a thin buffer layer is provided, throughput is improved, and a high-quality crystal growth layer can be changed. Therefore, it greatly contributes to improving the performance of electronic devices and optical devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明にかかるガスソース分子線結晶成長装置
を示す図 第2図は第1の実施例における基板−成長層界面付近の
キャリア濃度分布図、 第3図は第2の実施例のへテロ構造の断面図、第4図は
従来のガスソース分子線結晶成長装置を示す図である。 図において、 1は結晶成長室、    2は基板準備室、3は基板交
換室、    4.5はゲートバルブ、6は基板移送棹
、    7は基板マニュピレータ、8は基板ホルダー
、   9は分子線源セル、10は被成長基板(基板)
11は水素分子線源セル、12、13はバルブ、   
14は水素純化器、15は水素ボンへ、 20は半絶縁性GaAs1板、21はGaAsバ・ノフ
ァ層、22はAlGaAsスペーサ層、 23はn−^lGaAs電子供給層、 24はn−GaAsコンタクト層
FIG. 1 shows a gas source molecular beam crystal growth apparatus according to the present invention. FIG. 2 shows a carrier concentration distribution near the substrate-growth layer interface in the first embodiment. A cross-sectional view of the heterostructure, FIG. 4, is a diagram showing a conventional gas source molecular beam crystal growth apparatus. In the figure, 1 is a crystal growth chamber, 2 is a substrate preparation room, 3 is a substrate exchange room, 4.5 is a gate valve, 6 is a substrate transfer rod, 7 is a substrate manipulator, 8 is a substrate holder, 9 is a molecular beam source cell , 10 is a growth substrate (substrate)
11 is a hydrogen molecular beam source cell, 12 and 13 are valves,
14 is a hydrogen purifier, 15 is to a hydrogen bomb, 20 is a semi-insulating GaAs plate, 21 is a GaAs bar layer, 22 is an AlGaAs spacer layer, 23 is an n-^lGaAs electron supply layer, 24 is an n-GaAs contact layer

Claims (2)

【特許請求の範囲】[Claims] (1)化合物半導体からなる被成長基板を所定温度に加
熱し、該被成長基板に水素分子線を照射して不純物原子
を除去し、次いで、該被成長基板に結晶成長する工程が
含まれてなることを特徴とする結晶成長方法。
(1) The process includes heating a growth substrate made of a compound semiconductor to a predetermined temperature, irradiating the growth substrate with a hydrogen molecular beam to remove impurity atoms, and then growing crystals on the growth substrate. A crystal growth method characterized by:
(2)基板交換室と結晶成長室との間に基板準備室を備
え、該基板準備室に被成長基板を保持して加熱する加熱
ホルダーと該被成長基板面に水素分子線を照射する水素
分子線セルを設けて、被成長基板の表面処理をするよう
にしたことを特徴とする結晶成長装置。
(2) A substrate preparation chamber is provided between the substrate exchange chamber and the crystal growth chamber, and the substrate preparation chamber includes a heating holder that holds and heats the substrate to be grown, and a hydrogen holder that irradiates the surface of the substrate to be grown with a hydrogen molecular beam. A crystal growth apparatus characterized in that a molecular beam cell is provided to perform surface treatment on a growth substrate.
JP5020288A 1988-03-02 1988-03-02 Method and device for crystal growth Pending JPH01223721A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5020288A JPH01223721A (en) 1988-03-02 1988-03-02 Method and device for crystal growth

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5020288A JPH01223721A (en) 1988-03-02 1988-03-02 Method and device for crystal growth

Publications (1)

Publication Number Publication Date
JPH01223721A true JPH01223721A (en) 1989-09-06

Family

ID=12852538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5020288A Pending JPH01223721A (en) 1988-03-02 1988-03-02 Method and device for crystal growth

Country Status (1)

Country Link
JP (1) JPH01223721A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0599516A2 (en) * 1992-11-20 1994-06-01 AT&T Corp. Process for removing surface contaminants from III-V semiconductors

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0599516A2 (en) * 1992-11-20 1994-06-01 AT&T Corp. Process for removing surface contaminants from III-V semiconductors
EP0599516A3 (en) * 1992-11-20 1994-06-22 At & T Corp Process for removing surface contaminants from iii-v semiconductors.

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