JPH01222297A - Image information display device - Google Patents

Abstract

PURPOSE:To hold the page turning time with satisfactory man-machine interface by extending a switching period of a write start timing so as to conform with a desired certain period. CONSTITUTION:An output of a write end flag 9 synchronizes with an output period of a programmable timer 11, therefore, is latched to a flip-flop (FF) 12 by a carry output of the programmable timer 11. Subsequently, since a code expanding circuit 2 is stopped until the next period is started, exclusive OR is taken by an EOR circuit 13 between an output of the write end flag 9 and an output of the FF 12, and a write inhibiting signal is supplied to the code expanding circuit. When the write inhibiting signal is inputted, the code expanding circuit 2 stops its operation until the inhibiting signal is released. In such a way, a page turning speed on a CRT can be allowed to conform with a personal reaction characteristic of an operator.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application J] The present invention relates to a display control circuit for an electronic filing device equipped with an optical disk or the like, and particularly an image information display device suitable for providing a good man-machine interface. Regarding.

[Prior art l] When displaying image data on the display of an electronic filing device, if a display control circuit with only one screen memory, which is used in conventional computers, is used,
When changing the page of the displayed image, the operator can see the process in which the next image is sequentially written on top of the image of the previous page due to limitations in image processing performance. For this reason, the leading edge of the image being transferred appears to flow from top to bottom in a line on the display, and when pages are automatically turned repeatedly, many people experience a feeling of mild seasickness when staring at this. There were some problems, such as feeling uncomfortable.

Conventionally, as a technique for solving these inconveniences, a so-called display double buffer as described in Japanese Patent Application Laid-Open No. 59-26787 has been adopted.

FIG. 2 is a simplified block diagram of a conventional device employing such a double buffer. 1 is an optical disk in which image data to be displayed is stored in a compressed state (encoded data), 2 is a code decompression circuit that converts the encoded data into image data, and 3 is an image data stored in the first and second screen memories. The first selector (S
ELl), 4 and 5 are the first
and a second screen memory; 6 is a second selector (SEL2) that selects one of the image data stored in the two screen memories 4.5; 7 is a timing generation circuit that generates a horizontal synchronization signal and a vertical synchronization signal , 8 is a CRT that actually displays image data according to a timing signal, 9 is a write completion flag that notifies that the code expansion circuit 2 has finished converting image data for each screen, and 10 is a first and second selector. This is an inverter for operating 3.6 in opposite phase.

Next, the operation of this device will be explained. First, code data stored on the optical disc 1 is read out, and the code data is read out from the code expansion circuit 2.
is supplied to The code decompression circuit 2 decodes the data based on encoding rules and converts it into image data. The converted image data is passed through the selector 3 to the first . The image is supplied to one of the second image memories 4 and 5.

On the other hand, the code expansion circuit 2 generates a signal at the same time as decoding and every time decoding for one screen is completed, and a write end flag 9 is generated.
supply to. The write end flag 9 is a toggle switch, and is inverted every time the processing for one screen is completed. The output signal of the write end flag 9 is supplied to the selector 3 and also to the selector 6 via the inverter 10. By supplying signals of opposite phases to the write side selector 3 and the read side selector 6, the first . The second screen memory 4.5 can be alternately allocated for writing and reading for each screen.

Finally, the image data from the screen memory 4 or 5 in the readout phase is outputted to the CRT 8 via the selector 6. In the CRT 8, image data is displayed according to the horizontal synchronization signal and vertical synchronization signal output from the timing generation circuit 7.

As mentioned above, the device using the conventional technology has two screen memories for storing image data, and can alternately switch between them for display. Therefore, even in electronic filing devices with low image processing performance, it is possible to The leading edge of the image does not appear to be moving up and down repeatedly, and can be displayed without causing discomfort to the operator.

[Problems to be Solved by the Invention] In the above conventional technology, as described above, the screen memory alternately plays the role of writing and reading for each screen according to the write end signal output from the code expansion circuit. It is configured to be assigned. That is, since the one-screen processing end signal of the code expansion circuit is used to switch the display screen, it depends on the page turning (screen switching) time of image data or the processing speed of the code expansion circuit. For example, the expansion time of image data is 1.
If it is 0 seconds, it will take 1.0 seconds until the next page of image data is displayed. Therefore, as the image data expansion speed increases, the display cycle also becomes shorter.

On the other hand, the time required for humans to recognize displayed data varies from person to person, and is said to require at least a certain amount of time. Figure 3 shows the distribution of reaction times during page turning.
．． 1986).

As is clear from FIG. 3, the page turning speed in a filing device is required to be about 0.3 seconds to 1.0 seconds, and it varies by about three times depending on the individual. Therefore, it is desirable to be able to adjust the page turning speed according to the operator's abilities and preferences.

However, in reality, the processing speed of page turning in conventional electronic filing devices is slow and no consideration is given to speed regulating functions.

However, in recent years, as the expansion speed of image data has increased, a new problem has arisen in that the page turning speed exceeds the human recognition speed.

An object of the present invention is to provide a good man-machine interface suitable for each individual's cognitive speed, even for an image information display device equipped with an ultra-high-speed code decompression circuit.

[Means for Solving the Problems] In order to achieve the above object, the present invention provides code decompression means for reading code data stored in a storage device and decompressing the code data into image data, and the code decompression means. An image information display device comprising a screen memory into which image data is written, and display means for reading and displaying the image data from the screen memory, further comprising: a timer means for generating a signal of a constant period; The apparatus is characterized in that a delay means is provided for delaying a writing end signal of one screen's worth of image data to synchronize the start timing of writing one screen into the image memory with a fixed cycle of the timer means. .

Furthermore, the present invention provides code decompression means for reading code data stored in a storage device and decompressing the code data into image data, and a two-sided screen memory into which the image data from the code decompression means is written alternately. an image information display device comprising: a display means for alternately reading and displaying image data from the two screen memories; and a switching means for switching between writing and reading of the two screen memories; switching signal generating means for generating a switching signal for the switching means in response to completion of writing of one screen worth of image data from the means; a timer means for generating a signal at a constant cycle; and a delay means for delaying the switching signal.

Preferably, the fixed period of the timer means is variable by the operator. Further, means is provided for stopping the operation of the code expansion means during the delay period of the delay means. Alternatively, means is provided for stopping writing to the image memory during the delay period of the delay means.

1 Effect] The present invention is capable of adjusting the writing start timing of one screen of a single screen memory or switching between writing and reading of two screen memories regardless of the time required for decompression processing of encoded image data. By extending the period to match the desired constant period, the display period of image data (page turning time)
This allows for a good human-machine interface.

The timer means is, for example, a programmable timer, and the operator sets a desired period in the register according to the screen recognition time of each person.

Since the above code decompression means assumes an ultra-high speed circuit,
A constant periodic signal output from a programmable timer (
A writing completion (processing completion) signal for one screen worth of image data is output at a sufficiently earlier point in time than the carry output (carry output).

The switching signal generating means is, for example, a flag, and operates in a toggle manner (alternately inverting the output) in response to completion of writing of one screen worth of image data output from the code expanding means.

The delay means is, for example, a D-type flip-flop, and takes in the switching signal output from the switching signal generating means at the timing of the carry output of the timer means. That is, the delayed signal is delayed in accordance with the accelerated constant period. Therefore, the switching means alternately switches writing and reading of the two image memories at the constant period.

Further, the means for stopping the operation of the code expansion means is, for example, an EOR circuit that takes an exclusive OR of the output of the delay means and the switching signal, and during the delay period, the means for stopping the operation of the code expansion means is to supply a write inhibit signal. That is, since the delay means delays and supplies the same signal to the other input terminal of the EOR circuit which receives the switching signal at one input terminal, the two inputs are different only during the delay period.

Therefore, the code expansion means stops processing the next screen until the delay period has elapsed.

It may be possible to control the writing itself to the one-image memory to be stopped without stopping the operation of the code expansion means. In this case, the start address of one screen of image data in the storage device is respecified in accordance with the above-mentioned fixed period.

By repeating the above operations, when performing automatic page turning, the displayed image can be updated at a speed that suits the recognition time of the operator or at a speed that is preferred.

[Example 1] Hereinafter, an example of the present invention will be described with reference to the drawings. Here, an example having two screen memories will be described as a preferred embodiment.

FIG. 1 is a block diagram of one embodiment according to the present invention. Similar to the conventional device shown in FIG. 2, numeral 1 denotes an optical disk in which tens of thousands of images of image data are stored in encoded form, and 2 a code decompression circuit that decodes the encoded data read from the optical disk 1 into image data. , 3 is the decompressed image data 2
The first selector (SELI) selects which of the two screen memories to write to, 4 and 5 are the first and second screen memories that temporarily store image data to be displayed on the CRT, and 6 is the two screen memories. A second selector (SEL2) that selects which image data stored in the memory should be displayed.
, 7 is a timing generation circuit that generates a horizontal synchronization signal and a vertical synchronization signal for the CRT, 8 is a CRT that displays image data according to the timing signal, and 9 is a code expansion circuit 2, each time the image data for one screen is processed. The write completion flag, IO, which notifies this fact, is an inverter that operates the two selectors 3.6 in opposite phases. Furthermore, as components added in this embodiment, 11 is a programmable timer that measures the display cycle (page turning cycle) of image data on the CRT, and 12 is a programmable timer that latches the output of the write end flag 9 with the carry output of the programmable timer 11. A flip-flop (hereinafter referred to as F
13 is an EOR circuit that obtains a stop signal for the code expansion circuit from the write end flag 9 and the re-output of F F 12;
101 is a timer output signal line that transmits the carry output of the blog reset timer 11 to the T input of the FF 12; 102;
connects the output signal of the write end flag 9 to the D input of FF12 and the E
Write end flag output signal line 10 that is transmitted to the OR circuit 13
Reference numeral 3 designates a screen switching signal line for transmitting a switching signal for the selectors 3 and 6, and 104 a write inhibit signal line for transmitting a stop signal for the code expansion circuit 2.

Next, the operation of the device of this embodiment will be explained. First, the compressed code data stored on the optical disk l is read out,
The signal is supplied to the code expansion circuit 2. The encoded data stored here compresses the amount of information of image data input from a scanner etc. in order to increase the number of discs stored on the optical disc 1. Generally, the MH encoding method, MR or MMR encoding method is used.The encoding/expanding circuit 2 decodes the image based on these encoding rules and converts it into image data for one image. The converted image data is passed through selector 3 to
Among the screen memories 4 and 5 of the screen, the data is supplied to the one that is not currently being displayed.

On the other hand, the code expansion circuit 2 generates a signal at the same time as the decoding and every time the decoding of one stroke part is completed, and a write end flag 9 is generated.
supply to. The write end flag 9 is a toggle switch, and is inverted every time one screen's worth of processing is completed. Since the inversion cycle is assumed to be a high-speed code expansion circuit, it is sufficiently faster than the carry output from the programmable timer II. The output of the write end flag 9 is latched into the FF 12 as a carry output of the programmable timer 11 in order to synchronize with the output cycle of the programmer full timer 11. In order to stop the code expansion circuit 2 until the next cycle starts, an exclusive OR is performed by the EOR circuit 13 between the output of the write end flag 9 and the output of the FF 12, and the code expansion circuit 2 is A write protect signal is supplied. When the write inhibit signal is input, the code expansion circuit 2 stops its operation until the inhibit signal is released.

That is, after the code expansion circuit 2 finishes processing for one screen, it stops operating until the next page turn occurs according to the set value of the programmer's full timer 11.

More specifically, when the time set in the programmable timer 11 has elapsed, the output signal of the write end flag 9, which operates in a toggle state, is latched into F F 12. The latched output of F F 12 with inverted polarity is supplied to selectors 3 and 6 arranged before and after screen memory 4.5. The selector 3.6 is switched to the opposite phase via the inverter 10. At the same time, the write inhibit signal applied to the code expansion circuit 2 is canceled in accordance with the change in the output of the EOR 13, and the expansion process for the next screen is restarted. At the same time, the selector 6 on the reading side of the screen memory 4.5 is also switched, and the image data of the next screen stored in the screen memory 4 or 5 is supplied to the CRT 8. The CRT 8, which has received the image data for the next screen, displays the image data on the screen in accordance with the horizontal synchronization signal and vertical synchronization signal output from the 4-timing generation circuit 7.

FIG. 4 is a timing chart of the page turning cycle control circuit according to the present invention. Signal lot to 1 in Fig. 4
04 corresponds to the signal on the signal line in FIG. The timer output signal 101 rises according to an arbitrary cycle set in the programmable timer 11, and in order to synchronize the cycle of the write end flag output signal 102, the T of the FF 12 is set.
input to the terminal.

The screen switching signal 103 synchronized by the FF 12 is input to the selector 3 and also to the selector 6 via the inverter 10. On the other hand, write end flag output signal 10
In order to stop the code expansion circuit 2 from when 2 is output to when the next timer output signal 101 is output, the write end flag output signal 102 and the screen switching signal 103 are exclusive-ORed. A write inhibit signal 104 is generated. Here, the period of the write completion flag output signal 102 is not constant because it depends on the expansion time or the nature of the image data. That is, in general encoding systems, the expansion time does not take a constant value with respect to the size of image data, and the expansion time tends to be short for image data of simple designs.

Repeating the above operations increases the operator's recognition time.

As described above, even if the code decompression circuit speeds up as technology advances, the display cycle of one image data (page turning cycle) can be maintained at a good man-machine interface.

[Effects of the Invention] As explained above, according to the present invention, in an electronic file link device that displays image data stored on an optical disk, etc., a programmable timer is provided so that the switching cycle of the display double buffer can be arbitrarily set. I made it. As a result, the page turning speed on the CRT can be adjusted to the reaction characteristics of the individual operator, which is extremely effective in electronic filing devices and the like that require a good man-machine interface.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure is a block diagram showing a known example, and FIG. 3 is a Grank chart showing the distribution of reaction times in page turning. 1... Optical disk 2... Code expansion circuit 3...
・First selector 4...First screen memory 5...Second screen memory 6...Second selector 7...Timing generation circuit 8...CRT (display) 9...Writing end flag 10... Inverter circuit 11... Programmer full timer 12... Flip-flop 13... EOR circuit 101... Programmer full timer output signal line] 02
...Writing end flag output signal line 103...Screen switching signal line 104...Writing inhibit signal line Applicant Hitachi, Ltd. Representative Patent Attorney Tomi 1) Kazuko

Claims (1)

[Scope of Claims] 1. Code decompression means for reading code data stored in a storage device and decompressing the code data into image data; and a screen memory into which the image data from the code decompression means is written.
An image information display device comprising display means for reading image data from the screen memory and displaying the image data, further comprising: a timer means for generating a signal at a constant period; and a writing end signal for one screen worth of image data from the code expansion means. An image information display device comprising a delay means for delaying the start timing of writing one screen into the image memory to match the fixed cycle of the timer means. 2. A code expansion means for reading code data stored in a storage device and expanding the code data into image data; and a two-sided screen memory into which image data from the code expansion means is written alternately; In an image information display device comprising display means for alternately reading and displaying image data from the screen memory of one side and switching means for switching between writing and reading of the screen memory of the two sides, switching signal generating means for generating a switching signal for the switching means in response to completion of writing of image data for one screen; timer means for generating a signal at a constant cycle; An image information display device comprising a delay means for delaying a switching signal. 3. The image information display device according to claim 1 or 2, wherein the fixed period of the timer means is variable depending on the operator. 4. Claim 1, further comprising means for stopping the operation of the code expansion means during the delay period of the delay means.
or the image information display device according to 2. 5. The image information display device according to claim 1 or 2, further comprising means for stopping writing in the image memory during a delay period of the delay means.