JPH01219548A - Substrate inspecting device - Google Patents

Substrate inspecting device

Info

Publication number
JPH01219548A
JPH01219548A JP4520688A JP4520688A JPH01219548A JP H01219548 A JPH01219548 A JP H01219548A JP 4520688 A JP4520688 A JP 4520688A JP 4520688 A JP4520688 A JP 4520688A JP H01219548 A JPH01219548 A JP H01219548A
Authority
JP
Japan
Prior art keywords
brightness
circuit
cumulative frequency
output
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4520688A
Other languages
Japanese (ja)
Inventor
Kazutoshi Iketani
池谷 和俊
Kunio Yoshida
邦男 吉田
Takehisa Tanaka
田中 武久
Hirokado Toba
鳥羽 広門
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4520688A priority Critical patent/JPH01219548A/en
Publication of JPH01219548A publication Critical patent/JPH01219548A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956Inspecting patterns on the surface of objects
    • G01N21/95684Patterns showing highly reflecting parts, e.g. metallic elements

Landscapes

  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

PURPOSE:To inspect a soldering part at a high speed with simple circuit constitution while the measurement accuracy is held constant by picking up an image of components of a printed board, extracting brightness information on the periphery of the soldering part, and finding a frequency distribution of brightness. CONSTITUTION:The soldered components 2 are lighted by a ring lighting equipment 4 and their image is picked up by a CCD camera 5, whose video signal is A/D-converted 6 and stored 7. Only an image of the periphery of the soldering part 3 is extracted 8 from a memory 7 by using data for the package arrangement of the components 2 according to the positions or brightness values, etc., within a constant range. The images (brightness value) are inputted to a brightness frequency calculating circuit 9 in order and classified by brightness level to find the frequency distribution of the brightness values, thereby outputting the frequencies of the respective grades. An integral frequency calculating circuit 11 integrates the frequencies of the respective grades of brightness in order to find an integral frequency distribution. This integral frequency value is compared with a reference value stored in a memory 13 by a comparator 13 to find the difference. It is decided 15 whether or not the soldering part 3 is normal from whether or not the output value (subtraction result) of the comparator 14 is within variance at the time of the setting of the reference value of a normal part.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、プリント基板上に半田付けされた部品を検査
する基板検査装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a board inspection device for inspecting components soldered on a printed circuit board.

従来の技術 従来、プリント基板上に半田付けされた部品の半田付は
部分の良/不良の検査は人間による目視検査に頼ってい
た。即ち、第4図に示すように、プリント基板41上に
半田付けされた部品42については、作業者43が、半
田付は部分44及びその近傍46におけろ輝き具合等か
ら半田付けの良/不良を検査していた。なお第4図にお
いて、(、)は半田付け、部分の上面図、(b)は同断
面図を示している。
BACKGROUND OF THE INVENTION Conventionally, inspection of parts soldered on a printed circuit board to determine whether the parts are good or bad has relied on visual inspection by humans. That is, as shown in FIG. 4, regarding a component 42 soldered on a printed circuit board 41, an operator 43 determines whether the soldering is good or not based on the brightness of a portion 44 and its vicinity 46. I was checking for defects. In FIG. 4, (,) shows a top view of the soldered portion, and (b) shows a cross-sectional view of the same.

発明が解決しようとする課題 しかし、製品の小型化や軽量化が進むにつれ、プリント
基板上の部品◇小型化や高密度実装化も、より一層進ん
できている。このような状況の中で、入間が高い検査精
度を保ちつつ非常に細かな部品の半田付は状態を、しか
も長時間検査し続けろことは困難に近い作業であること
は言うまでもなく、作業効率が低下してしまうなど目視
検査にも限界が生じてきている。
Problems to be Solved by the Invention However, as products become smaller and lighter, components on printed circuit boards are also becoming smaller and more densely packaged. Under these circumstances, it goes without saying that Iruma has to maintain high inspection accuracy while inspecting the soldering condition of very small parts, and that it is a difficult task to continuously inspect for a long time. There are limits to visual inspection as well, such as a decline in performance.

課題を解決するための手段 本発明は上記課題を解決するため、照明手段により照明
された部品を撮像する撮像手段と、撮像手段からの輝度
信号をA/D変換した後、この輝度情報を記憶する記憶
手段と、半田付部近傍の輝度情報を抽出する半田部画像
抽出回路と、輝度の度数分布を求める輝度度数計算回路
と、輝度の度数分布から半田付部の良/不良判別を行な
う不良判別回路で構成されているものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention includes an imaging means for taking an image of a component illuminated by an illumination means, and after A/D converting a luminance signal from the imaging means, storing this luminance information. a soldering part image extraction circuit for extracting luminance information near the soldered part; a luminance frequency calculation circuit for calculating the luminance frequency distribution; It consists of a discrimination circuit.

作用 本発明は半田付部近傍の輝度情報を抽出し、その輝度の
度数分布から自動的に半田付部の良/不良の判断を行な
うことにより、目視に依存していた半田付部の検査を省
力化し、かつ精度も低下することなく高速に検査を行な
うものである。
Function The present invention extracts brightness information near the soldered part and automatically determines whether the soldered part is good or bad based on the frequency distribution of the brightness, thereby eliminating the need for visual inspection of the soldered part. This saves labor and performs inspections at high speed without reducing accuracy.

実施例 第1図は本発明の基板検査装置の第1の実施例を示すブ
ロック構成である。第1図において、1はプリント基板
、2はプリント基板1に半田付けされている部品、3は
その半田付は部分、4は部品2を照明するリング照明器
、6は部品2を撮像するビデオカメラ(CODカメラ)
、6はビデオカメラ6で撮像した部品2の映像(輝度)
信号を8ビツトのデジタル画像情報に変換するA/Dコ
ンバータ、7はA/Dコンバータ6で変換された画像情
報を記憶する画像メモリ、8は画像メモリ7から部品2
0半田付部3の近傍の輝度情報を抽出する半田部画像抽
出回路、9は抽出された半田付部近傍の輝度情報を用い
て度数分布を求める輝度度数計算回路である。10は輝
度度数計算回路9からの出力である輝度の度数分布から
半田付部3の良/不良判別を行なう不良判別回路であり
、11は輝度の度数分布から累積度数を計算する累積度
数計算回路、12は累積度数比較回路、13は良否判定
用の基準値が設定しであるメモリ、14は比較器、16
は半田不良判定回路、16は判定表示回路である。
Embodiment FIG. 1 is a block diagram showing a first embodiment of the substrate inspection apparatus of the present invention. In FIG. 1, 1 is a printed circuit board, 2 is a component soldered to the printed circuit board 1, 3 is the soldering part, 4 is a ring illuminator that illuminates the component 2, and 6 is a video camera that images the component 2. Camera (COD camera)
, 6 is the image (luminance) of part 2 captured by video camera 6
An A/D converter that converts the signal into 8-bit digital image information; 7 is an image memory that stores the image information converted by the A/D converter 6; 8 is a component 2 from the image memory 7;
0 is a solder part image extraction circuit that extracts brightness information in the vicinity of the soldered part 3; 9 is a brightness frequency calculation circuit that calculates a frequency distribution using the extracted brightness information in the vicinity of the soldered part. Reference numeral 10 denotes a defective determination circuit that determines whether the soldered portion 3 is good or bad based on the brightness frequency distribution output from the brightness frequency calculation circuit 9, and 11 is a cumulative frequency calculation circuit that calculates the cumulative frequency from the brightness frequency distribution. , 12 is a cumulative frequency comparison circuit, 13 is a memory in which a reference value for quality judgment is set, 14 is a comparator, 16
1 is a solder defect determination circuit, and 16 is a determination display circuit.

以下その動作を説明する。The operation will be explained below.

プリント基板1上に半田付部3により半田付けされてい
る部品2をリング照明器4で照明し、その照明された部
品2をCCDカメラ6で撮像する。
A component 2 soldered onto a printed circuit board 1 by a soldering part 3 is illuminated by a ring illuminator 4, and an image of the illuminated component 2 is captured by a CCD camera 6.

この時、リング照明と部品との間隔は約sown、CO
Dカメラ′6の視野は約30n角位になるように設定し
た。リング照明の明るさとカメラの絞りの関係は、画面
の一番輝度の高い場所がCCDカメラ6の感度の最大値
を越えないように設定した。
At this time, the distance between the ring light and the parts is approximately sown, CO
The field of view of D camera '6 was set to approximately 30n angle. The relationship between the brightness of the ring illumination and the aperture of the camera was set so that the brightest point on the screen did not exceed the maximum sensitivity of the CCD camera 6.

CCDカメラ6で撮像した映像信号を8ビツトのk /
 Dコンバータeで0〜265の範囲でデジタル画像(
輝度値)に変換し、画像メモリ7に記憶する。記憶した
画像の中から、部品の実装配置用データ(例えば、チッ
プマウンターからの2次元配置用マウントデータ)を用
いて、半田付部近傍の画像(30X30画素)のみを位
置、あるいは−定範囲の輝度値等から半田部画像抽出回
路8で抽出する。抽出した画像(輝度値)を順次輝度度
数計算回路9に入力し、ここで輝度レベルで64個の階
級に分類し、半田付部近傍の輝度値の度数分布を求め、
各階級の度数を出力する。
The video signal captured by the CCD camera 6 is converted into an 8-bit k/
Digital images in the range of 0 to 265 with D converter e (
brightness value) and stored in the image memory 7. From the stored images, use data for component mounting and placement (for example, mount data for two-dimensional placement from a chip mounter) to position only the image (30 x 30 pixels) near the soldering area or within a certain range. The solder part image extraction circuit 8 extracts the solder part image from the brightness value and the like. The extracted images (brightness values) are sequentially input to the brightness frequency calculation circuit 9, where they are classified into 64 classes based on brightness level, and the frequency distribution of brightness values near the soldered area is determined.
Output the frequency of each class.

輝度度数計算回路9から出力する度数分布の状態から、
不良判別回路1oで半田付部の良/不良を判別し、判定
表示回路15で良/不良の表示を行なうとともに、再び
半田部画像抽出回路8で次の検査部品の画像を抽出し、
検査・判定を続ける。
From the state of the frequency distribution output from the brightness frequency calculation circuit 9,
The defect determination circuit 1o determines whether the soldered part is good or bad, and the judgment display circuit 15 displays whether the soldered part is good or bad, and the soldered part image extraction circuit 8 again extracts an image of the next inspection component.
Continue inspection and judgment.

以上の動作の中で、不良判別回路10について更に詳し
く説明する。不良判別回路10は、累積度数計算回路1
1と累積度数比較回路12から構成されている。累積度
数計算回路11では、輝度度数計算回路9から出力する
、輝度の各階級の度数を順に累積加算して累積度数分布
を求める。その累積度数分布と良否判定用の基準値とを
比較して良/不良の判定を累積度数比較回路12で行な
う。
Among the above operations, the defect determination circuit 10 will be explained in more detail. The defect determination circuit 10 includes a cumulative frequency calculation circuit 1
1 and a cumulative frequency comparison circuit 12. The cumulative frequency calculation circuit 11 sequentially cumulatively adds the frequencies of each luminance class output from the luminance frequency calculation circuit 9 to obtain a cumulative frequency distribution. A cumulative frequency comparison circuit 12 compares the cumulative frequency distribution with a standard value for determining pass/fail and determines whether the product is good or bad.

次に、累積度数計算回路11からの出力結果を第2図に
示す。第2図において横軸が64個に分類された階級、
縦軸が階級に対応して出力された輝度の累積度数である
。この累積度数計算回路11によって、半田付部の良/
不良の特徴を明確に区別することができる。即ち、第2
図に示した様に、半田付部の裏部の所の画像の場合は、
輝度の高い部分が多いため実線21で示した様な累積度
数分布となる。ところが、半田付部の不良の所の画像の
場合は、輝度の暗い部分が多いため破線2oで示した様
な累積度数分布となる。このように、累積度数分布の状
態で半田付部の良否を区別することができる。
Next, the output results from the cumulative frequency calculating circuit 11 are shown in FIG. In Fig. 2, the horizontal axis is classified into 64 classes,
The vertical axis represents the cumulative frequency of brightness output corresponding to the class. This cumulative frequency calculation circuit 11 determines whether the soldering part is good or not.
Characteristics of defects can be clearly distinguished. That is, the second
As shown in the figure, if the image is of the back of the soldered part,
Since there are many parts with high brightness, the cumulative frequency distribution is as shown by the solid line 21. However, in the case of an image of a defective soldered part, there are many parts with dark brightness, so that the cumulative frequency distribution is as shown by the broken line 2o. In this way, it is possible to distinguish between good and bad soldered parts based on the state of the cumulative frequency distribution.

この累積度数計算回路11の出力から累積度数比較回路
12で半田付部の良否を判定する。累積度数比較回路1
2の構成及び動作は、本実施例の場合、まず累積度数計
算回路11から出力する各階級の累積度数値と、メモリ
13に設定しである基準値とを比較器14で比較・減算
する。なお基準値は、予め基準となる半田付部の裏部の
画像について輝度の累積度数値を階級ごとに設定してお
く。
Based on the output of the cumulative frequency calculating circuit 11, the cumulative frequency comparing circuit 12 determines whether the soldered portion is good or bad. Cumulative frequency comparison circuit 1
In the case of the present embodiment, the comparator 14 first compares and subtracts the cumulative frequency value of each class outputted from the cumulative frequency calculation circuit 11 with a reference value set in the memory 13. Note that the reference value is set in advance for each class as a cumulative luminance value for an image of the back side of the soldered portion serving as the reference.

そして半田不良判定回路16で、比較器14の出力値(
減算結果)が裏部の基準値設定時のばらつきの中に入っ
ているかどうかで半田付部の良/不良を判定する。この
ように輝度度数計算回路9、累積度数計算回路11及び
累積度数比較回路12により、第2図に示したような良
/不良による輝度の累積度数分布の形の違いを明確に区
別し、良/不良を判別することができる・ なお、比較器14での累積度数値の比較・減算は、度数
分布の階級全てについて行なっても良いが、計算時間の
短縮の為、第2図で示したように、裏部/不良部の累積
度数分布において最も特徴の差が著しくなる付近D26
の10〜20階級程度において比較するのが、検査スピ
ード及び検査精度の面で好ましい。
Then, in the solder defect determination circuit 16, the output value of the comparator 14 (
It is determined whether the soldered part is good or bad based on whether the subtraction result) is within the variation when setting the reference value on the back side. In this way, the luminance frequency calculation circuit 9, the cumulative frequency calculation circuit 11, and the cumulative frequency comparison circuit 12 clearly distinguish the shape of the luminance cumulative frequency distribution between good and defective as shown in FIG. /Defects can be determined. Although the comparison and subtraction of the cumulative frequency values in the comparator 14 may be performed for all classes of the frequency distribution, in order to shorten the calculation time, As shown in FIG.
It is preferable to compare in about 10 to 20 classes from the viewpoint of inspection speed and inspection accuracy.

また輝度を分類した階級の数も、本発明を何ら限定する
ものではないが、検査スピード及び検査精度の点から、
階級の数は10〜200程度が望ましい。
Furthermore, the number of classes into which luminance is classified does not limit the present invention in any way, but from the viewpoint of inspection speed and inspection accuracy,
The number of classes is preferably about 10 to 200.

以上の様に本実施例においては、目視検査に頼っていた
半田付部の良/不良検査を、照明器4、ビデオカメラ6
及び輝度度数計算回路9等の構成により自動的に実行す
ることができ、精度一定で長時間かつ高速に検査を続け
ることができる。
As described above, in this embodiment, the quality/deficiency inspection of soldered parts, which had previously relied on visual inspection, can be performed using the illuminator 4 and the video camera 6.
With the configuration of the brightness frequency calculation circuit 9 and the like, it can be executed automatically, and the inspection can be continued for a long time and at high speed with constant accuracy.

なお、本実施例で用いたリング照明器4及びCCDカメ
ラ5は本発明を何ら限定するものではなく、他の照明器
やビデオカメラでもよい。
Note that the ring illuminator 4 and CCD camera 5 used in this embodiment do not limit the present invention in any way, and other illuminators or video cameras may be used.

また不良判別回路1oでは、輝度度数計算回路9から出
力される度数分布を累積度数計算回路11で累積度数分
布に交換して基準値と比較しているが、輝度度数計算回
路9から出力されろ度数分布の形を直接基準値と比較し
てもよく、良/不良の判別を同様に行なうことができる
In the defect determination circuit 1o, the frequency distribution output from the brightness frequency calculation circuit 9 is exchanged with a cumulative frequency distribution in the cumulative frequency calculation circuit 11 and compared with a reference value. The shape of the frequency distribution may be directly compared with a reference value, and the determination of good/bad can be made in the same way.

以下、本発明の第2の実施例について説明する。A second embodiment of the present invention will be described below.

第3図は、本発明の第2の実施例における基板検査装置
のブロック構成を示すものである。第3図において、不
良判別回路1oのうちで累積度数比較回路12が、累積
度数加算回路31、基準値用メモリ32、比較器33及
び半田不良判定回路34で構成されているほかは第1図
に示したものと同一の構成であるため、第1図と同一の
番号を付して説明を省略し、以下、不良判別回路10の
動作を説明する。まず輝度度数計算回路9から出力され
る半田付部分の画像の輝度情報の度数分布を、累積度数
計算回路11aで累積度数分布へ変換する。この変換さ
れた累積度数分布の形状から、累積度数比較回路12で
良/不良の判定を行なう。
FIG. 3 shows a block configuration of a board inspection apparatus according to a second embodiment of the present invention. In FIG. 3, the cumulative frequency comparison circuit 12 of the defect determination circuit 1o is composed of a cumulative frequency addition circuit 31, a reference value memory 32, a comparator 33, and a solder defect determination circuit 34. Since the configuration is the same as that shown in FIG. 1, the same reference numerals as in FIG. 1 are given and the explanation will be omitted, and the operation of the defect determination circuit 10 will be explained below. First, the frequency distribution of the luminance information of the image of the soldered portion outputted from the luminance frequency calculation circuit 9 is converted into a cumulative frequency distribution by the cumulative frequency calculation circuit 11a. Based on the shape of the converted cumulative frequency distribution, the cumulative frequency comparison circuit 12 determines whether it is good or bad.

累積度数比較回路12では、まず累積度数計算回路11
aから出力する各階級の累積度数を累積度数加算回路3
1で全て加算し合計値を出力する。
In the cumulative frequency comparison circuit 12, first, the cumulative frequency calculation circuit 11
A cumulative frequency adding circuit 3 outputs the cumulative frequency of each class from a.
1 adds them all and outputs the total value.

その合計値とメモリ32に設定しである基準値とを比較
器33で比較・減算する。なお基準値は、予め複数の半
田付部の裏部の画像について輝度の累積度数を加算合計
した平均値を設定しておく。
A comparator 33 compares and subtracts the total value from a reference value set in the memory 32. Note that the reference value is set in advance as an average value obtained by adding and totaling the cumulative frequencies of brightness for images of the back side of a plurality of soldered parts.

そして最後に半田不良判定回路34で、比較器33の出
力値(減算結果)が裏部の基準値設定時のばらつきの中
に入っているかどうかで半田付部の良/不良を判定する
。このように累積度数加算回路31により、第2図にお
いて示したように、半田付部の裏部の場合斜線領域(O
BC)の面積に相当する値が計算され、不良部の場合領
域0ABOの面積に相当する値が計算・出力される。
Finally, the solder defect determination circuit 34 determines whether the soldered portion is good or defective based on whether the output value (subtraction result) of the comparator 33 falls within the variation when setting the reference value on the back side. In this way, the cumulative frequency addition circuit 31 calculates the diagonal area (O
A value corresponding to the area of area BC) is calculated, and in the case of a defective part, a value equivalent to the area of area 0ABO is calculated and output.

以上の様に本実施例においては、累積度数加算回路31
を設けろことにより、度数分布の良/不良による形状の
違いを累積度数分布の面積に相当する数値で表わし、よ
り一層明確に良/不良を区別することができ、第1の実
施例と同様の効果が得られろ。
As described above, in this embodiment, the cumulative frequency addition circuit 31
By providing this, the difference in shape due to good/bad frequency distribution can be represented by a numerical value corresponding to the area of the cumulative frequency distribution, and it is possible to more clearly distinguish between good and bad, which is similar to the first embodiment. Get the effect.

発明の効果 以上述べてきたように本発明によれば、照明手段と撮像
手段と、撮像手段からの輝度信号をA/D変換し記憶す
る手段と、半田部画像抽出回路と、輝度度数計算回路と
、不良判別回路とから構成される。比較的簡易な回路構
成で、人間の目視検査に頼ることなく、半田付部分の検
査を高速にかつ測定精度を一定に保ったまま行なうこと
ができ、検査の自動化や作業効率の向上という多大な効
果を得ることができる。
Effects of the Invention As described above, according to the present invention, an illumination means, an imaging means, a means for A/D converting and storing a luminance signal from the imaging means, a solder part image extraction circuit, and a luminance frequency calculation circuit are provided. and a defect determination circuit. With a relatively simple circuit configuration, soldered parts can be inspected at high speed and with constant measurement accuracy without relying on human visual inspection, resulting in significant automation of inspection and improved work efficiency. effect can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例における基板検査装置の
ブロック結線図、第2図は第1図の累積度数計算回路の
計算結果を示した図、第3図は本発明の第2の実施例に
おけろ基板検査装置のブロック結線図、第4図(a)は
従来の目視検査における半田付部の上面図、第4図(b
)は同縦断面図である。 1・・プリント基板、2・・・部品、3・・半田付部、
4・・照明器、6・・CCDカメラ、6・・・A/Dコ
ンバータ、7・・・画像メモリ、8・・半田部画像抽出
回路、9・・輝度度数計算回路、10・・不良判別回路
、11  ・累積度数計算回路、12・・累積度数比較
回路、13・・・メモリ、14・・比較器、31・・累
積度数加算回路。 代理人の氏名 弁理士 中 尾 敏 男 はが1名第 
1 図 第2図 第3図
FIG. 1 is a block diagram of a board inspection apparatus according to the first embodiment of the present invention, FIG. 2 is a diagram showing calculation results of the cumulative frequency calculation circuit of FIG. 1, and FIG. FIG. 4(a) is a block diagram of the circuit board inspection apparatus in the embodiment of the present invention, and FIG. 4(b) is a top view of the soldered part in the conventional visual inspection.
) is a longitudinal sectional view of the same. 1... Printed circuit board, 2... Parts, 3... Soldering part,
4...Illuminator, 6...CCD camera, 6...A/D converter, 7...Image memory, 8...Solder part image extraction circuit, 9...Brightness frequency calculation circuit, 10...Failure determination Circuit, 11. Cumulative frequency calculation circuit, 12.. Cumulative frequency comparison circuit, 13.. Memory, 14.. Comparator, 31.. Cumulative frequency addition circuit. Name of agent: Patent attorney Toshio Nakao Haga 1st person
1 Figure 2 Figure 3

Claims (6)

【特許請求の範囲】[Claims] (1)プリント基板上に配置・半田付けされた部品を照
明する照明手段と、前記照明手段により照明された前記
部品を撮像する撮像手段と、前記撮像手段より出力され
る画像信号を量子化するA/D変換器と、前記A/D変
換器により変換された画像情報を記憶する記憶手段と、
前記画像情報の中から前記部品の半田付部近傍の輝度情
報を抽出する半田部画像抽出回路と、抽出された前記半
田付部近傍における輝度情報の度数分布を求める輝度度
数計算回路と、前記輝度度数計算回路からの出力である
輝度の度数分布から前記半田付部の良/不良判別を行な
う不良判別回路とを具備する基板検査装置。
(1) An illumination means for illuminating components placed and soldered on a printed circuit board, an imaging means for imaging the components illuminated by the illumination means, and quantization of an image signal output from the imaging means. an A/D converter; storage means for storing image information converted by the A/D converter;
a solder part image extraction circuit that extracts brightness information near the soldered part of the component from the image information; a brightness frequency calculation circuit that calculates a frequency distribution of the extracted brightness information in the vicinity of the soldered part; A board inspection device comprising: a defect determination circuit that determines whether the soldered portion is good or defective based on the frequency distribution of brightness output from the frequency calculation circuit.
(2)不良判別回路が、輝度度数計算回路から出力され
る輝度の度数と良否判定用の基準値とを比較する比較器
と、前記比較器の出力から半田付部の良/不良を判定す
る半田不良判定回路とから構成されていることを特徴と
する請求項1記載の基板検査装置。
(2) A defect determination circuit includes a comparator that compares the brightness frequency output from the brightness frequency calculation circuit with a standard value for determining pass/fail, and determines whether the soldered part is good or bad based on the output of the comparator. 2. The board inspection apparatus according to claim 1, further comprising a solder defect determination circuit.
(3)不良判別回路が、輝度度数計算回路から出力され
る輝度の度数の累積分布を求める累積度数計算回路と、
前記累積度数計算回路からの出力である輝度の累積度数
分布から半田付部の良/不良判別を行なう累積度数比較
回路で構成されていることを特徴とする請求項1記載の
基板検査装置。
(3) a cumulative frequency calculation circuit in which the defect determination circuit calculates a cumulative distribution of brightness frequencies output from the brightness frequency calculation circuit;
2. The board inspection apparatus according to claim 1, further comprising a cumulative frequency comparison circuit that determines whether a soldered portion is good or bad based on the cumulative frequency distribution of luminance output from the cumulative frequency calculation circuit.
(4)累積度数比較回路が、累積度数計算回路から出力
される輝度の累積度数値と、良否判定用に予め設定され
ている基準値とを比較する比較器と、前記比較器の出力
から半田付部の良/不良を判定する半田不良判定回路と
から構成されていることを特徴とする請求項3記載の基
板検査装置。
(4) The cumulative frequency comparison circuit includes a comparator that compares the cumulative luminance value output from the cumulative frequency calculation circuit with a reference value preset for pass/fail determination, and a solder from the output of the comparator. 4. The board inspection apparatus according to claim 3, further comprising a solder defect determination circuit for determining whether the attached portion is good or defective.
(5)累積度数比較回路が、累積度数計算回路から出力
される輝度の累積度数を加算する累積度数加算回路と、
前記累積度数加算回路の出力である加算結果と良否判定
用の基準値とを比較する比較器と、前記比較器の出力か
ら半田付部の良/不良を判定する半田不良判定回路とか
ら構成されていることを特徴とする請求項3記載の基板
検査装置。
(5) a cumulative frequency addition circuit in which the cumulative frequency comparison circuit adds the cumulative frequency of luminance output from the cumulative frequency calculation circuit;
It is comprised of a comparator that compares the addition result, which is the output of the cumulative frequency addition circuit, with a reference value for pass/fail judgment, and a solder defect judgment circuit that judges whether the soldered part is good or bad from the output of the comparator. 4. The board inspection apparatus according to claim 3, wherein:
(6)良否判定用の基準値が、半田付良品部近傍の輝度
情報を用いて予め計算し、設定されていることを特徴と
する請求項2、4、6いずれか記載の基板検査装置。
(6) The board inspection apparatus according to any one of claims 2, 4, and 6, wherein the reference value for quality determination is calculated and set in advance using brightness information in the vicinity of the non-defective soldered part.
JP4520688A 1988-02-26 1988-02-26 Substrate inspecting device Pending JPH01219548A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4520688A JPH01219548A (en) 1988-02-26 1988-02-26 Substrate inspecting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4520688A JPH01219548A (en) 1988-02-26 1988-02-26 Substrate inspecting device

Publications (1)

Publication Number Publication Date
JPH01219548A true JPH01219548A (en) 1989-09-01

Family

ID=12712794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4520688A Pending JPH01219548A (en) 1988-02-26 1988-02-26 Substrate inspecting device

Country Status (1)

Country Link
JP (1) JPH01219548A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004286584A (en) * 2003-03-20 2004-10-14 Hitachi Kokusai Electric Inc Apparatus for inspecting defect

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004286584A (en) * 2003-03-20 2004-10-14 Hitachi Kokusai Electric Inc Apparatus for inspecting defect

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