JPH01211996A - Circuit board structure - Google Patents
Circuit board structureInfo
- Publication number
- JPH01211996A JPH01211996A JP3628388A JP3628388A JPH01211996A JP H01211996 A JPH01211996 A JP H01211996A JP 3628388 A JP3628388 A JP 3628388A JP 3628388 A JP3628388 A JP 3628388A JP H01211996 A JPH01211996 A JP H01211996A
- Authority
- JP
- Japan
- Prior art keywords
- insulating board
- layer wiring
- thickness
- conductor
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims description 26
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Non-Insulated Conductors (AREA)
Abstract
Description
【発明の詳細な説明】
「産業上の利用分野」
この発明は、多層基板の内層配線の電気抵抗を低減する
ことができる回路基板構造に関するものである。DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a circuit board structure that can reduce the electrical resistance of inner layer wiring of a multilayer board.
「従来の技術」
従来、内層配線を有する多層基板は、各層の基板の上に
、印刷技術により所望の配線を設け、これを必要な枚数
用意し、これらを熱圧着によって一体に成形することに
よって構成されている。例えば、第３図は、絶縁基板！
、２．３と、内層配線４とからなる多層基板５であり
、第４図に示すように、第２７！１目の絶縁基板２上に
、内層配線４として機能する導体層を印刷技術によって
設け、その上に第１層目の絶縁基板ｌを熱圧着し、同様
にして第３Ｔ！Ｊ目の絶縁基板３を熱圧着することによ
って構成されている。``Prior art'' Conventionally, multilayer boards with inner layer wiring are produced by providing desired wiring on each layer of the board using printing technology, preparing the required number of sheets, and molding them together by thermocompression bonding. It is configured. For example, Figure 3 shows an insulated substrate!
, 2.3, and an inner layer wiring 4.As shown in FIG. A third T! It is constructed by thermocompression bonding the Jth insulating substrate 3.
「発明が解決しようとする課題」
ところで、内層配線４が形成された部分は、この配線４
が形成されていない部分に比べ、配線４の膜厚分だけ厚
みが増し、この厚みが過大となると、熱圧着時において
、絶縁基板１．２．３にストレスによる割れや歪が生じ
てしまう。このため、内層配線４の膜厚は、各基板１．
２．３の厚さのｌ／１０以下であることが望ましい。し
かしながら、各基板１．２．３の厚さを変えずに、層数
を増やした場合、当然のことながら、内層配線４の膜厚
を薄くしなけばならず、このように膜厚を薄くする・と
、電気抵抗が高くなって、内層配線４の電気特性を悪化
させてしまうという問題があった。"Problem to be Solved by the Invention" By the way, the portion where the inner layer wiring 4 is formed is
The thickness is increased by the film thickness of the wiring 4 compared to the part where the wiring 4 is not formed, and if this thickness becomes excessive, cracks or distortions due to stress will occur in the insulating substrate 1.2.3 during thermocompression bonding. Therefore, the film thickness of the inner layer wiring 4 is different for each substrate 1.
It is desirable that the thickness be 1/10 or less of the thickness of 2.3. However, if the number of layers is increased without changing the thickness of each substrate 1, 2, 3, the thickness of the inner layer wiring 4 must be reduced. Then, there was a problem in that the electrical resistance increased and the electrical characteristics of the inner layer wiring 4 deteriorated.
この発明は上述した事情に鑑みてなされたもので、多層
基板の内層配線の電気抵抗を低減することができる回路
基板構造を提供することを目的としている。The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a circuit board structure that can reduce the electrical resistance of inner layer wiring of a multilayer board.
「課題を解決するための手段」
この発明は、多層基板を構成する各絶縁基板に所望の配
線パターンと同一形状のＦＩＦｒ部を形成し、該溝部内
に内層配線として機能する導体を充填したことをを特徴
としている。"Means for Solving the Problems" The present invention provides a method in which an FIFr portion having the same shape as a desired wiring pattern is formed on each insulating substrate constituting a multilayer substrate, and a conductor functioning as an inner layer wiring is filled in the groove. It is characterized by.
「作用」
絶縁基板に形成された溝部内に充填される導体の厚さを
、各絶縁基板の厚さと同程度にすることができ、これに
より、電気抵抗の低い内層配線が形成され、良好な電気
特性が得られる。``Function'' The thickness of the conductor filled in the grooves formed in the insulating substrate can be made to be approximately the same as the thickness of each insulating substrate, thereby forming inner layer wiring with low electrical resistance and providing good performance. Electrical properties can be obtained.
「実施例」
以下、図面を参照し、この発明の実施例について説明す
る。"Embodiments" Hereinafter, embodiments of the present invention will be described with reference to the drawings.
第１図はこの発明の一実施例の構成を示す図である。こ
の図において、絶縁基板２には、所望の配線パターンと
同一形状の上下に貫通する溝穴２ａが形成されており、
この溝穴２ａの内に印刷技術により内層配線として機能
する導体６が充填され、これにより絶縁基板２と同じ厚
さ寸法の内層配線経露が形成される。この場合、第２図
に示すように、内層配線として機能する導体６を設けた
第２層目の絶縁基板２上に、第１Ｗ！Ｊ目の絶縁基板１
を熱圧若し、同様にして絶縁基板２の下方から第３層目
の絶縁基板３を熱圧若して、多層基板７が＋１が成され
る。FIG. 1 is a diagram showing the configuration of an embodiment of the present invention. In this figure, an insulating substrate 2 is formed with a vertically penetrating slot hole 2a having the same shape as a desired wiring pattern.
The slot 2a is filled with a conductor 6 which functions as an inner layer wiring by printing technology, thereby forming an inner layer wiring having the same thickness as the insulating substrate 2. In this case, as shown in FIG. 2, the first W! Jth insulating substrate 1
In the same manner, the third layer of insulating substrate 3 from below the insulating substrate 2 is heated and pressurized to form the multilayer substrate 7.
このような構造とすることにより、内層配線として機能
する導体６の膜厚を絶縁基板２の厚さ寸法と同じ厚さと
することができ、また熱圧着時に割れが生じたり、歪が
生じることがない多層基板７が構成できる。By adopting such a structure, the film thickness of the conductor 6 functioning as an inner layer wiring can be made the same as the thickness dimension of the insulating substrate 2, and cracks or distortions do not occur during thermocompression bonding. It is possible to construct a multilayer substrate 7 without any
なお、上述した一実施例においては、多層基板７の内部
層である絶縁基板２に溝穴２ａを形成して導体６を充填
したが、最上層の絶縁基板ｌもしくは最下層の絶縁基板
３に溝穴を形成し導体を充填する構造であっても勿論構
わない。In the above-mentioned embodiment, the groove hole 2a is formed in the insulating substrate 2, which is the inner layer of the multilayer substrate 7, and the conductor 6 is filled with the groove hole 2a. Of course, a structure in which a slot is formed and filled with a conductor may also be used.
「発明の効果」
以上説明したように、この発明によれば、多層基板を構
成する各絶縁基板に所望の配線パターンと同一形状の溝
部を形成し、該溝部内に内層配線として機能する導体を
充填する構造としたので、絶縁基板に形成された溝部内
に充填される導体の厚さを、各絶縁基板の厚さと同程度
とすることができ、これにより、例えば、層数を増やし
、各絶縁基板の厚さを薄くしなければならない場合にお
いても、これらを熱圧着する際に割れや歪が生じること
がなく、かつ電気抵抗が低い内層配線を形成することが
できるという効果が得られる。"Effects of the Invention" As explained above, according to the present invention, a groove having the same shape as a desired wiring pattern is formed in each insulating substrate constituting a multilayer substrate, and a conductor functioning as an inner layer wiring is placed in the groove. Since the conductor is filled in the groove formed in the insulating substrate, the thickness of the conductor filled in the groove can be made to be approximately the same as the thickness of each insulating substrate. Even when it is necessary to reduce the thickness of the insulating substrate, it is possible to achieve the effect that cracks and distortions do not occur when these are bonded by thermocompression, and inner layer wiring with low electrical resistance can be formed.
第１図はこの発明の一実施例の構成を示す斜視図、
第２図は同実施例の製造工程を説明するための正面図、
第３図は従来の内層配線を有する多層基板の構成を示す
斜視図、
第４図は従来の内層配線を有する多層基板の製造工程を
説明するための正面図である。
１．２．３・・・・・・絶縁基板、
２ａ・・・・・・溝穴（溝部）、
６・・・・・・導体。Fig. 1 is a perspective view showing the configuration of an embodiment of the present invention, Fig. 2 is a front view for explaining the manufacturing process of the same embodiment, and Fig. 3 shows the structure of a conventional multilayer board with inner layer wiring. FIG. 4 is a front view for explaining the manufacturing process of a conventional multilayer board having inner layer wiring. 1.2.3...Insulating substrate, 2a...Slot (groove), 6...Conductor.
Claims (1)
同一形状の溝部を形成し、該溝部内に内層配線として機
能する導体を充填したことを特徴とする回路基板構造。A circuit board structure characterized in that a groove having the same shape as a desired wiring pattern is formed in each insulating substrate constituting a multilayer board, and the groove is filled with a conductor functioning as an inner layer wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3628388A JPH01211996A (en) | 1988-02-18 | 1988-02-18 | Circuit board structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3628388A JPH01211996A (en) | 1988-02-18 | 1988-02-18 | Circuit board structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01211996A true JPH01211996A (en) | 1989-08-25 |
Family
ID=12465459
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3628388A Pending JPH01211996A (en) | 1988-02-18 | 1988-02-18 | Circuit board structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01211996A (en) |
-
1988
- 1988-02-18 JP JP3628388A patent/JPH01211996A/en active Pending
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