JPH01194713A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To easily select a pull-up resistance value by controlling a transistor for a pull-up resistor based on a control signal supplied to a switching terminal for a master mode and a slave mode. CONSTITUTION:Plural open drain terminals 6 are connected in parallel, and the terminals are connected to the input terminal 8 of a semiconductor integrated circuit 3 that is a host. And since only one pull-up resistor having the optimum resistance value which represents an OFF state is needed, only the pull-up resistor 13 in a semiconductor integrated circuit 2 in the master mode is connected, and pull-up to show the OFF state of a signal line 4 is performed. Also, when the open drain terminal 14 of a semiconductor integrated circuit 1 in the slave mode becomes active, a ratio goes to the one of the pull-up resistor 13 in the circuit 2 to an open drain output buffer 9 in the circuit 1, and low output is guaranteed by the optimum ratio between the resistors assembled in the inside.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor integrated circuit having open train terminals, and in particular, the terminals are interconnected and have a master-slave relationship with each other. The present invention relates to a semiconductor integrated circuit that serves as an input to a third semiconductor integrated circuit.

[Prior Art] Conventionally, an open toll-in output buffer 9 of a semiconductor integrated circuit has each output buffer terminal 6 as shown in FIG.
．． It is used, for example, when controlling the input terminal 8 on the host 3 side by driving a common signal supplied from the host 3 to calculate the overall logical sum.

At that time, one of the semiconductor integrated circuits that generates the logical sum has the function of master 2, and the others have the function of slave 1.
It has 0 functions.

[Problems to be Solved by the Invention] However, in order to notify the host semiconductor integrated circuit that the signal has been turned off, an external pull-up resistor 11 is required, and the resistance value is different from that of the semiconductor integrated circuit. The value must be such that a low level can be guaranteed by resistance division with the resistor of the oven-drill-in output buffer 9 inside, and the rising speed to a high level can also be ensured. Therefore, there is a drawback that selection of the pull-up resistor 11 is difficult.

[Means for Solving the Problems] The gist of the present invention is to provide a semiconductor comprising a plurality of semiconductor integrated circuits each functioning in master mode or slave mode and having open drain terminals connected in parallel to a common host input terminal. In the integrated circuit device, each semiconductor integrated circuit includes an output buffer transistor connected between an open drain terminal and a first voltage source, and a pull-up resistor connected between a second voltage source and the open drain terminal. The pull-up resistor transistor is controlled based on a control signal supplied to a master mode/slave mode switching terminal.

Therefore, the open drain output buffers of the present invention each have a pull-up resistor therein, and a control circuit that makes the pull-up resistor active only when the semiconductor integrated circuit is the master.

[Example code] Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. A plurality of open drain terminals 6 are connected in parallel, and the terminals are connected to an input terminal 8 of the host 3. Since one pull-up resistor with the optimum resistance value is required to indicate the OFF state, only the pull-up resistor 13 in the master semiconductor integrated circuit 2 is connected, and the signal line 4 is connected as a pull-up resistor to indicate the OFF state. will be done.

Also, when the oven train terminal 14 of slave 1 becomes active, the pull-up resistor 13 in master 1
and the ratio of the open drain output buffer 9 of the slave 1, and a low output is guaranteed by the optimum ratio between the internally built-in resistors.

FIG. 3 shows a second embodiment of the present invention, in which the control circuit 1
5 is added. Therefore, when the output terminal 6 of the master becomes active, there is an advantage that when the output buffer is active, the pull-up resistor 13 is disconnected and the signal line can fall more quickly. Further, when off, the signal line 4 is charged high by the pull-up resistor 13 in the master and transmitted to the input terminal 8 on the host side, so the signal line does not become floating.

As explained above, in the above embodiment, an external pull-up resistor is not required, leading to a reduction in the size of the mounting board of the semiconductor integrated circuit, and since the resistor is mounted on the semiconductor integrated circuit, there is no unnecessary resistance, making it ideal. It is possible to achieve a high switching speed, and as a synergistic effect, when the master becomes active, the output is not subtracted by the ratio, so you can expect an even faster speedup.

[Effects of the Invention] As explained above, according to the present invention, the pull-up resistance value can be easily selected and the speed can be increased.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional example, and FIG. 3 is a circuit diagram of a second embodiment. 1... Semiconductor integrated circuit in slave mode, 2...
... Semiconductor integrated circuit in master mode (1 and 2 are the same semiconductor integrated circuit) 3 ... Host semiconductor integrated circuit, 4 ... Signal line obtained by ORing open drain terminals, 5 ....Input signal for switching between master and slave, 6..Open drain output buffer terminal of master, 7..Terminal for switching between master and slave, 8..
...Host input terminal, 9...N-ch MOS open drain output cover buffer 0...P-ch MOS) transistor pull-up resistor, 11... Conventional pull-up resistor, 12. ...Inverter that switches between master and slave, 13... Master pull-up resistor, 14... Slave open train output buffer terminal, 15... Control circuit to disconnect pull-up resistor, 100... Power supply (second voltage source), 200...ground (first voltage source). Figure 2

Claims (1)

[Claims] In a semiconductor integrated circuit device consisting of a plurality of semiconductor integrated circuits each functioning in master mode or slave mode and having an open drain terminal connected in parallel to a common host input terminal, each semiconductor integrated circuit has an open drain terminal and an open drain terminal connected in parallel to a common host input terminal. It has an output buffer transistor connected between the first voltage source and a pull-up resistor transistor connected between the second voltage source and the open drain terminal, and has a terminal for switching between master mode and slave mode. 1. A semiconductor integrated circuit device that controls a pull-up resistor transistor based on a control signal supplied to the semiconductor integrated circuit device.