JPH01179620U - - Google Patents

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Publication number
JPH01179620U
JPH01179620U JP7621888U JP7621888U JPH01179620U JP H01179620 U JPH01179620 U JP H01179620U JP 7621888 U JP7621888 U JP 7621888U JP 7621888 U JP7621888 U JP 7621888U JP H01179620 U JPH01179620 U JP H01179620U
Authority
JP
Japan
Prior art keywords
variable gain
gain amplifier
amplifier circuit
constant current
differential pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7621888U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7621888U priority Critical patent/JPH01179620U/ja
Publication of JPH01179620U publication Critical patent/JPH01179620U/ja
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を説明するための可
変利得増幅回路図、第２図は従来の一例を説明す
るための可変利得増幅回路図である。 １１……差動対トランジスタ回路（差動対回路
）、ＩＮ１１，ＩＮ１２……入力端子、ＩＮｃ１
〜ＩＮｃｎ……制御端子、Ｑ１１，Ｑ１２，Ｑｓ
１〜Ｓｓｎ……バイポーラトランジスタ、Ｍ１〜
Ｍｎ，Ｍｓ……ＭＯＳトランジスタ、Ｒ１１，Ｒ
１２……抵抗、１１，１２……出力端子、Ｖ
ｃｃ……電源、ＧＮＤ……接地端子、Ｉｃ１……
定電流源、ＩＱ……動作電流。 FIG. 1 is a variable gain amplifier circuit diagram for explaining an embodiment of the present invention, and FIG. 2 is a variable gain amplifier circuit diagram for explaining a conventional example. 11... Differential pair transistor circuit (differential pair circuit), IN 11 , IN 12 ... Input terminal, IN c1
 ~IN cn ...Control terminal, Q11 , Q12 , Qs
1 ~S sn ...Bipolar transistor, M1 ~
M n , M s ...MOS transistor, R 11 , R
12 ...Resistance, 11 , 12 ...Output terminal, V
cc ...Power supply, GND...Grounding terminal, I c1 ...
Constant current source, IQ... operating current.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 差動増幅を行う差動対トランジスタのエミツタ
の共通接続点にオン・オフ可能な定電流源の出力
端子を複数個接続したことを特徴とする可変利得
増幅回路。 A variable gain amplifier circuit characterized in that a plurality of output terminals of constant current sources that can be turned on and off are connected to a common connection point of the emitters of differential pair transistors that perform differential amplification.
JP7621888U 1988-06-07 1988-06-07 Pending JPH01179620U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7621888U JPH01179620U (en) 1988-06-07 1988-06-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7621888U JPH01179620U (en) 1988-06-07 1988-06-07

Publications (1)

Publication Number Publication Date
JPH01179620U true JPH01179620U (en) 1989-12-22

Family

ID=31301259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7621888U Pending JPH01179620U (en) 1988-06-07 1988-06-07

Country Status (1)

Country Link
JP (1) JPH01179620U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566513A (en) * 1979-06-29 1981-01-23 Matsushita Electric Ind Co Ltd Signal level control circuit
JPS56110314A (en) * 1980-01-21 1981-09-01 Tektronix Inc Variable gain amplifier

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566513A (en) * 1979-06-29 1981-01-23 Matsushita Electric Ind Co Ltd Signal level control circuit
JPS56110314A (en) * 1980-01-21 1981-09-01 Tektronix Inc Variable gain amplifier

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