JPH01179352A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPH01179352A
JPH01179352A JP62332346A JP33234687A JPH01179352A JP H01179352 A JPH01179352 A JP H01179352A JP 62332346 A JP62332346 A JP 62332346A JP 33234687 A JP33234687 A JP 33234687A JP H01179352 A JPH01179352 A JP H01179352A
Authority
JP
Japan
Prior art keywords
pellet
trimming
accommodating window
window part
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62332346A
Other languages
Japanese (ja)
Inventor
Yuji Noda
野田 雄二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62332346A priority Critical patent/JPH01179352A/en
Publication of JPH01179352A publication Critical patent/JPH01179352A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve an electrical characteristic by a method wherein a pellet accommodating window part and a trimming-element accommodating window part are installed independently of each other in a package body and a pellet and a trimming element are accommodated in the respective accommodating window parts. CONSTITUTION:Two recessed parts are formed in a ceramic package body 1; one is constituted as a pellet accommodating window part 2 and the other as a trimming-element accommodating window part 3. A pellet 11 is mounted inside the pellet accommodating window part 2 and is connected to inner leads 4 arranged at the periphery of this window part 2 by using bonding wires 5. Trimming elements 12 which have been connected to individual electrodes 6 are mounted inside the trimming-element accommodating window 3. Through this constitution, the pellet 11 is accommodated inside the pellet accommodating window part 2 and is connected electrically; the pellet accommodating window part 2 is then sealed by using a cap; after that, the trimming elements 12 which have been accommodated inside the trimming-element accommodating window part 3 are trimmed. By this setup, a device can be made small-sized; a trimming operation can be executed properly; an electrical characteristic can be improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体集積回路装置に関し、特にそのパッケー
ジを改善した半導体集積回路装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device with an improved package.

〔従来の技術〕[Conventional technology]

従来の半導体集積回路装置におけるパッケージは、第3
図(a)及び(b)に平面図及びその正面図を示すよう
に、パッケージ本体21の中央部に設けたペレット収容
窓部22内にペレット11を収容し、パッケージ本体2
1の側面に突出された外部リード27に接続されている
内部リード24にペレット11をボンディングワイヤ2
5により電気的に接続している。このペレット収容窓部
22は、図外のキャップで封止している。
The package in a conventional semiconductor integrated circuit device is
As shown in the plan view and front view of FIGS.
Bonding wire 2
It is electrically connected by 5. This pellet storage window 22 is sealed with a cap (not shown).

一方、この種の半導体集積回路装置では、回路構成上の
要求により、半導体集積回路装置に接続する抵抗値、コ
ンデンサ容量値のトリミングを実施する必要がある場合
、外付の部品を使用し、この半導体集積回路装置を実装
するプリント基板上に構成していた。
On the other hand, in this type of semiconductor integrated circuit device, if it is necessary to trim the resistance value and capacitance value connected to the semiconductor integrated circuit device due to circuit configuration requirements, external parts are used to trim the capacitance value. It was constructed on a printed circuit board on which a semiconductor integrated circuit device was mounted.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の半導体集積回路装置は、抵抗値。 The conventional semiconductor integrated circuit device described above has a resistance value.

コンデンサ容量値等のトリミングを実施する場合には、
外付の部品を使用して半導体集積回路装置を実装するプ
リント基板上に構成する必要があるため、プリント基板
の面積が太き(なるという問題があった。また、ペレッ
トを電気的に動作させた状態でトリミングを行うことが
難しく、特性の向上を図ることが難しい。更に、抵抗値
、コンデンサの容量値に任意の温度係数が要求される場
合、ペレット上に構成するのは困難であり、やはりプリ
ント基板上に構成しなければならないという問題がある
When trimming the capacitance value, etc.,
Since it is necessary to use external parts to configure the semiconductor integrated circuit device on the printed circuit board, the area of the printed circuit board becomes large. It is difficult to perform trimming while the capacitor is in the same condition, and it is difficult to improve the characteristics.Furthermore, if an arbitrary temperature coefficient is required for the resistance value and the capacitance value of the capacitor, it is difficult to construct it on a pellet. There is still the problem that it must be constructed on a printed circuit board.

本発明は、抵抗やコンデンサ等を装置内に一体に構成で
き、特性の向上及び装置の小型化を達成することができ
る半導体集積回路装置を提供することを目的としている
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit device in which resistors, capacitors, etc. can be integrated into the device, thereby improving characteristics and downsizing the device.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体集積回路装置は、パッケージ本体にペレ
ット収容窓部とトリミング素子収容窓部を夫々独立して
設け、ペレット収容窓部内にはペレットを搭載して外部
リードとの電気接続を行い、トリミング素子収容窓部内
には抵抗、コンデンサ等のトリミング可能な素子を搭載
してペレット及び外部リードに夫々電気接続した構成と
している。
In the semiconductor integrated circuit device of the present invention, a pellet accommodating window and a trimming element accommodating window are independently provided in the package body, a pellet is mounted in the pellet accommodating window, electrical connection is made to an external lead, and trimming is performed. Trimmable elements such as resistors and capacitors are mounted inside the element housing window and are electrically connected to the pellet and external leads, respectively.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明をセラミックのフラットパッケージに適
用した一例を示しており、同図(a)は平面図、同図(
b)は正面図である。図において、セラミックからなる
パッケージ本体1には2つの凹部を形成し、一方をペレ
ット収容窓部2.他方をトリミング素子収容窓部3とし
て構成している。
Figure 1 shows an example in which the present invention is applied to a ceramic flat package.
b) is a front view. In the figure, a package body 1 made of ceramic has two recesses, one of which is a pellet storage window 2. The other side is configured as a trimming element accommodating window 3.

そして、ペレット収容窓部2内にはペレット11を搭載
し、この窓部2の周囲に配置した内部リード4にボンデ
ィングワイヤ5により接続している。
A pellet 11 is mounted inside the pellet housing window 2 and connected to an internal lead 4 disposed around the window 2 by a bonding wire 5.

また、トリミング素子収容部3内には、夫々電極6に接
続された抵抗や容量等のトリミング素子12を搭載して
いる。こ−れらのトリミング素子12は、例えばセラミ
ック本体1上に厚膜印刷技術或いは薄膜技術により構成
している。
Furthermore, trimming elements 12 such as resistors and capacitors each connected to the electrodes 6 are mounted in the trimming element accommodating portion 3 . These trimming elements 12 are constructed, for example, on the ceramic body 1 by thick film printing technology or thin film technology.

なお、前記内部リード4はパッケージ本体1の側面に突
出された外部リード7に電気接続され、或いは前記トリ
ミング素子収容部3の電極6に電気接続されている。ま
た、この電極6も外部リード7に電気接続されている。
Note that the internal lead 4 is electrically connected to an external lead 7 protruding from the side surface of the package body 1, or to an electrode 6 of the trimming element accommodating portion 3. Further, this electrode 6 is also electrically connected to an external lead 7.

この構成によれば、ペレット収容窓部2内にペレット1
1を収容し、かつ電気接続を行った上で、ペレット収容
窓部2を図外のキャップにより封止する。しかる後、ト
リミング素子収容窓部3に収容したトリミング素子12
のトリミングを行う。
According to this configuration, the pellets 1 are stored in the pellet storage window 2.
After accommodating the pellets 1 and making electrical connections, the pellet accommodating window 2 is sealed with a cap (not shown). After that, the trimming element 12 accommodated in the trimming element accommodation window 3
Perform trimming.

このトリミング作業はペレット11の組立作業後に行う
ため、ペレット11を電気的に動作させた状態において
機能トリミングを行うことが可能となる。また、トリミ
ング作業時、ペレット収容窓部2はキャップにより封止
しであるため、トリミング或いはサンドブラストトリミ
ング等の方法を使用してもペレット11は損傷を受ける
ことはない。
Since this trimming work is performed after the pellet 11 is assembled, the functional trimming can be performed while the pellet 11 is electrically operated. Further, during the trimming operation, since the pellet storage window 2 is sealed with a cap, the pellets 11 will not be damaged even if a method such as trimming or sandblasting trimming is used.

これらの技術を用いることによって、抵抗値、コンデン
サの容量値に任意の温度係数を持たせることが可能であ
る。また、このトリミング作業を実施した後、トリミン
グ素子収容窓部3をキャップ等により封止する。
By using these techniques, it is possible to give an arbitrary temperature coefficient to the resistance value and the capacitance value of the capacitor. Further, after performing this trimming work, the trimming element housing window 3 is sealed with a cap or the like.

これにより、この半導体集積回路装置用パッケージでは
、外付は部品を使用して同等機能を実現した場合と比較
して装置の小型化が可能となり、かつトリミングを好適
に行うことが可能となって電気特性の改善を図ることが
可能となる。
As a result, with this package for semiconductor integrated circuit devices, it is possible to make the device smaller compared to the case where the same function is achieved using external components, and it is also possible to perform trimming appropriately. It becomes possible to improve electrical characteristics.

第2図は本発明の他の実施例を示し、同図(a)は平面
図、同図(b)は正面図である。なお、第1図(a)及
び(b)と同一部分には同一符号を付しである。
FIG. 2 shows another embodiment of the present invention, in which FIG. 2(a) is a plan view and FIG. 2(b) is a front view. Note that the same parts as in FIGS. 1(a) and 1(b) are given the same reference numerals.

この実施例では、ペレット収容窓部2の両側に2個のト
リミング素子収容窓部3,3を設け、夫々にトリミング
素子12を収納させている。この実施例では、第1図の
実施例と同様の効果が得られるとともに、トリミング素
子収容窓部を2個に分割しているため、ペレット11と
トリミング素子12間の内部配線や、これらと外部リー
ド7との配線長さを短くでき、半導体集積回路装置の特
性劣化を防止できる効果がある。
In this embodiment, two trimming element accommodating windows 3, 3 are provided on both sides of the pellet accommodating window 2, and a trimming element 12 is housed in each. In this embodiment, the same effect as the embodiment shown in FIG. This has the effect of reducing the length of the wiring with the lead 7 and preventing deterioration of the characteristics of the semiconductor integrated circuit device.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、パッケージ本体にペレッ
ト収容窓部とトリミング素子収容窓部を夫々独立して設
け、夫々の収容窓部内にペレット及びトリミング素子を
収納しているので、ベレントの封止後にペレットを電気
的に動作させた状態において、トリミング素子の機能ト
リミングを行うことが可能となり、電気特性の改善を図
るとともに、外付は部品を使用して同等機能を実現した
場合と比較して装置の小型化を実現できる効果がある。
As explained above, in the present invention, the pellet housing window and the trimming element housing window are provided independently in the package body, and the pellets and trimming element are stored in the respective housing windows, so that it is possible to seal the berent. Later, when the pellet is electrically operated, it becomes possible to perform functional trimming of the trimming element, which improves the electrical characteristics and reduces the cost compared to when the same function is achieved using external components. This has the effect of making the device more compact.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)及び(b)は本発明の一実施例の平面図及
びその正面図、第2図(a)及び(b)は本発明の他の
実施例の平面図及び正面図、第3図(a)及び(b)は
従来の半導体集積回路装置゛の平面図及びその正面図で
ある。 1.21・・・パッケージ本体、2.22・・・ペレッ
ト収容窓部、3・・・トリミング素子収容窓部、 4゜
24・・・内部リード、5,25・・・ボンディングワ
イヤ、6・・・電極、7,27・・・外部リード、11
・・・ペレット、12・・・トリミング素子。 第1図 第2図 第3図 (b)
FIGS. 1(a) and (b) are a plan view and a front view of one embodiment of the present invention, FIGS. 2(a) and (b) are a plan view and a front view of another embodiment of the present invention, FIGS. 3(a) and 3(b) are a plan view and a front view of a conventional semiconductor integrated circuit device. 1.21... Package body, 2.22... Pellet accommodation window, 3... Trimming element accommodation window, 4゜24... Internal lead, 5, 25... Bonding wire, 6. ... Electrode, 7, 27 ... External lead, 11
... Pellet, 12... Trimming element. Figure 1 Figure 2 Figure 3 (b)

Claims (1)

【特許請求の範囲】[Claims] (1)外部リードを突出形成したパッケージ本体にペレ
ット収容窓部とトリミング素子収容窓部を夫々独立して
設け、ペレット収容窓部内にはペレットを搭載して外部
リードとの電気接続を行い、トリミング素子収容窓部内
には抵抗、コンデンサ等のトリミング可能な素子を搭載
して前記ペレット及び外部リードに夫々電気接続したこ
とを特徴とする半導体集積回路装置。
(1) A pellet accommodating window and a trimming element accommodating window are provided independently in the package body from which external leads are formed protrudingly, and a pellet is mounted inside the pellet accommodating window and electrically connected to the external lead, and trimming is performed. A semiconductor integrated circuit device, characterized in that trimmable elements such as resistors and capacitors are mounted in the element housing window and electrically connected to the pellet and external leads, respectively.
JP62332346A 1987-12-30 1987-12-30 Semiconductor integrated circuit device Pending JPH01179352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62332346A JPH01179352A (en) 1987-12-30 1987-12-30 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62332346A JPH01179352A (en) 1987-12-30 1987-12-30 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPH01179352A true JPH01179352A (en) 1989-07-17

Family

ID=18253933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62332346A Pending JPH01179352A (en) 1987-12-30 1987-12-30 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPH01179352A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0472650U (en) * 1990-11-06 1992-06-26
KR100444169B1 (en) * 2001-12-28 2004-08-11 동부전자 주식회사 ceramic package for test

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0472650U (en) * 1990-11-06 1992-06-26
KR100444169B1 (en) * 2001-12-28 2004-08-11 동부전자 주식회사 ceramic package for test

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