JPH0117891Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a level compression circuit that performs level compression on a signal of a predetermined level or higher. This applies to the following.

[Background technology and its problems]

Generally, in television cameras, television receivers, etc., the quality of the signal is improved by subjecting the video signal to non-linear signal processing such as gamma correction processing and white clip processing.
Examples of circuits for performing the above-mentioned non-linear signal processing include, as shown in FIG. A clip circuit 20 which is formed by connecting 22 in series has been widely known. In FIG. 1, the signal source 1 is, for example, a CCD (Charge Coupled
The device outputs the imaging output of an image sensor or the like as voltage information, and outputs the voltage output signal from a signal output terminal 3 via a differential amplification type buffer amplifier circuit 2. The gamma correction circuit 10 and the clip circuit 20 are connected in parallel between the signal output terminal 3 and the ground. The output signal is designed to have non-linear characteristics as shown by the solid line in FIG. The characteristics of the gamma correction circuit 10 are shown by broken lines in FIG.

In the conventional example with the above-described configuration, the clamping characteristic by the clamp circuit 20 is determined by the forward direction characteristic of the diode 21 itself, so it is impossible to reduce the slope of the clamping characteristic, and the maximum input (for example, the specified input) 300%) is difficult to suppress to 120% or less of the specified input level, and if you try to suppress the output level at the maximum input level to 120% or less of the specified input level, the clamp circuit 20 There was a problem with it not working. Further, since the impedance of the gamma correction circuit 10 and the clamp circuit 20 is low, mutual interference occurs when setting each characteristic, making it particularly difficult to set closely adjacent characteristics.

[Purpose of invention]

Therefore, in view of the above-mentioned problems of the conventional method, the present invention is a novel method in which the slope of the compression characteristic, that is, the compression ratio, for signals above a predetermined level can be freely set, thereby making it possible to easily obtain the desired compression characteristic. The present invention provides a level compression circuit of the configuration.

[Summary of the idea]

In order to achieve the above object, the level compression circuit according to the present invention includes a gamma correction circuit connected to a signal output terminal provided on a signal output line of a voltage signal source having an output impedance, and a collector connected to the signal output terminal. A differential amplifier configured by a first transistor connected to the base and having a reference voltage applied to its base, and a second transistor whose base is supplied with a signal having the opposite phase to the signal output from the voltage signal source. It is characterized by comprising a circuit for compressing a signal outputted from the voltage signal source at a predetermined level or higher at a compression rate that can be freely set according to the gain of the differential amplifier circuit, and outputting the compressed signal from the signal output terminal. .

〔Example〕

Hereinafter, one embodiment of the level compression circuit according to the present invention will be described in detail with reference to the drawings.

The embodiment shown in FIG. 3 is an example in which the present invention is applied to a signal processing circuit that performs gamma correction processing and white clip processing on a video signal obtained by a television camera.
0, a gamma correction circuit 50 and a white clip circuit 60 are connected as follows.

In FIG. 3, 70 is a power input terminal to which driving power +V _CC is supplied, and 80 is a signal output terminal in this embodiment. Furthermore, the two resistors 71 and 72 connected in series between the power supply terminal 70 and the ground are connected to the buffer amplifier circuit 40,
It generates a bias voltage to be applied to the gamma correction circuit 50 and the white clip circuit 60, and its connection midpoint connects each transistor 46, 47, 53, and 6, which acts as a constant current source for each circuit 40, 50, and 60.
It is connected to the base of 5,66.

In this embodiment, the voltage signal source 30 is connected to a pair of transistors 41 and 4 of a buffer amplifier circuit 40.
It is connected between the two bases.

The pair of transistors 41 and 42 have collectors connected to the power input terminal 70 via load resistors 43 and 44, respectively, and emitters connected to each other via a resistor 45, as well as a constant current source. each transistor 46, acting as
47, and constitutes a differential amplification type buffer amplifier circuit 40 which outputs signals of mutually opposite phases from each collector. In this buffer amplification circuit 40, the collector of one transistor 41 of a pair of transistors 41 and 42 that performs a differential amplification operation is connected to the signal output terminal 80, and the collector of the other transistor 42 is connected to a white clip. It is connected to the base of a transistor 62 constituting the circuit 60.

Further, the gamma correction circuit 50 includes a variable resistor 51 provided between the power input terminal 70 and the ground.
A transistor 52 serving as a voltage source that provides an operating point set at It has a configuration in which a resistor 54 and a diode 55 are connected in series between the collector of a transistor 53 which acts as a transistor.

The white clip circuit 60 includes a zeroth transistor 61 whose collector is connected to the signal output terminal 80, and a second transistor 62 whose base is connected to the collector of the other transistor 42 of the buffer amplifier circuit 40. Be prepared.
The base of the first transistor 61 is connected to the movable end of a variable resistor 63 provided between the power input terminal 70 and the ground, and the reference voltage V _REF can be freely set by the variable resistor 63. is being applied. Further, the collector of the second transistor 62 is connected to the power input terminal 70. The emitters of the first and second transistors 61 and 62 are connected to each other via a resistor 64, and are also connected to the collectors of transistors 65 and 66, each of which serves as a constant current source. That is, the first and second transistors 61 and 62 constitute a differential amplifier circuit that is driven at a constant current using the output impedance of the buffer amplifier circuit 40 as a load. The first and second transistors 61, 6
The white clip circuit 60 using the differential amplifier circuit configured by the transistor 2 performs a clip operation at the clip level given by the reference voltage V _REF applied to the base of the first transistor 61, and its operating characteristics are Since the slope, ie, the level compression rate for signals above the clip level, is determined by the gain of the differential amplifier circuit, the desired clip characteristics can be easily obtained by setting the gain.

Here, we will discuss the conventional example using the white clip circuit 20 using the diode 21 shown in FIG. 1 above, and the embodiment using the white clip circuit 60 using the differential amplifier circuit according to the present invention shown in FIG. 3 above. , when comparing their operating characteristics, the results shown in FIG. 4 were obtained.

In FIG. 4, a characteristic line a shown by a broken line shows the case where the characteristics are set so that the clamping operation can be performed correctly for a specified input in the conventional example.As is clear from this characteristic line a, In this case, the output level for the maximum input is the specified value.
It increases to more than 130%. Furthermore, characteristic line b shown by a dashed-dotted line shows the case where, in the conventional example, the operating characteristics are set so that the output level with respect to the maximum input is 120% of the specified value, and in this case, the output level with respect to the specified input is The level does not reach 100%,
Clipping occurs when the input level is below the specified level. On the other hand, the characteristic line c shown by the solid line is
In the embodiment of the present invention, the characteristics are set so that the clamp operation can be performed correctly for a specified input.As is clear from this characteristic line c, in the embodiment of the present invention, the output level for the maximum input is set. It can be suppressed to 120% or less, and the desired clamping characteristics can be provided.

[Effect of idea]

As is clear from the above description, according to the present invention, a gamma correction circuit is connected to a signal output terminal provided on an output line of a voltage signal source having an output impedance, a collector is connected to the signal output terminal, and a collector is connected to the signal output terminal. A differential amplifier circuit configured with a first transistor having a base applied with a reference voltage and a second transistor having a base supplied with a signal having a phase opposite to the signal output from the voltage signal source, The level compression circuit is characterized in that the signal outputted from the voltage signal source is compressed at a predetermined level or higher and outputted from the signal output terminal at a compression rate that can be freely set according to the gain of the differential amplifier circuit. As a result, level compression processing can be applied to signals of a predetermined level or higher at an arbitrary compression ratio depending on the gain of the differential amplifier circuit, and the intended purpose can be fully achieved.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional example, and FIG. 2 is a characteristic diagram showing the operating characteristics of the conventional example. FIG. 3 is a circuit diagram showing an embodiment of the level compression circuit according to the present invention, and FIG. 4 is a characteristic diagram comparing the operating characteristics of the conventional example and the operating characteristics of the embodiment. 30... Voltage signal source, 40... Buffer amplifier circuit,
50... Gamma correction circuit, 60... White clip circuit, 61, 62... Transistors forming the white clip circuit, 80... Signal output terminal.

Claims (1)

[Scope of utility model registration request] a gamma correction circuit connected to a signal output terminal provided on a signal output line of a voltage signal source having an output impedance; and a first transistor having a collector connected to the signal output terminal and having a reference voltage applied to its base. and a second transistor whose base is supplied with a signal having the opposite phase to the signal output from the voltage signal source, and a compression circuit that can be freely set according to the gain of the differential amplifier circuit. 1. A level compression circuit that compresses a signal output from the voltage signal source at a predetermined level or higher and outputs the compressed signal from a signal output terminal.