JPH0253991B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a video signal processing circuit that performs non-linear level compression processing by setting a clip level knee point and slope for a video signal.

Traditionally, in video signal transmission systems, non-linear signal processing has often been performed. For example, when imaging a subject with a wide contrast range, such as when imaging in a backlit situation, a non-linear level may be applied to the video signal obtained. By applying compression processing, backlight correction and the like are performed. The above-mentioned level compression processing is performed by a signal processing circuit that sets the white clip level, knee point, and slope. Generally, the above-mentioned clip level, knee point, and slope are need to be adjusted accordingly.

In an imaging device equipped with a conventional level compression processing circuit, when adjusting the three characteristics (white clip, knee point, and slope), if one characteristic is changed, the other two characteristics also change. It takes a lot of effort to set both of them to the desired state, and it often happens that it is not possible to capture the necessary shot in time, which has been a problem.

Therefore, the present invention has developed a novel configuration that allows the three characteristics of white clip, knee point, and slope to be easily adjusted and set without interfering with each other when performing nonlinear level compression processing on video signals. The present invention provides a video signal processing circuit.

Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment.

First, the basic principle of the present invention will be explained using an example in which signal processing is performed on an input video signal having a sawtooth waveform.

FIG. 1 is a block diagram showing the basic configuration of a video signal processing circuit according to the present invention, and FIG. 2 is a waveform diagram for explaining its operation.

In FIG. 1, an input video signal is supplied from a signal input terminal 1 to a clamp circuit 3 via a preamplifier 2. This clamp circuit 3 clamps the DC level of the black level of the input video signal. The video signal having the waveform as shown in FIG. 2A, which has been clamped by the clamp circuit 3, is sent to a first slice circuit 4 and a second slice circuit 5, which have equal gains and each slice level can be set variably. and will be supplied. In the embodiment shown in FIG. 1, the slice level SL ₁ of the first slice circuit 4 is variably set by the first variable resistor 6, and the slice level SL 1 of the second slice circuit 5 is The level SL ₂ is variably set by a second variable resistor 7. In addition, in this example,
Set to SL ₁ < SL ₂ . Each of the above slice circuits 4,
5 outputs the video signals clamped by the clamp circuit 3 to respective slice levels SL ₁ and SL ₂
, and each slice output signal is supplied to the signal mixing circuit 8. In addition, Figure 2B is the same as the above
FIG. 2C shows the waveform of the slice output signal from the second slice circuit 5. FIG.
The signal mixing circuit 8 has a mixing ratio that can be set variably, and in this example is constituted by a resistance adder using a third variable resistor 9. That is, the signal mixing circuit 8 includes a third variable resistor 9
The respective slice circuits 4,
Each slice output signal from 5 is supplied,
The mixing ratio (K: 1-K) according to the resistance ratio between the variable terminal 9c and each terminal 9a, 9b (however, K
A mixed output signal having a waveform as shown in FIG. 2D, which is obtained by adding and combining the respective slice output signals, is outputted from the variable terminal 9c.
The mixed output signal is output from the signal output terminal 11 via the buffer amplifier 10.

In the embodiment with the above-described configuration, by setting the slice level SL ₁ of the first slice circuit 4 lower than the slice level SL 2 of the second slice circuit ₅ , it is _possible to The knee point shown is given at the slice level SL ₁ above.
That is, the above-mentioned knee point P _N can be set by the first variable resistor 6. and,
In this embodiment, each slice output signal from each slice circuit 4, 5 having the same gain is connected to the third variable resistor 9 by the signal mixing circuit 8 whose output terminal is the variable terminal 9c of the third variable resistor 9. Since the signal mixing output signal is obtained by performing signal addition at the resistance ratio of 8, the knee point P _N given by the slice level SL ₁ of the first slice circuit 4 and the signal below the knee point P _N The level remains unchanged with respect to changes in the slice level SL ₂ of the second slice circuit 5 by the second variable resistor 7 and the mixing ratio of the signal mixing circuit 8 by the third variable resistor 9. The second variable resistor 7 that sets the slice level SL ₂ of the second slice circuit 5 is
The white clip level indicated by L _W and the white clip point indicated by P _W in _FIG .
and the white clip point P _W. Here, the third equation gives the above slope.
By adjusting the variable resistor 9, the above knee point
P _N and the signal level below the knee point P _N remain unchanged, and the slope and white clip point P _W
Therefore, by setting the slope using the third variable resistor 9 and then setting the white clip point P _W using the second variable resistor 7, the white clip point P _W can be set. , knee point P _N and slope can be easily set.

In the above embodiment, the operation was explained using an input video signal with a sawtooth waveform, but this embodiment performs the above-mentioned non-linear level compression processing on a normal input video signal. Needless to say, you can get it.

Next, a practical example of the video signal processing circuit according to the present invention will be described using FIGS. 3 and 4. FIG. 3 is a block diagram showing the basic circuit configuration of this embodiment, and FIG. 4 is a circuit diagram showing the specific circuit configuration of the main part thereof.

In this embodiment, the input video signal from signal input terminal 15 is supplied to clamp circuit 30 via preamplifier 20 .

The clamp circuit 30, as shown in FIG.
First to fourth transistors 31, 32, 3
3 and 34, and a video signal is supplied to the base of the first transistor 31. A third transistor 33 provided at the base of a second transistor 32 connected to the emitter of the first transistor 31 via a capacitor 35 performs a switching operation in response to a clamp pulse from a clamp pulse input terminal 36. As a result, the DC level of the black level of the video signal is clamped, and the clamped output signal is outputted via the emitter follower circuit formed by the fourth transistor 34.

The clamp output signal from the clamp circuit 30 is supplied to an input terminal of each of a first slice circuit 40 and a second slice circuit 50, each of which is configured by a differential amplifier circuit. A DC control signal is supplied to the other input terminal of each slice circuit 40, 50 from control input terminals 45, 55, respectively, via input resistors 46, 56.

As shown in FIG. 4, the first slice circuit 40 is composed of fifth and sixth transistors 41 and 42 that are differentially connected, and the base of the fifth transistor 41 is connected to the clamp circuit described above. 30
The base of the sixth transistor 42 is connected to the first control input terminal 45 via an input resistor 46. This first slice circuit 40 is
The slice level SL ₁ is controlled according to the signal level of the control signal supplied to the first control input terminal 45, and a slice output signal is output from the emitters of the commonly connected transistors 41 and 42. Similarly, the second slice circuit 50 also consists of two differentially connected transistors 51 and 52,
The base of the seventh transistor 51 is connected to the emitter of the fourth transistor 34, and the base of the eighth transistor 52 is connected to the second control input terminal 55 via an input resistor 56. The second slice circuit 50 has a slice level SL ₂ controlled by the signal level of the control signal supplied to the second control input terminal 55, and outputs a slice output signal from the emitter of each transistor 51, 52. do.

Each slice output signal from each of the slice circuits 40 and 50 is a signal mixer formed by a differential amplifier circuit whose signal mixing ratio can be controlled by a linear control signal supplied to a third control input terminal 88. circuit 80
is supplied to each input terminal of This signal mixing circuit 8
0 is composed of ninth to fifteenth transistors 81, 82, 83, 84, 85, and 86 as shown in FIG.
The slice output signal from the ninth transistor 8
The slice output signal from the second slice circuit 50 is connected to the base of the tenth transistor 82. The emitters of the eleventh and twelfth transistors 83 and 84 are commonly connected to the collector of the ninth transistor 81. Further, the collector of the tenth transistor 82 is commonly connected to the emitters of the thirteenth and fourteenth transistors 85 and 86. The bases of the twelfth and thirteenth transistors 84 and 85 are connected to a third control input terminal 88 via an input resistor 89. In the signal mixing circuit 80 having such a configuration, the slice output signals from each of the slice circuits 40 and 50 are input through the differential amplifier circuit and the tenth transistor 82, respectively. Since the operation of each of the transistors 84 and 85 constituting the differential amplifier circuit is controlled by the signal level of the control signal from the third control input terminal 88, the twelfth and fourteenth transistors 8
A mixed output signal is obtained by mixing the respective slice output signals at a mixing ratio corresponding to the signal level of the control signal at a signal output terminal 90 to which the respective collectors of 4 and 86 are commonly connected.

As in this embodiment, each slice circuit 40, 5
0 and the signal mixing circuit 80 are configured with differential amplifier circuits, the white clip point P _W , knee point P _N and slope can be determined depending on the signal level of the control signal applied to each control input terminal 45 , 55 , 88 . It can be set by direct current control.
Therefore, it becomes possible to remotely or automatically control the non-linear operating characteristics in the level compression processing of the video signal using a direct current control signal.

Generally, when performing nonlinear level compression processing, a signal processing circuit configured to obtain nonlinear operating characteristics using diodes has been used, so the capacitance of the diode is As a result, the high frequency characteristics of the signal often deteriorated. However, in the above embodiment, the diode, which causes deterioration of frequency characteristics, is not used.
Because of this structure, there is no deterioration of high frequency characteristics.

As is clear from the description of each of the embodiments described above, according to the present invention, a clamp circuit that clamps a predetermined DC level of an input video signal, and each slice level that has equal gain and can be set freely, Two slicing circuits that slice the video signal clamped by the clamp circuit, and a signal mixing circuit that mixes and outputs the video signals sliced by these two slicing circuits at a variably settable mixing ratio, Signal processing is performed by setting the clip level according to the slice level of one slice circuit, setting the knee point according to the slice level of the other slice circuit, and setting the slope according to the mixing ratio of the signal mixing circuit. By using this configuration, the three characteristics of white clip, knee point, and slope can be easily adjusted and set without interfering with each other, and non-linear level compression processing can be performed on the video signal with good frequency characteristics. Therefore, it is possible to provide a video signal processing circuit that can perform image processing.

Therefore, by applying the present invention to an imaging device, the three characteristics of white clip, knee point, and slope can be quickly adjusted and set according to the imaging conditions, etc., and it becomes possible to reliably image the required shot. .

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment for explaining the basic principle of a video signal processing circuit according to the present invention. FIG. 2 is a waveform diagram for explaining the operation of the above embodiment. 3 and 4 show practical embodiments of the video signal processing circuit according to the present invention, FIG. 3 is a block diagram showing the basic circuit configuration, and FIG. 4 is a concrete configuration of the main parts. FIG. 1, 15... Signal input terminal, 3, 30... Clamp circuit, 4, 5, 40, 50... Slice circuit, 6, 7, 9... Variable resistor, 8, 80... Signal mixing circuit, 11 ,90...Signal output terminal, 4
5, 55, 88...Control signal input terminals.

Claims (1)

[Claims] 1. A clamp circuit that clamps a predetermined DC level of an input video signal, and a clamp circuit that has equal gain to each other,
Two slicing circuits that slice the video signal clamped by the clamp circuit at each variably settable slice level, and mix the video signals sliced by these two slicing circuits at a variably settable mixing ratio. The clip level is set according to the slice level of one slice circuit, the knee point is set according to the slice level of the other slice circuit, and the mixing ratio of the signal mixing circuit is set. A video signal processing circuit characterized in that signal processing is performed by setting a slope.