JPH0630430B2 - Signal processing circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a signal processing circuit suitable for use in a video device such as a video camera.

[Background technology]

"Patent Pulse Circuit Technology Encyclopedia" (May 20, 1980,
1st edition 1st printing issue, publishing house Ohmsha Co., Ltd., P139,
FIG. 1) discloses a so-called unbalanced type clipper circuit. According to a study by the present inventor regarding this type of clipper circuit, the clip level cannot be easily changed and the temperature characteristic is not good. found.

On the other hand, noise called image noise is continuously output from those skilled in the art from image pickup tubes used in video cameras and the like, but if this noise component can be removed, a clear image can be displayed.

The present inventor has studied the above clipper circuit from the above technical point of view, and has completed the present invention.

[Object of the Invention]

An object of the present invention is to provide a signal processing circuit which has good temperature characteristics and can easily change the clip level.

The above and other objects and novel features of the present invention will be apparent from the present specification and the accompanying drawings.

[Outline of Invention]

To briefly describe the outline of the invention disclosed in the present application,
It is as follows.

That is, the first differential circuit composed of the transistors Q ₅ and Q ₆ and the second differential circuit composed of the transistors Q ₇ and Q ₈ .
The differential circuit and the output voltage synthesizing means composed of the resistors R ₈ and R ₉ are provided, and the bias voltage supplied to the transistors Q ₆ and Q ₈ is provided with a level difference and the level can be adjusted. Accordingly, to obtain a clipped output signal per positive polarity (first polarity) and negative polarity (second polarity) of the input signal V _in, to achieve the object of the present invention that readily variable to a clip level It is a thing.

〔Example〕

Next, an embodiment of the signal processing circuit to which the present invention is applied will be described with reference to FIGS. Since the signal processing circuit is suitable for processing a chroma signal in a video camera, the video camera will be described first.

FIG. 1 shows a circuit configuration of a video camera.
Reference numeral 1 is an image pickup tube, 2 is a preamplifier, and 3 is an AGC circuit.
The output signal V ₀ of the AGC circuit 3 includes various color signals.

From the output of the low pass filter 4, a luminance signal in the band of 0 to 4.5 MHz, that is, a Y signal is obtained. The low-pass filter 5 has a cut-off frequency of 1 MHz, and outputs a low-frequency luminance signal of about 0 to 0.5 MHz, that is, Y _L.
The signal is obtained.

The band pass filter 6 has a frequency band of 3.6 MHz ± 0.5 M
The color signal R (red) and the color signal B (blue) are obtained. The color signal detection circuit 7 is well known to those skilled in the art, and separates the R signal and the B signal from the output of the bandpass filter 6. The low-pass filter 8 is provided to obtain an R signal from the output signal of the AM-modulated color signal detection circuit 7. Further, the low-pass filter 9 is provided to obtain the B signal from the output signal of the color signal detection circuit 7 which is AM-modulated.

The Y signal, Y _L signal, R signal, and B signal are each 4
It is supplied to the channel process circuit 11. 4-channel processing circuit 11, _{R-Y L} signal, _{B-Y L} signal,
Y signal, supplies a _{Y L} signal to the next stage of the encoder 12.

The encoder 12 includes the color difference signals (R-Y _L , B-Y).
_L), the luminance signal (Y, in addition to _{Y L),} a blanking signal BL, the horizontal and vertical synchronizing signals _V H, _{V V} and the like are supplied.

Then, from the encoder 12, a composite television signal V _d including a luminance signal, a color difference signal, a synchronization signal, etc. is obtained.

By the way, the signal processing circuit to which the present invention shown in FIG. 2 is applied is provided in the encoder. The Y signal is supplied to the 1st terminal of the signal processing circuit which is made into an IC through the coupling capacitor C _C. However, in the following description, mainly the clipping operation of the signal will be described, so that as shown in FIG. It is assumed that the input signal V _in is supplied.

Reference numeral 21 denotes an amplifier circuit, which is a transistor Q forming a differential pair.
₁ , Q ₂ , constant current circuit CS ₁ , reference voltage V _ref , resistor R
It is composed of ₁ , R ₂ , R ₃ , R ₄ , and R ₅ . The amplified output voltage is obtained from one end of the load resistor R ₁ and is supplied to the direct current component regeneration circuit 22.

DC component reproduction circuit 22, the transistors _Q 3, _{Q 4,} the constant current circuit _CS 2, CS _3, resistors _R 6, _{R 7,} a capacitor C
Is constituted by a _1, the output voltage transistor _Q 3, Q
Obtained from ₄ emitters.

The circuit operation of the circuit block 23 is extremely important, and the clip level is changed in the circuit block 13.

The transistors Q ₅ , Q ₆ and Q ₇ , Q ₈ operate as a kind of OR circuit, but the bases of the transistors Q ₆ , Q _{8 have} different voltages due to the resistors R ₁₃ , R ₁₄ forming the bias circuit 24. A level bias voltage is supplied. Then, the current flowing through the resistor R _13, R ₁₄ When I _A, by adjusting the variable resistor V _R1, which is connected to the fourth terminal,
The bias voltage of the transistors Q ₁₃ and Q ₁₄ is controlled through the interfence 25, and the current I _A corresponding to the bias voltage is controlled.
Is also controlled. The change of the current I _A becomes the change of the bias voltage of the transistor Q ₆ obtained by I _A · R ₁₃ , and I
_{This is} a change in the bias voltage of the transistor Q ₈ obtained by _A · R ₁₄ .

Now, an input signal V _in is supplied to the base of the transistor Q _5, Q ₇ in waveform as shown in FIG. 3 is amplified (A). The emitter of the transistor Q ₅ is shown in FIG.
_A clipped output voltage V _A as shown in (B) is obtained, and its clipping level V _C is controlled by the bias voltage of the transistor Q ₆ determined by I _A · R ₁₃ .

The clipped output voltage V _B as shown in FIG. 3 (C) is obtained at the emitter of the transistor Q ₇ , whose clip level V _C ′ is determined by I _A · R ₁₄ above. Controlled by a bias voltage of _eight .
The output voltages V _A and V _B are combined via the resistors R ₈ and R ₉ and appear as a waveform as shown in FIG.

Regarding the above clipping operation, in order to improve the temperature characteristics, the temperature change of the bias voltage obtained by I _A · R ₁₃ or I _A · R ₁₄ may be set to zero. Therefore, the interface 25 is extremely important.

That is, since the transistors Q ₂₁ and Q ₂₂ are a combination of NPN transistors and PNP transistors,
The temperature changes of the base-emitter voltages V _BEQ21 and V _BEQ22 cancel each other out, and fluctuations in the bias voltage of the transistors Q ₁₃ and Q ₁₄ can be reduced, thereby stabilizing the current I _A.

Further, since the transistors Q ₅ and Q ₆ are NPN transistors and the transistors Q ₇ and Q ₈ are PNP transistors, by combining the output voltages V _A and V _B , the fluctuation of the reference level is changed. Will be reduced. Further, since the transistors Q ₅ , Q ₆ and Q ₇ , Q ₈ are configured as an emitter follower when the constant current circuits CS ₃ , CS ₄ are loaded, there is also an advantage that the frequency characteristic is improved.

Regarding the bias circuit 24, the transistors Q ₁₁ and Q _{12 form a} current mirror circuit, and the reference current is defined by the transistor Q ₁₂ and the resistor R ₁₂ .
The amount of current is controlled by the transistor Q _{14 as} described above.

The output voltage of the DC recovery circuit 22 is supplied to the base of the transistor Q ₁₆ via the resistor R ₇ , and the DC voltage is supplied from the buffer circuit (voltage follower) composed of the transistors Q ₁₅ and Q ₁₆ and the constant current source CS _6. It is output as the minute reproduction voltage.

When the above signal processing circuit is used in a video camera, even if a noise component is mixed in the output signal from the image pickup tube 1, the noise component can be removed while the signal level is low, so that the S / N ratio is improved. It becomes good and can display a very clear image. Also, the clip level can be arbitrarily and easily set according to the user's request, which is very convenient.

〔effect〕

(1) Since the transmitted signal is supplied to one of the transistors forming the differential pair and the bias voltage of the other transistor is made variable, the clip level can be easily controlled.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention. Nor.

For example, the control voltage supplied to the fourth terminal may be the AGC voltage obtained from the AGC circuit.

Although the signal processing circuit shown in FIG. 2 is composed of bipolar transistors, it may be composed of MOSFETs instead.

[Field of application]

In the above description, the invention mainly made by the present inventor has been described with respect to a signal processing circuit which is a field of use which is the background of the invention, but the present invention is not limited thereto.

INDUSTRIAL APPLICABILITY The present invention can be used at least in electronic devices that need to clip transmission signals.

[Brief description of drawings]

1 to 3 show an embodiment of a signal processing circuit to which the present invention is applied. FIG. 1 is a block diagram showing the overall circuit configuration of a video camera, and FIG. 2 is a signal processing circuit. A circuit diagram showing a circuit configuration of the circuit is shown, and FIGS. 3 (A), (B), (C) and (D) are waveform diagrams showing the circuit operation of the signal processing circuit. 12 ...... Enkota, 21 ...... amplifying circuit, 22 ...... DC component reproduction circuit, 23 ...... clipping circuit, 24 ...... bias circuit, 25 ...... _interface, Q 1 to Q ₂₂ ...... transistor, V _in ...... Input signal, V _A , V _B ... clip output, V ₀ ... output signal, VR ₁ ... variable resistance, CS ₁ ,
CS ₂ , CS ₃ , CS ₄ , CS ₅ , CS ₆ , CS ₇ ...
Constant current circuit.

Claims (1)

[Claims] 1. A direct current component reproducing circuit (22) for reproducing a direct current component from an input signal, and (b) one clip level variable control signal,
First and second transistors (Q13, Q14) for forming first and second constant currents having levels proportional to the clip level variable control signal with the ground point of the circuit, respectively,
The second current is received by the collector current of the second transistor.
A current mirror circuit (R11, R12, Q11, Q) that forms a current of a level proportional to the collector of the transistor
12) and a first resistor (R) having one end connected to the output of the current mirror circuit and the other end connected to the output of the DC component regeneration circuit.
13) and a second one whose one end is connected to the collector of the first transistor and whose other end is connected to the output of the current mirror circuit.
A bias circuit (24) having a resistor (R14), and (c) a base having one base for receiving the input signal and the other base for receiving a voltage at one end of the first resistor and having emitters commonly connected. A first clip circuit including a first conductivity type third and fourth transistors (Q5, Q6) and a first current source (CS3) for supplying an operating current to the common emitter, and one of the bases for receiving the input signal. , A second conductivity type fifth and sixth transistor (Q
7, Q8) and a second clip source (CS4) for supplying an operating current to the common emitters of the fifth and sixth transistors, and outputs from the common emitters of the third and fourth transistors. A clip circuit comprising a combining means (R8, R9) for resistance-combining the outputs from the common emitters of the fifth and sixth transistors to form an output, and a signal processing circuit.