JPH01165145A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH01165145A
JPH01165145A JP62324780A JP32478087A JPH01165145A JP H01165145 A JPH01165145 A JP H01165145A JP 62324780 A JP62324780 A JP 62324780A JP 32478087 A JP32478087 A JP 32478087A JP H01165145 A JPH01165145 A JP H01165145A
Authority
JP
Japan
Prior art keywords
frame
panel
panels
semiconductor device
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62324780A
Other languages
Japanese (ja)
Inventor
Seiichi Mimura
誠一 三村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62324780A priority Critical patent/JPH01165145A/en
Publication of JPH01165145A publication Critical patent/JPH01165145A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Credit Cards Or The Like (AREA)

Abstract

PURPOSE:To prevent outflow to the outside at the time of the curing of adhesives for sealing by forming a groove to the partial whole circumference of the edge of a joint surface between a panel and a frame in the frame. CONSTITUTION:Grooves 6 are shaped to the partial whole circumferences of the edges of joint surfaces in panels 5 in a frame 3. Accordingly, when thermo- setting adhesive sheets 4 are bonded temporarily with the panels 5 previously and the panels 5 and the frame 3 are laminated and heated and contact-bonded in a curing oven while being pressed by a jig, excess adhesives flow into the grooves 6 in said frame 3, thus preventing extrusion from the clearances of the frame 3.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体装置の組立てにおいて、半導体装基
板を、フレームにはめ込んで収納した後、接着剤を用い
て、フレームの両面に、パネルを貼り合わせる際のフレ
ームに関するものである。
[Detailed Description of the Invention] [Industrial Application Field] In the assembly of semiconductor devices, the present invention involves fitting and storing a semiconductor board in a frame, and then attaching panels to both sides of the frame using an adhesive. This relates to the frame used when pasting together.

〔従来の技術〕[Conventional technology]

第2図は、従来の半導体装置を示す断面図であり、図に
おいて、(1)は半導体素子、(2)は半導体装基板、
(3)は半導体装基板(2)がはめ込まれるとともに、
封止用パネル(5)を接合するフレームである。(4)
は封止用パネル(5)と、フレーム(3)を接合するた
めの熱硬化性の接着シートである。
FIG. 2 is a cross-sectional view showing a conventional semiconductor device, in which (1) is a semiconductor element, (2) is a semiconductor device substrate,
(3) is fitted with the semiconductor board (2), and
This is a frame to which the sealing panel (5) is joined. (4)
is a thermosetting adhesive sheet for joining the sealing panel (5) and the frame (3).

次に、この封止方法について説明する。まず、半導体素
子(1)が実装された半導体装基板(2)を、フレーム
(3)に機械的にはめ込んで組み立てる。次に、封止用
パネル(5)におけるフレーム(3)と、封止用パネル
(5)の接合面に熱硬化性の接着シートを予め仮接着し
た後、封止用パネル(5)と、フレーム(3)を貼り合
わせる。その後、パネルの両面を治具に挾み込み加圧し
ながら、キュア炉にて加熱圧着する0 〔発明が解決しようとする問題点〕 従来の半導体装置は以上のような方法でパネルとフレー
ムの間に接着シートを挾み込み、加圧しながら熱圧着す
るので、キュア炉にて接着シートが溶け、液状になった
際、@3図の(7)に示すように、パネルとフレームの
すき間から接着剤が流れ出し、接着後、そのはみ出した
接着剤のために、外観不良となり、後工程で、その余分
な接着剤を取り除かなければならないという、きわめて
生産性が悪く、品質の安定が保たれないという問題点が
あった。
Next, this sealing method will be explained. First, a semiconductor mounting board (2) on which a semiconductor element (1) is mounted is mechanically fitted into a frame (3) and assembled. Next, after temporarily adhering a thermosetting adhesive sheet to the joint surface of the frame (3) and the sealing panel (5) in the sealing panel (5), the sealing panel (5) is Paste the frame (3) together. Thereafter, both sides of the panel are placed in a jig, and while being pressurized, they are heated and crimped in a curing furnace. The adhesive sheet is sandwiched between the panels and heat-compressed while applying pressure, so when the adhesive sheet melts in the curing oven and becomes liquid, the adhesive can be bonded from the gap between the panel and frame, as shown in (7) in Figure 3. The adhesive flows out, and after bonding, the protruding adhesive causes a poor appearance, and the excess adhesive must be removed in the subsequent process, which is extremely poor productivity and does not maintain stable quality. There was a problem.

この発明は、ト記のような問題点を解決するためKなさ
れたものであり、封止用の接着剤のキュア時における、
外部への流出をなくシ、接合の安定性を得るとともに、
後工程におけるはみ出した接着剤の取り除き作業を省く
ことを目的とする。
This invention was made in order to solve the problems mentioned above, and when the sealing adhesive is cured,
In addition to eliminating leakage to the outside and achieving bonding stability,
The purpose is to eliminate the work of removing protruding adhesive in the subsequent process.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

この発明における半導体装置は、フレームにおけるパネ
ルとフレームの接合面の縁の部分全周に溝を施したもの
である。
In the semiconductor device of the present invention, a groove is formed around the entire circumference of the edge of the joint surface between the panel and the frame in the frame.

〔作用〕 これにより、パネルとフレームを熱硬化性接着シートに
より加熱圧着する際、加圧力のバラツキ等によって、接
着剤が、パネルとフレームのすき間からはみ出すのを防
止することができる。
[Function] Thereby, when the panel and the frame are bonded together by heat and pressure using the thermosetting adhesive sheet, it is possible to prevent the adhesive from protruding from the gap between the panel and the frame due to variations in the pressing force or the like.

〔実施例〕〔Example〕

以下、この発明の一実施例を、図について説明する。第
1図はこの発明の一実施例による半導体装置を示す断面
図であり、図中、第2図及び第3図と同一符号は同一ま
たは相当部分であシ説明は省略する。第1因において、
(6)は封止用パ* ル(5)と、フレーム(3)の接
合面におけるフレーム(3)の縁の部分全周に施した溝
である。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention. In the figure, the same reference numerals as in FIGS. 2 and 3 indicate the same or corresponding parts, and the explanation thereof will be omitted. In the first cause,
(6) is a groove formed around the entire circumference of the edge of the frame (3) at the joint surface of the sealing pallet (5) and the frame (3).

上記のように構成された半導体装置においては、第1図
に示すように、フレーム(3)におけるパネル(5)の
接着面の縁の部分全周に溝を施しているため、熱硬化性
の接着シート(4)を予めパネル(5)に仮接着し、そ
の後、パネル(5)と、フレーム(3)を貼シ合わせて
、治具にて加圧しながらキュア炉にて加熱圧着する際、
余分な接着剤は前記フレーム(3)の溝に流れ込むので
、パネル(5)と、フレーム(3)のすき間からはみ出
すのを防止できる。
In the semiconductor device configured as described above, as shown in FIG. The adhesive sheet (4) is temporarily adhered to the panel (5) in advance, and then the panel (5) and the frame (3) are pasted together and heated and pressed in a curing furnace while being pressurized with a jig.
Since the excess adhesive flows into the groove of the frame (3), it can be prevented from protruding from the gap between the panel (5) and the frame (3).

また、本実施例では、フレーム(3)におけるパネル(
5)との接着面の縁の部分に、第1図に示すように、凹
形状の溝を施した例を示したが、フレーム(3)におけ
る溝の形状を、第4図に示すように、7字型の溝にして
もと記実施例と同様の効果を得ることができる。
Furthermore, in this embodiment, the panel (
As shown in Figure 1, we have shown an example in which a concave groove is formed on the edge of the adhesive surface with frame (3). , the same effect as in the above embodiment can be obtained even if the groove is shaped like a 7-shape.

また、第1図及び第4図に示した実施例では、フレーム
(3)において、接着時の加圧力向に溝を施した例を示
したが、第5図に示すように、横方向に溝を施してもよ
い。
Furthermore, in the embodiments shown in FIGS. 1 and 4, the frame (3) was provided with a groove in the direction of the pressure applied during bonding, but as shown in FIG. Grooves may also be provided.

〔発明の効果〕〔Effect of the invention〕

この発明は、以北説明した通シ、フレームにおけるパネ
ルとの接合面の縁の部分全周に溝を設けたという簡単な
構造によシ、パネルの両面を治具にて加圧しながら、キ
ュア炉にて、加熱圧着する際、接着剤が外部に流出する
のを防止できるという良好でかつ安定した接合ができる
とともに、外工程における、はみ出し接着剤の取り除き
作業も不要となシ、生産性や、品質の向丘が得られると
いう効果もある。
This invention has a simple structure in which a groove is provided all around the edge of the joint surface of the frame with the panel as described above, and the curing process is performed while applying pressure on both sides of the panel with a jig. When hot and press bonded in a furnace, it is possible to prevent the adhesive from leaking out, resulting in a good and stable bond, and there is no need to remove the protruding adhesive in the external process, which improves productivity. , it also has the effect of providing a higher level of quality.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明の一実施例を示した断面図、第2図
は、従来の半導体装置を示した断面図、第3図は、従来
の半導体装置における不良例を説明するための断面図、
第4図及び第5図は、他の実施例を説明するだめの断面
図である。 図において、(1)は半導体素子、(2)は半導体装基
板、(3)はフレーム、(4)は封止用パネル、(5)
はフレーム(3)とパネル(4)を接着するだめの熱硬
化性接着シートである。(6)は本発明によって、フレ
ーム(3)の縁に施した溝である。 尚、図中、同一符号は、同一、又は相当部分を示す。
FIG. 1 is a sectional view showing an embodiment of the present invention, FIG. 2 is a sectional view showing a conventional semiconductor device, and FIG. 3 is a sectional view illustrating a defective example of a conventional semiconductor device. figure,
FIGS. 4 and 5 are sectional views for explaining other embodiments. In the figure, (1) is a semiconductor element, (2) is a semiconductor packaging board, (3) is a frame, (4) is a sealing panel, (5)
is a thermosetting adhesive sheet for bonding the frame (3) and panel (4). (6) is a groove made in the edge of the frame (3) according to the present invention. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims]  半導体実装基板上に、複数個の半導体素子を実装した
後、前記半導体実装基板をフレーム内にはめ込み、その
後、片面に予め熱硬化性接着シートが仮止めされた2枚
のパネルを、フレームの両面に前記接着シートをパネル
とフレームにはさみこんで貼り合わせて封止する半導体
装置において、前記フレームにおけるパネルとフレーム
の接合面の縁の部分の一部又は全周に、溝を設けたこと
を特徴とする半導体装置。
After mounting a plurality of semiconductor elements on a semiconductor mounting board, the semiconductor mounting board is fitted into a frame, and then two panels with a thermosetting adhesive sheet temporarily attached to one side are attached to both sides of the frame. A semiconductor device in which the adhesive sheet is sandwiched between a panel and a frame and bonded together for sealing, characterized in that a groove is provided in a part or the entire circumference of the edge of the joint surface of the panel and frame in the frame. semiconductor device.
JP62324780A 1987-12-21 1987-12-21 Semiconductor device Pending JPH01165145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62324780A JPH01165145A (en) 1987-12-21 1987-12-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62324780A JPH01165145A (en) 1987-12-21 1987-12-21 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH01165145A true JPH01165145A (en) 1989-06-29

Family

ID=18169589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62324780A Pending JPH01165145A (en) 1987-12-21 1987-12-21 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH01165145A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0470752U (en) * 1990-10-30 1992-06-23
EP1156474A2 (en) * 2000-05-16 2001-11-21 Yamaha Corporation Structure body formed by rib member and plate members

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0470752U (en) * 1990-10-30 1992-06-23
EP1156474A2 (en) * 2000-05-16 2001-11-21 Yamaha Corporation Structure body formed by rib member and plate members
EP1156474A3 (en) * 2000-05-16 2004-03-17 Yamaha Corporation Structure body formed by rib member and plate members

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